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AZ DISPLAYS, INC. LCD MODULE SPECIFICATION MODULE TYPE : AGM1616A

LIQUID CRYSTAL DISPLAY MODULE View Direction þ 6 O’clock ¨ 12 O’clock ¨ FSTN Positive ¨ FSTN Negative LCD Type þ STN Gray ¨ STN Yellow Green ¨ STN Blue Rear Polarizer ¨ Reflective þ Transflective ¨ Transmissive ¨ Internal Power þ EL ¨ 5V input Backlight Type ¨ LED þ External Power ¨ CCFL ¨ Other Backlight Color ¨ White ¨ Amber þ Blue Green ¨ Yellow Green ¨ Other Temperature Range ¨ Normal þ Wide ¨ Super Wide EL Driver IC ¨ Build-in þ Not Build-in Touch Screen ¨ With þ Without The driver ICs are static sensitive. Make sure the user is grounded when handling the LCD.

Display Resolution 160(H)×160(W) Dimensional Outline(mm) 89.2(H)×85.0(W)×11.0max(D) Display mode Transflective / Positive Mode Circuit Common-Driver IC, Segment-driver IC Interface Data (D0-D3), CL1, CL2, FRM, VEE, Vo ABSOLUTE MAXIMUM RATING (1) Electrical Absolute Ratings Item Symbol Min. Max. Unit Note Power Supply for Logic VDD-VSS -0.3 7.0 Volt Power Supply for LCD VDD-VEE 0 +30 Volt Input Voltage VI -0.3 VDD Volt Supply Current for LED Backlight ILED - 1,000 mA (2) Environmental Absolute Maximum Ratings Normal Temperature Wide Temperature Operating Storage Operating StorageItem Max, Min. Max, Min. Max, Min. Max, Min. Ambient Temperature 0 +50 -20 +70 -20 +70 -30 +80 Humidity(without condensation) Note 2,4 Note 3,5 Note 4,5 Note 4,6 Note 2 Ta less than or equalto 50C: 80% RH max Ta greater than 50C: Absolute humidity must be lower than the humidity of 85%RH at 50C Note 3 Ta at -20C will be less than 48hrs. At 70C, will be less than 120hrs when humidity is higher than 75%. Note 4 Background color changes slightly depending on ambient temperature. This phenomenon is reversible. Note 5 Ta less than or equal to 70C: 75RH max Ta greater than 70C: absolute humidity must be lower than the humidity of 75%RH at 70 Note 6 Ta at -30 will be less than 48hrs. At 80C, will be less than 120hrs when humidity is higher than 75%.

ELECTRICAL CHARACTERISTICS

Item Symbol Condition Min. Typ Max. Unit note Power Supply for Logic VDD-VSS - 2.7 3.0 5.5 Volt VIL L level VSS 0.2 VDD - VoltInput Voltage VIH H level 0.8 VDD VDD - Volt Ta=0C 19.4 19.6 19.8 Ta=25C 18.7 19.0 19.2 Recommend LCD Module Driving Voltage VDD –VO Ta=50C 17.8 18.0 18.2 Volt IDD(EL B/L OFF) - 1.8 2.5 IEE - 2.0 2.3 ILED VDD =4.5V VDD-VO =19.0V FLM=64Hz VLED=4.2V - 500 - mAPower Supply Current for LCM VEL - 100VAC/ 400Hz - - OPTICAL CHARACTERISTICS Item Symbol Condition Min. Typ. Max. Unit note f(12 o’clock) - 34 - b(6 o’clock) - 41 - l(9 o’clock) - 30 - Viewing angle range r(3 o’clock) When Cr2 - 35 - Degree 9,10

0 VEE-VSS

=+19.6V - - - mS

25 VEE-VSS

=+19.0V - 239/140 - mSRise Time/ Fall Time Tr/Tf

50 VEE-VSS

=+18.0V - - - mS Frame frequency Frm - 64 - Hz 8,10 Contrast Cr Ta=25 - 7.3 - 7

Product No. AGM1616A Module Size 89.2(W)mm×85.0(H)mm×10.4(D)mm Max Dot Size 0.34(W)mm×0.34(H)mm Dot Pitch 0.38(W)mm×0.38(H)mm Resolution 160(W)×160(H) Dots Matrix Duty Ratio 1/160 Duty STN þGray Mode ¨Yellow Mode ¨Blue Mode FSTN ¨ Black & White(Normally White/Positive Image) ¨ Black & White(Normally White/Negative Image)LCD Display Mode Rear Polarizer: ¨ Reflective þ Transflective ¨ Transmissive ¨ Transflective(High Transmissive) Viewing Direction þ6 O’clock ¨12 O’clock ¨3 O’clock ¨9 O’clock Backlight ¨W/O ¨CCFL þEL ¨LED Controller Without DC/DC Converter Without EL Driver Without

Pin No. Pin Out Description

1 VSS GND

2 NC No connection

3 FLM Frame start signal (Data signal from the common driver shift register)

4 CL1 Common driver data shift signal: also latches the data of the line

immediately above.

5 CL2 Clock pulse for segment shift register

10 VEE LCD driver supply voltage

11 VDD Logic supply voltage

12 Vo Bias voltage for LCD panel, tuning from VDD-VEE. 13 / DispOff Display off, active LOW.

14 BKL-K

15 BKL-A

Power Supply for backlight. 4.2V for LED backlight, 100VAC/400 Hz for EL backlight.

[Note 10] Definition of viewing angle [Note 11] Description of Measuring Equipment

Built-in M-clock generating circuit, User does not need to supply M-clock. POWER SUPPLY

1 Segment interface timing: (VSS=V5=0V, VDD=2.5V to 4.5V, VEE=+15.0 to +24V, Ta=0 to 50C) Item Symbol Test Condition Min. Max. Unit Clock cycle time tCY Duty = 50% 250 - ns Clock Pulse Width tWCK 95 - ns Data Set Up Time tDS 65 - ns Data Hold Time tDH 65 - ns Latch pulse ‘H’ width tWCK 95 - ns Input signal Rise/Fall Time tr, tf - 30 ns Clock Set Up Time tCS 120 - ns Clock hold time tCH 120 - ns DispOFF clear time tCD 100 - ns DispOFF ‘L’ pulse width tWDL 1.2 - us Note: Latch:CL1, Shift: CL2

2 Power ON/OFF Timing

The missing pixels may occur when the LCM is driven beyond above power interface timing sequence.

SEG1 SEG2 SEG3 SEG4 SEG157 SEG158 SEG159 SEG160