AFCT-57V6NSZ AVAGO | Alldatasheet
Document overview
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- PDF pages: 22
Technical content
Features
- Gigabit Ethernet transceiver
- RoHS Compliant
- IEEE 802.3z, 1000BASE-ZX
- Extended transmission distance up to 40 km
- Compliant with SFP Multi Source Agreement (MSA)
- Duplex-LC optical interface
- 1550 nm DFB-LD
- Serial ID
- Digital Diagnostic Monitoring interface
- Bail delatch for easy removal from cage
- Available in industrial temperature range (-40 to +85°C)
- Immune to ESD, RF fields, and Vcc noise
- Designed for very low RF emissions
- Class 1 laser safety
- AC-coupled differential serial I/O interface
- Single +3.3 Volt supply operation
- Low power dissipation
Applications
- Ethernet switches
- Multi-service switches and routers
- Broadband aggregation and wireless infrastructure
- Switched backplane applications
- High Speed Interface for server farms
- Metro access switch GbE connections AFCT-57V6NSZ Small Form Factor Pluggable (SFP) LC Optical Transceiver for 1.25GBd Ethernet at Extended Link Lengths (Up to 40km) Data Sheet
Figure 1. AFCT-57V6NSZ Simplified Block Diagram Table 1. General AFCT-57V6NSZ Specifications † Optical specifications are modified to realize 40 km transmission in singlemode fiber.
Table 2. Absolute Maximum Ratings Table 3. Recommended Operating Conditions † Measured with a sinusoidal signal from 100 Hz to 2 MHz at the input of the recommended power supply filter shown in Figure 13. able device or unsafe operation as described above. the LC connector receptacle be covered when not in use. Note [6] for additional handling information. tion of the AFCT-57V6NSZ over the operating conditions. of the AFCT-57V6NSZ over the operating conditions. ates rise time, fall time, overshoot and undershoot.
Figure 2. Transmitter Eye Mask Table 4. Transmitter Optical Specifications Table 5. Receiver Optical Specifications
Table 6. Electrical Characteristics Table 7. Control/Status Signal Characteristics Table 8. TD+/- Input Signal Requirements Table 9. RD+/- Output Signal Characteristics ditional inrush due to hot plugging. receiver differential serial data output RD+/-.
Figure 3. SFP Transceiver Electrical Pad Layout disengages and then followed by the sequence (1) pins. ging can be performed. See Table 10. Table 10. Pinout
TD+/TD- Transmit Data In and Inverted Transmit Data In are differential input to the transmitter. They are internally AC- coupled into an equivalent load of RI differential, as shown in Figure 13. TX_DISABLE Active high TTL input, with internal 10kW pull- up resistor to Vcc. Asserting the transmitter disable will deactivate the laser within the assert time. The truth table shown describes the state of the module, and Table 11 indicates the timing of TX_DISABLE. RD+/RD- Received Data Out and Inverted Received Data Out are differential serial output from the receiver. These are AC-coupled 100 ohm differential lines which should be terminated with a 100 ohm (differential) at the user SERDES, as shown in Figure 13. AC coupling is done inside the module and is thus not required on the host board. RX_LOS Active high open collector/drain output which indicates a loss-of-signal condition (LOS). When the aver- age optical power received by the module is below the Assert Level, RX_LOS is indicated according to the truth table below, and Table 11 indicates the timing of RX_LOS. RX_LOS requires a 4.7k-10k ohm pull-up resistor external to the module, i.e., in the host system Host_Vcc, as shown in Figure 13. The pull-up voltage is between 2.0 V and VccR(VccT) + 0.3 V. RATE_SELECT Not Connected. TX_FAULT Active high open collector/drain output which indicates a fault in the module. This can be (1) failure of the laser driver or (2) end-of-life of the laser. Under these conditions, the laser will be de- activated within the assert time. TX_FAULT also requires a 4.7k-10k ohm pull-up resistor external to the module, i.e. in the host system Host_Vcc, as shown in Figure 13. The pull-up voltage is between 2.0 V and VccT(VccR) + 0.3 V. Conditions (1) and (2) are latched, and for diagnostic pur- poses only, may be reset by toggling TX_DISABLE high for at least t_reset. See Table 11 and Figure 8. MOD_DEF[0:2] The AFCT-57V6NSZ has a serial ID func - tion which provides information about the transceiver’s capabilities, standard interfaces, manufacturer and other information, and has a digital diagnostic monitoring function, per SFF-8472 [3], which allows monitoring op - erating temperature, supply voltage, laser bias current, transmitter optical output power and optical received power in real time. These functions are provided via a two wire serial EEPROM interface. MOD_DEF[0] is connected to ground inside the module. MOD_DEF[1] is the serial clock signal input. MOD_DEF[2] is the data output/input.
The timing characteristics of the control and status line are listed in Table 11 and Figure 4 to 10. Table 11. Timing Characteristics of Control and Status I/O
Table 12. Serial ID: Data Fields - 2-Wire Address A0h
21 V 56
22 A 41
23 G 47
24 O 4F
standard interfaces, manufacturer, and other information.
Table 12. Serial ID: Data Fields - 2-Wire Address A0h (Continued)
41 F 46
42 C 43
43 T 54
47 V 56
49 N 4E
50 S 53
51 Z 5A
- These addresses are reserved for Vendor Revision.
- Data Address 63 is the Check Sum for byte 0 to byte 62 (BASE ID FIELDS).
Table 12.- Serial ID: Data Fields - 2-Wire Address A0h (Continued) EXTENDED ID FIELDS Data Address Field Size (Byte) Name of field Description of Field Context (Hex)
65 TX_DISABLE, TX_FAULT, RX_LOS 1Ah
66 1 BR, max. Unspecified 00h 67 1 BR, min. Unspecified 00h 68 16 Vendor S/N Note 3
69 Note 3
70 Note 3
71 Note 3
72 Note 3
73 Note 3
74 Note 3
75 Note 3
76 Note 3
77 Note 3
78 Note 3
79 Note 3
80 Note 3
81 Note 3
82 Note 3
83 Note 3
(ASCII code) Note 4
85 Note 4
86 Digits of Month
(ASCII code) Note 4
87 Note 4
88 Day of Month
(ASCII code) Note 4
89 Note 4
90 Vendor Specific Lot Code
(ASCII code) Note 4
91 Note 4
-Digital Diagnositic Monitoring-Inter- nally Calibrated-Average power 68h 93 1 Enchanced Option -Alarm/Warning Flags Implemented- Soft TX_FAULT and RX_LOS Monitor- ing F0h 94 1 SFF-8472 Compliance Includes Functionality Described in Rev 9.3 SFF8472 01h 95 1 CC_EXT Check code for Extended ID Fields Note 5 VENDOR SPECIFIC ID FIELDS 96-255 160 00h Notes: 3. These addresses are reserved for Vendor SN (serial number). 4. These addresses are reserved for date code information 5. Data Address 95 is the Check Sum for byte 64 to byte 94 (EXTENDED ID FIELDS).
Table 13. Diagnostic Parameters LSB Accuracy Address NoteMin. Max. Table 14. Alarm and Warning Thresholds Table 13. Each diagnostic parameter has a corresponding A2h are shown in Table 15 to 21.
Table 15. Alarm and Warning Thresholds (2-Wire Address A2h)
Table 16. Calibration constants for External Calibration Option (2-Wire Address A2h) of byte 56 is MSB. Bit 0 of byte 59 is LSB. of byte 60 is MSB. Bit 0 of byte 63 is LSB. of byte 64 is MSB, bit 0 of byte 67 is LSB. of byte 68 is MSB, bit 0 of byte 71 is LSB. of byte 72 is MSB, bit 0 of byte 75 is LSB. byte 76 is MSB, bit 0 of byte 77 is LSB. current. Bit 7 of byte 78 is MSB, bit 0 of byte 79 is LSB. power. Bit 7 of byte 80 is MSB, bit 0 of byte 81 is LSB. coupled output power. Bit 7 of byte 82 is MSB, bit 0 of byte 83 is LSB. ture. Bit 7 of byte 84 is MSB, bit 0 of byte 85 is LSB. module temperature. Bit 7 of byte 86 is MSB, bit 0 of byte 87 is LSB. voltage. Bit 7 of byte 88 is MSB, bit 0 of byte 89 is LSB. module supply voltage. Bit 7 of byte 90 is MSB. Bit 0 of byte 91 is LSB.
Table 17. A/D Values and Status Bits (2 Wire Address A2h) 96 All Temperature MSB Internally measured module temperature.
97 All Temperature LSB
98 All Vcc MSB Internally measured supply voltage in transceiver.
99 All Vcc LSB
100 All TX Bias MSB Internally measured TX Bias Current.
101 All TX Bias LSB
102 All TX Power MSB Measured TX output power.
103 All TX Power LSB
104 All RX Power MSB Measured RX input power.
105 All RX Power LSB
106 All Reserved MSB Reserved for 1st future definition of digitized analog input
107 All Reserved LSB Reserved for 1st future definition of digitized analog input
108 All Reserved MSB Reserved for 2nd future definition of digitized analog input
109 All Reserved LSB Reserved for 2nd future definition of digitized analog input
110 7 TX Disable State Digital state of the TX_DISABLE Input Pin. 110 6 Soft TX Disable Read/write bit that allows software disable of laser. 110 4 RX Rate Select State Digital state of the SFP RX Rate Select Input Pin.Not supported. 110 3 Soft RX Rate Select Read/write bit that allows software RX rate select.Not supported. 110 2 TX Fault Digital state of the TX_FAULT Output Pin. 110 1 LOS Digital state of the RX_LOS Output Pin. high until data is ready to be read at whichdevice sets the bit low.
Table 18. Alarm and Warning Flag Bits (2-Wire Address A2h)
114 All Reserved
115 All Reserved
118 All Reserved
119 All Reserved
† Latch state cleared on read, power cycle or the host toggles TX_DISABLE.
Table 19. Vendor Specific Memory Address and User EEPROM (2-Wire Address A2h) 120-127 8 Vendor Specific 00h. Table 20. Bit weights (°C) for Temperature Reporting Registers Table 21. Digital Temperature Format
Figure 11. Serial ID and Digital Diagnostic Memory Map The timing characteristics of the serial ID /DDM are listed in Table 22 and Figure 12. Table 22. Timing Characteristics of Serial ID / DDM
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Figure 15. Mounting drawing
15 MAX
11.6 REF
10 REF
- Bail delatch is colored BLUE for
SONET/Single-Mode Identification.