AFBR-700SDZ AVAGO | Alldatasheet

Document overview

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Technical content

Features

  • Avago 850nm VCSEL source and Transmitter Optical Subassembly technology
  • Avago PIN detector and Receiver Optical Subassembly technology
  • Typical power dissipation 600mW
  • Full digital diagnostic management interface
  • Avago SFP+ package design enables equipment EMI performance in high port density applications with margin to Class B limits Specifications
  • Optical interface specifications per IEEE 802.3ae 10GBASE-SR
  • Electrical interface specifications per SFF Committee SFF 8431 Specifications for Enhanced 8.5 and 10 Gigabit Small Form Factor Pluggable Module “SFP+”
  • Management interface specifications per SFF Committee SFF 8431 and SFF 8472 Diagnostic Monitoring Interface for Optical Transceivers
  • Mechanical specifications per SFF Committee SFF

8432 Improved Pluggable Formfactor “IPF”

  • LC Duplex optical connector interface confirming to ANSI TIA/EA 604-10 (FOCIS 10A)
  • Compliant to Restriction on Hazardous Substances (RoHS) per EU and China requirements
  • Class 1 Eye safe per requirements of IEC 60825-1 /CDRH

Description

The Avago AFBR-700SDZ transceiver is part of a family of SFP+ products. This transceiver utilizes Avago’s 850nm VCSEL and PIN Detector technology to provide an IEEE 10Gb Ethernet design compliant with the 10GBASE-SR standard. The AFBR-700SDZ transceiver is designed to enable 10Gb Ethernet equipment designs with very high port density based on the new electrical and mechani- cal specification enhancements to the well known SFP specifications developed by the SFF Committee. These specifications are referred to as SFP+ to recognize these enhancements to previous SFP specifications used for lower speed products. Avago Technologies is a an active participant in the SFF Committee specification develop- ment activities.

Related Products

  • AFBR-707SDZ SFP+ 10 Gigabit Ethernet 10GBASE- LRM transceiver for 220 meter operation in all MMF link applications including OM1 and OM2 legacy fiber cables and new high bandwidth OM3 fiber cables.
  • AFCT-701SDZ SFP+ 10 Gigabit Ethernet 10GBASE-LR transceiver for operation in SMF link applications to 10 km
  • AFCT-5016Z SFP+ Evaluation Board The purpose of this SFP+ evaluation board is to provide the designer with a convenient means for evaluating SFP+ fiber optic transceivers. AFBR-700SDZ 10Gb Ethernet, 850 nm, 10GBASE-SR, SFP+ Transceiver Data Sheet

The AFBR-700SDZ transceiver package is compliant with the SFF 8432 Improved Pluggable Formfactor housing specification for the SFP+. It can be installed in any INF- 8074 or SFF-8431/2 compliant Small Form Pluggable (SFP) port regardless of host equipment operating status The AFBR-700SDZ is hot-pluggable, allowing the mod- ule to be installed while the host system is operating and on-line. Upon insertion, the transceiver housing makes initial contact with the host board SFP cage, mitigating potential damage due to Electro-Static Discharge (ESD). Digital Diagnostic Interface and Serial Identification The two-wire interface protocol and signaling detail are based on SFF-8431. Conventional EEPROM memo- ry, bytes 0-255 at memory address 0xA0, is organized in compliance with SFF-8431. New digital diagnostic information, bytes 0-255 at memory address 0xA2, is compliant to SFF-8472. The new diagnostic information provides the opportunity for Predictive Failure Identifi- cation, Compliance Prediction, Fault Isolation and Com- ponent Monitoring. Predictive Failure Identification The AFBR-700SDZ predictive failure feature allows a host to identify potential link problems before system perfor- mance is impacted. Prior identification of link problems enables a host to service an application via “fail over” to a redundant link or replace a suspect device, main- taining system uptime in the process. For applications where ultra-high system uptime is required, a digital SFP provides a means to monitor two real-time laser metrics associated with observing laser degradation and pre- dicting failure: average laser bias current (Tx_Bias) and average laser optical power (Tx_Power). Compliance Prediction Compliance prediction is the ability to determine if an optical transceiver is operating within its operating and environmental requirements. AFBR-700SDZ devices provide real-time access to transceiver internal supply voltage and temperature, allowing a host to identify po- tential component compliance issues. Received optical power is also available to assess compliance of a cable plant and remote transmitter. When operating out of re- quirements, the link cannot guarantee error free trans- mission. Fault Isolation The fault isolation feature allows a host to quickly pin- point the location of a link failure, minimizing downtime. For optical links, the ability to identify a fault at a local device, remote device or cable plant is crucial to speed- ing service of an installation. AFBR-700SDZ real-time monitors of Tx_Bias, Tx_Power, Vcc, Temperature and Rx_Power can be used to assess local transceiver current operating conditions. In addition, status flags TX_DIS- ABLE and Rx Loss of Signal (LOS) are mirrored in memory and available via the two-wire serial interface. Component Monitoring Component evaluation is a more casual use of the AFBR- 700SDZ real-time monitors of Tx_Bias, Tx_Power, Vcc, Temperature and Rx_Power. Potential uses are as debug- ging aids for system installation and design, and trans- ceiver parametric evaluation for factory or field quali- fication. For example, temperature per module can be observed in high density applications to facilitate ther- mal evaluation of blades, PCI cards and systems. Description, continued

Figure 1. Transceiver functional diagram (address A2h, byte 110, bit 7).

The receiver section includes the Receiver Optical Sub- Assembly (ROSA) and the amplification/quantization cir- cuitry. The ROSA, containing a PIN photodiode and cus- tom transimpedance amplifier, is located at the optical interface and mates with the LC optical connector. The ROSA output is fed to a custom IC that provides post- amplification and quantization. Receiver Loss of Signal (Rx_LOS) The post-amp IC also includes transition detection cir- cuitry which monitors the AC level of incoming optical signals and provides a LVTTL/CMOS compatible status signal to the host. A high status signal indicates loss of modulated signal, indicating link failures such as broken fiber or failed transmitter. Rx_LOS can also be monitored via the two-wire serial interface(address A2h, byte 110, bit 1). Functional Data I/O The AFBR-700SDZ interfaces with the host circuit board through the twenty contact SFP+ electrical connector. See Table 2 for contact descriptions. The module edge connector is shown in Figure 4. The host board layout for this interface is depicted in Figure 8. The AFBR-700SDZ high speed transmit and receive in- terfaces require SFF-8431 compliant signal lines on the host board. To simplify board requirements, biasing re- sistors and AC coupling capacitors are incorporated into the SFP+ transceiver module (per SFF-8431) and hence are not required on the host board. The TX_DISABLE, TX_FAULT and RX_LOS signals require LVTTL signals on the host board (per SFF-8431) if used. If an application does not take advantage of these functions, care must be taken to ground TX_DISABLE to enable normal op- eration. Figure 2 depicts the recommended interface circuit to link the AFBR-700SDZ to supporting physical layer ICs. Timing for the dedicated SFP+ control signals imple- mented in the transceiver are listed in Figure 6. Application Support An Evaluation Kit and Reference Designs are available to assist in evaluation of the AFBR-700SDZ. Please contact your local Field Sales representative for availability and ordering details. Caution There are no user serviceable parts nor maintenance requirements for the AFBR-700SDZ. All mechanical ad- justments are made at the factory prior to shipment. Tampering with, modifying, misusing or improperly han- dling the AFBR-700SDZ will void the product warranty. It may also result in improper operation and possibly over- stress the laser source. Performance degradation or de- vice failure may result. Connection of the AFBR-700SDZ to a light source not compliant with IEEE Std. 802.3ae Clause 52 and SFF-8341 specifications, operating above maximum operating conditions or in a manner inconsis- tent with it’s design and function may result in exposure to hazardous light radiation and may constitute an act of modifying or manufacturing a laser product. Persons performing such an act are required by law to recertify and re-identify the laser product under the provisions of U.S. 21 CFR (Subchapter J) and TUV. Customer Manufacturing Processes This module is pluggable and is not designed for aque- ous wash, IR reflow, or wave soldering processes.

Ordering Information

Please contact your local field sales engineer or one of Avago Technologies franchised distributors for ordering information. For technical information, please visit Ava- go Technologies’ WEB page at www.avagotech.com For information related to SFF Committee documentation visit www.sffcommittee.org.

Electromagnetic Interference (EMI) Equipment incorporating 10 gigabit transceivers is typically subject to regulation by the FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The AFBR-700SDZ enables equipment compli- ance to these standards detailed in Table 1. The metal housing and shielded design of the AFBR-700SDZ mini- mizes the EMI challenge facing the equipment designer. For superior EMI performance it is recommended that equipment designs utilize SFP+ cages per SFF 8432. RF Immunity (Susceptibility) Due to its shielded design, the EMI immunity of the AFBR-700SDZ exceeds typical industry standards. Eye Safety The AFBR-700SDZ provides Class 1 (single fault tolerant) eye safety by design and has been tested for compliance with the requirements listed in Table 1. The eye safety circuit continuously monitors the optical output power level and will disable the transmitter upon detecting a condition beyond the scope of Class 1 certification Such conditions can be due to inputs from the host board (Vcc fluctuation, unbalanced code) or a fault within the transceiver. US CDRH and EU TUV certificates are listed in table 1. Flammability The AFBR-700SDZ optical transceiver is made of metal and high strength, heat resistant, chemical resistant and UL 94V-0 flame retardant plastic. Regulatory Compliance The AFBR-700SDZ complies with all applicable laws and regulations as detailed in Table 1. Certification level is de- pendent on the overall configuration of the host equip- ment. The transceiver performance is offered as a figure of merit to assist the designer. Electrostatic Discharge (ESD) The AFBR-700SDZ is compatible with ESD levels found in typical manufacturing and operating environments as described in Table 1. In the normal handling and op- eration of optical transceivers, ESD is of concern in two circumstances. The first case is during handling of the transceiver prior to insertion into an SFP compliant cage. To protect the device, it’s important to use normal ESD handling pre- cautions. These include use of grounded wrist straps, work-benches and floor wherever a transceiver is han- dled. The second case to consider is static discharges to the exterior of the host equipment chassis after installation. If the optical interface is exposed to the exterior of host equipment cabinet, the transceiver may be subject to system level ESD requirements.

Table 1. Regulatory Compliance contacted by a Human Body Model probe. with device inserted into a panel. Interference (EMI) CENELEC EN55022 Class B board and chassis design.

  1. The module signal grounds are isolated from the module case.
  2. This is an open collector/drain output that on the host board requires a 4.7 kΩ to 10 kΩ pullup resistor to VccHost. See Figure 2.
  3. This input is internally biased high with a 4.7 kΩ to 10 kΩ pullup resistor to VccT.
  4. Two-Wire Serial interface clock and data lines require an external pullup resistor dependent on the capacitance load.
  5. This is a ground return that on the host board requires a 4.7 kΩ to 10 kΩ pullup resistor to VccHost.

Table 2. Contact Description

1 VeeT Transmitter Signal Ground Note 1

2 TX_FAULT Transmitter Fault (LVTTL-O) – High indicates a fault condition Note 2

3 TX_DISABLE Transmitter Disable (LVTTL-I) – High or open disables the transmitter Note 3

4 SDA Two Wire Serial Interface Data Line (LVCMOS – I/O)

5 SCL Two Wire Serial Interface Clock Line (LVCMOS – I/O)

6 MOD_ABS Module Absent (Output), connected to VeeT or VeeR in the module Note 5

7 RS0 Rate Select 0 - Not used, Presents high input impedance.

8 RX_LOS Receiver Loss of Signal (LVTTL-O) Note 2

9 RS1 Rate Select 1 - Not used, Presents high input impedance.

10 VeeR Receiver Signal Ground Note 1

11 VeeR Receiver Signal Ground Note 1

12 RD- Receiver Data Out Inverted (CML-O)

13 RD+ Receiver Data Out (CML-O)

14 VeeR Receiver Signal Ground

17 VeeT Transmitter Signal Ground Note 1

18 TD+ Transmitter Data In (CML-I)

19 TD- Transmitter Data In Inverted (CML-I)

20 VeeT Transmitter Signal Ground Note 1

Figure 4. Module edge connector contacts

Table 3. Absolute Maximum Ratings mum Ratings for extended periods can adversely affect reliability.

  1. The module supply voltages, VccT and VccR must not differ by more than 0.5 V or damage to the device may occur.

Table 4. Recommended Operating Conditions

  1. Ambient operating temperature limits are based on the Case Operating Temperature limits and are subject to the host system thermal design.

See Figure 7 for the module Tc reference point.

Table 6. High Speed Signal Electrical Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.

  1. Internally AC coupled and terminated (100 Ohm differential).
  2. Internally AC coupled but requires an external load termination (100 Ohm differential).
  3. Maximum reflection coefficient is expressed as SDD11 = -8 + 13.33 Log10(f/5.5), for f in GHz.
  4. Maximum reflection coefficient is expressed as SDD22 = -8 + 13.33 Log10(f/5.5), for f in GHz.
  5. The RMS value is measured by calculating the standard deviation of the histogram for one UI of the common mode signal.

Table 5. Low Speed Signal Electrical Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.

  1. Supply current includes both VccT and VccR connections.
  2. Measured with a 4.7 k Ω load to VccHost.
  3. TX_DISABLE has an internal 4.7 kΩ to 10 kΩ pull-up to VccT

Table 7. Two-Wire Interface Electrical Characteristics

  1. Rp is the pull up resistor. Active bus termination may be used by the host in place of a pullup resistor. Pull ups can be connected to various

the module to sink more than 3.0 mA current.

  1. Ci is the capacitance looking into the module SCL and SDA contacts
  2. Cb is the total bus capacitance on the SCL or SDA bus.

Table 8. Optical Specifications The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.

  1. IEEE 802.3ae Clause 52 compliant.
  2. These parameters are interrelated: see IEEE 802.3ae, Clause 52.
  3. See Table 9. Trade-offs are available among spectral width, center wavelength, and minimum optical modulation amplitude.
  4. The 10GBASE-SR launch power shall be the lesser of the Class 1 safety limit as defined in IEEE 802.3ae 52.10.2 or the average receive power

maximum defined by IEEE 802.3ae -2002 Table 52-9.

  1. The transceiver’s launch condition meets the requirement of 10 Gigabit Ethernet multimode fiber as detailed in TIA 492AAAC.
  2. Vertical eye closure penalty and Stressed eye jitter are test conditions for Stressed sensitivity (OMA) measurements.

Table 9. Minimum Optical Modulation Amplitude

Table 10. Control Functions: Low Speed Signals Timing Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.

  1. Time from rising edge of TX_DISABLE to when the optical output falls below 10% of nominal. A 10 ms interval between assertions of TX_
  2. Time from falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal.
  3. Time from power on or falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal and the Two-Wire
  4. From power on or negation of TX_FAULT using TX_DISABLE.
  5. Time TX_DISABLE must be held high to reset the laser fault shutdown circuitry.
  6. Time from loss of optical signal to Rx_LOS Assertion.
  7. Time from valid optical signal to Rx_LOS De-Assertion.

Table 11. Control Functions: Two-Wire Interface Timing Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.

  1. Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10% of nominal. Measured

from falling clock edge after stop bit of write transaction.

  1. Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises above 90% of
  2. Time from fault to two-wire interface TX_FAULT (A2h, byte 110, bit 2) asserted.
  3. Time for two-wire interface assertion of Rx_LOS (A2h, byte 110, bit 1) from loss of optical signal.
  4. Time for two-wire interface de-assertion of Rx_LOS (A2h, byte 110, bit 1) from presence of valid optical signal.
  5. From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functional.
  6. Time from power on until module is ready for data transmission over the two-wire interface (reads or writes over A0h and A2h).
  7. Time from stop bit to completion of a 1-8 byte write command. Measured from the stop bit, for a one t om four byte write the maximum cycle

time is 40ms and for a five to eight byte write the maximum cycle time is 80ms.

  1. Between STOP and START. See SFF 8431 Section 4.3

Table 12. Transceiver Digital Diagnostic Monitor (Real Time Sense) Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C. VccT and VccR = 3.3 V. Transceiver Internal Temperature T INT ±3.0 °C Temperature is measured internal to the transceiver. Accuracy Valid from = -10°C to 85°C case temperature. voltage at the VccT contact. Valid over 3.3 V ± 10%. Transmitter Laser DC Bias Current I INT ±10 % I INT accuracy is better than ±10% of the nominal value. Output Power Accuracy fiber. Valid from100 µW to 500 µW. Power Accuracy fiber. Valid from 77 µW to 500 µW. Figure 6. Transceiver timing diagrams (module installed and power applied except where noted)

  1. The IEEE Organizationally Unique Identifier (OUI) assigned to Avago Technologies is 00-17-6A (3 bytes of hex).
  2. Laser wavelength is represented in 16 unsigned bits. The hex representation of 850 (nm) is 0352.
  3. Addresses 63 and 95 are checksums calculated (per SFF-8472) and stored prior to product shipment.
  4. Addresses 68-83 specify the AFBR-700SDZ ASCII serial number and will vary on a per unit basis.
  5. Addresses 84-91 specify the AFBR-700SDZ ASCII date code and will vary on a per date code basis.

Table 13. EEPROM Serial ID Memory Contents – Conventional SFP Memory (Address A0h) 27 20 “ ” - Vendor Name ASCII character 64 00 Receiver limiting output. 1 Watt power class.

Table 14. EEPROM Serial ID Memory Contents – Enhanced Feature Set Memory (Address A2h)

0 Temp H Alarm MSB [1] 26 Tx Pwr L Alarm MSB [4] 104 Real Time Rx Pwr MSB[5]

1 Temp H Alarm LSB [1] 27 Tx Pwr L Alarm LSB [4] 105 Real Time Rx Pwr LSB[5]

2 Temp L Alarm MSB [1] 28 Tx Pwr H Warning MSB[4] 106 Reserved

3 Temp L Alarm LSB [1] 29 Tx Pwr H Warning LSB[4] 107 Reserved

4 Temp H Warning MSB[1] 30 Tx Pwr L Warning MSB[4] 108 Reserved

5 Temp H Warning LSB[1] 31 Tx Pwr L Warning LSB[4] 109 Reserved

6 Temp L Warning MSB[1] 32 Rx Pwr H Alarm MSB [5] 110 Status/Control

7 Temp L Warning LSB[1] 33 Rx Pwr H Alarm LSB [5] 111 Reserved

8 Vcc H Alarm MSB [2] 34 Rx Pwr L Alarm MSB [5] 112 Flag Bits - See Table 16

9 Vcc H Alarm LSB [2] 35 Rx Pwr L Alarm LSB [5] 113 Flag Bits - See Table 16

10 Vcc L Alarm MSB [2] 36 Rx Pwr H Warning MSB[5] 114 Reserved

11 Vcc L Alarm LSB [2] 37 Rx Pwr H Warning LSB[5] 115 Reserved

12 Vcc H Warning MSB[2] 38 Rx Pwr L Warning MSB[5] 116 Flag Bits - See Table 16

13 Vcc H Warning LSB[2] 39 Rx Pwr L Warning LSB[5] 117 Flag Bits - See Table 16

14 Vcc L Warning MSB[2] 40-55 Reserved 118-127 Reserved

15 Vcc L Warning LSB[2] 56-94 External Calibration Constants [6] 128-247 Customer Writeable

16 Tx Bias H Alarm MSB [3] 95 Checksum for Bytes 0-94 [7] 248-255 Vendor Specific

17 Tx Bias H Alarm LSB [3] 96 Real Time Temperature MSB[1]

18 Tx Bias L Alarm MSB [3] 97 Real Time Temperature LSB[1]

19 Tx Bias L Alarm LSB [3] 98 Real Time Vcc MSB[2]

20 Tx Bias H Warning MSB[3] 99 Real Time Vcc LS[2]

21 Tx Bias H Warning LSB[3] 100 Real Time Tx Bias MSB[3]

22 Tx Bias L Warning MSB[3] 101 Real Time Tx Bias LSB[3]

23 Tx Bias L Warning LSB[3] 102 Real Time Tx Power MSB[4]

24 Tx Pwr H Alarm MSB [4] 103 Real Time Tx Power LSB[4]

25 Tx Pwr H Alarm LSB [4]

  1. Temperature (Temp) is decoded as a 16 bit signed twos compliment integer in increments of 1/256°C.
  2. Supply Voltage (Vcc) is decoded as a 16 bit unsigned integer in increments of 100 µV.
  3. Laser bias current (Tx Bias) is decoded as a 16 bit unsigned integer in increments of 2 µA.
  4. Transmitted average optical power (Tx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 µW.
  5. Received average optical power (Rx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 µW.
  6. Bytes 56-94 are not intended for use with AFBR-700SDZ, but have been set to default values per SFF-8472.
  7. Byte 95 is a checksum calculated (per SFF-8472) and stored prior to product shipment.

Table 15. EEPROM Serial ID Memory Contents – Soft Commands (Address A2h, Byte 110)

7 TX_ DISABLE State Digital state of SFP TX_ DISABLE Input (1 = TX_DISABLE asserted) Note 1

6 Soft TX_ DISABLE Read/write bit for changing digital state of TX_DISABLE function Note 1, 2

5 Reserved

4 Reserved

3 Reserved

2 TX_FAULT State Digital state of the SFP TX_FAULT Output (1 = TX_FAULT asserted) Note 1

1 RX_LOS State Digital state of the SFP RX_LOS Output (1 = RX_LOS asserted) Note 1

  1. The response time for soft commands of the AFBR-700SDZ is 100 msec as specified by SFF-8472.
  2. Bit 6 is logic OR’d with the SFP TX_DISABLE input on contact 3; either asserted will disable the SFP+ transmitter.

Table 16. EEPROM Serial ID Memory Contents – Alarms and Warnings (Address A2h, Bytes 112, 113, 116, 117)

6 Temp Low Alarm Set when transceiver internal temperature exceeds low alarm threshold

5 Vcc High Alarm Set when transceiver internal supply voltage exceeds high alarm threshold

4 Vcc Low Alarm Set when transceiver internal supply voltage exceeds low alarm threshold

3 Tx Bias High Alarm Set when transceiver laser bias current exceeds high alarm threshold

2 Tx Bias Low Alarm Set when transceiver laser bias current exceeds low alarm threshold

1 Tx Power High Alarm Set when transmitted average optical power exceeds high alarm threshold

0 Tx Power Low Alarm Set when transmitted average optical power exceeds low alarm threshold

6 Rx Power Low Alarm Set when received average optical power exceeds low alarm threshold

6 Temp Low Warning Set when transceiver internal temperature exceeds low warning threshold

5 Vcc High Warning Set when transceiver internal supply voltage exceeds high warning threshold

4 Vcc Low Warning Set when transceiver internal supply voltage exceeds low warning threshold

3 Tx Bias High Warning Set when transceiver laser bias current exceeds high warning threshold

2 Tx Bias Low Warning Set when transceiver laser bias current exceeds low warning threshold

1 Tx Power High Warning Set when transmitted average optical power exceeds high warning threshold

0 Tx Power Low Warning Set when transmitted average optical power exceeds low warning threshold

6 Rx Power Low Warning Set when received average optical power exceeds low warning threshold

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Figure 7. Module drawing