AEAT-9000-1GSH0 AVAGO | Alldatasheet

Document overview

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Technical content

Features

  • 17-bit absolute single turn output (131072 absolute positions over 360°)
  • 2 channel true differential Sine/Cosine outputs with 2048 cycles per revolution
  • 2048 CPR A/B channel incremental digital output
  • Interface output is SSI (2wire SSI / 3wire SSI) with RS485 line transceiver or single ended option
  • On-chip interpolation and code correction compensate for mounting tolerance
  • Selectable direction for Up/Down position counter
  • Electrical alignment output for tilt and locate
  • Built-in monitor track for monitoring of LED light level
  • Error output for LED degradation
  • -40 to 115° C operating temperature

Applications

Typical applications include

  • Rotary applications up to 17 bits/360° absolute position
  • Integration into servo motors
  • Industrial and maritime valve control
  • High precision test and measurement machines
  • Industrial and factory automation equipments
  • Textile, woodworking & packaging machineries
  • Nacelle & blades control in wind turbine

Parameter Symbol Min. Max. Units Storage Temperature TS -40 85 °C Operating Temperature TA -40 115 °C Supply Voltage VDD -0.3 6 V Voltages at all input and output pins Vin & Vout -0.3 VDD+0.3 V Note: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The tables “Recommended Operating Conditions and Characteristics” provide conditions for actual device operation. Recommended Operating Conditions Description Symbol Min. Typical Max. Units Notes Temperature TA -40 25 115 °C Supply Voltage VDD 4.5 5 5.5 V Ripple < 100 mVpp Input-H-Level Threshold Vih 2.0 VDD V Input-H-Level threshold Input-L-Level Threshold Vil 0 0.8 V Input-L-Level threshold Electrical Characteristics Table (VDD = 4.5 to 5.5 V, TA = -40 to +115° C) Electrical characteristics over recommended operating conditions. Typical values at 25° C Parameters Symbol Conditions Min. Typ. Max. Units Operating Currents Total Current ITotal LED current @10 mA typ 94 mA Digital Inputs Pull Up Current Ipu Room Temperature -106 -60 -35 µA Pull down Current Ipd Room Temperature -108 -56 -31 µA Digital Outputs Ouput-H-Level Voh Ioh = 2 mA VDD- 0.5V VDD V Output-L-Level Vol Iol = -2mA 0 0.5 V SSI Serial Interface SCL Clock Frequency (3wire SSI) fclock 10 MHz SCL clock Frequency (2wire SSI) fclock 1.5 MHz Duty Cycle fclock Tclock,LH fclock = 10 MHz 0.4 0.6 Gray Code Monotony Error (1) fclock = 5 MHz, RPM = 100

1 Error step

SPI_Clock t clock 100 kHZ

Figure 5. TiltOut signal in alignment mode. pin will be pulled to logic High. signal calibration is done with LED regulation turned off. sin/cosine with 2.5 V offset. pulled to high. By default it will be low once powered on. SCL clock frequency is up to 10 MHz. low. Please refer to timing diagram on Figure 1. tion of the code disc or LED degradation. comes with 2 channel incremental output with 2048CPR. kHz without much degradation on the Vpp amplitude. provide an output to perform alignment. address 0x1b to enable changes on the register setting. This is needed every time the device is power on.

Pin out Descriptions (Serial SSI 2/3wire option) No. Pin Name Description Function Notes

1 COSINE+ Analog Output Diff Cosine+ analog output CMOS, analog out

2 COSINE- Analog Output Diff Cosine- analog output CMOS, analog out

3 SINE+ Analog Output Diff SINE+ analog output CMOS, analog out

4 SINE- Analog Output Diff SINE- analog output CMOS, analog out

5 TiltOut Digital Output Tilt alignment output CMOS

6 GND Ground for supply voltage Connect ground

7 LocTest Analog Output Alignment locate signal CMOS, analog out

8 GND Ground for Supply Voltage Connect ground

9 NC Not use

10 MSBINV Digital Input Inverted counting CMOS, internal pd

11 SPI_CLK Digital Input SPI clock input CMOS, internal pu

12 Zero_RST Digital Input Pull down to zero the absolute position CMOS, internal pu

13 SPI_SI Digital Input SPI data input CMOS, internal pd

14 NSL+ Digital Input NSL + Differential (for 3wire SSI only) [1]

15 SPI_SO Digital Output SPI data output CMOS

16 NSL- Digital Input NSL- Differential (for 3wire SSI only) [1]

17 GND Ground for Supply Voltage Connect ground

18 GND Ground for Supply Voltage Connect ground

19 INCB Digital Output B Digital output CMOS

20 DOUT- Digital Output DOUT- Differential DOUT (for 3wire/2wire SSI)

21 INCA Digital Output A Digital output CMOS

22 DOUT+ Digital Output DOUT+ Differential DOUT (for 3wire/2wire SSI)

23 DIN- Digital Input DIN- Differential (for cascading use only)

24 LERR Digital Output ERROR pin, error(=1)/no error(=0) CMOS

25 DIN+ Digital Input DIN+ Differential (for cascading use only)

26 nRST Digital Output Chip Reset CMOS, internal pu

27 VDD Supply Voltage +5 V Supply

28 SCL+ Digital Input SCL+ Differential clock (for 3wire/2wire SSI)

29 VDD Supply Voltage +5 V Supply

30 SCL- Digital Input SCL- Differential clock (for 3wire/2wire SSI)

Note: 1. For 2 wire SSI application, connect the NSL+ pin to ground before power on and NSL- to high at 5V before power on.

For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2014 Avago Technologies. All rights reserved. AV02-3130EN - October 30, 2014 Mechanical Dimensions Notes: 1. All dimensions are in millimeter. 2. Tolerance: X.X ± 0.10mm. 3. Code disk and readhead mounting tolerances for radial, tangential and gap are as below Radial : +/-50 µm (inclusive shaft eccentricity) Tangential : +/-100 µm (inclusive shaft eccentricity) Gap : 150 to 300 µm 4. Recommended mounting screw:- Socket Head cap screw, M2.5 (ISO 4762) Flat Washer, M2.5 (ISO 7092)

Ordering Information

T – High Temp H - 17 bits G = Gray code 24.9 9.7 14.517.50 ±0.05 37.10 ±0.05 46.0 Ø 3.10 + 0.05 0 (2X) Ø 8.000 + 0.010 0 (Hub ID) Ø 56.0 Ø 42.0 Readhead Codedisc 2X15 /uniF6BB 1.27 pitch pin header 19.05 ±0.3 20.45 ±0.3 17.45 ±0.3 15.9 ±0.1 12.950 0 /uniF6BB 0.050 (Codedisc)

13.100 Min (Reticle)

HEDS-8949 - Alignment kit for AEAT-9000-1GSH0