ADNS-2620

ADNS-2620 AVAGO | Alldatasheet

Document overview

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• PDF pages: 27

Technical content

Features

• Precise optical navigation technology
• Small form factor (10 mm x 12.5 mm footprint)
• No mechanical moving parts
• Complete 2D motion sensor
• Common interface for general purpose controller
• Smooth surface navigation
• Programmable frame speed up to 3000 frames per sec (fps)
• Accurate motion up to 12 ips
• 400 cpi resolution
• High reliability
• High speed motion detector
• Wave solderable
• Single 5.0 volt power supply
• Conforms to USB suspend mode specifications
• Power conservation mode during times of no move- ment
• Serial port registers – Programming – Data transfer
• 8-pin staggered dual inline package (DIP)

Applications

• Mice for desktop PC’s, workstations, and portable PC’s
• Trackballs
• Integrated input devices

1 OSC_IN Oscillator input

2 OSC_OUT Oscillator output

3 SDIO Serial Port Data (input and output)

4 SCK Serial Port Clock (Input)

5 LED_CNTL Digital Shutter Signal Out

6 GND System Ground

7 VDD 5V DC Input

8 REFA Internal reference

Figure 2. Package outline drawing. Figure 1. Mechanical drawing: top view. of this component to prevent damage and/or degradation which may be induced by ESD.

into the reference point of mechanical cutouts. mounted onto defined features on the base plate. stop and features on the package that align to the lens. events that occur at the opening of the base plate. The HDNS-2200 clip holds the LED in relation to the lens. to the alignment features on the base plate. The HLMP-ED80-xx000 is recommended for illumination. illumination can be guaranteed. Figure 5. Exploded view drawing. Figure 3. Recommended PCB mechanical cutouts and spacing. Figure 4. 2D assembly drawing of ADNS-2620 shown with the HLMP-ED80 Figure 6. Block diagram of ADNS-2620 optical mouse sensor.

5 VOLT

1. Insert the sensor and all other electrical components

the reference point of mechanical cutouts.

1. Bend the LED leads 90° and then insert the LED into
2. Insert the LED/clip assembly into PCB.
3. Wave solder the entire assembly in a no-wash solder

remove the kapton tape during wave soldering).

1. Place the lens onto the base plate.
2. Remove the protective kapton tape from optical

held vertically for the kapton removal process.

1. Insert PCB assembly over the lens onto the base plate

erture ring should self-align to the lens.

1. The optical position reference for the PCB is set by the
2. Install mouse top case. There MUST be a feature in

file and HDNS-2100 lens flange. Figure 7. Sectional view of PCB assembly highlighting optical mouse components (optical mouse sensor, clip, lens, LED, PCB and base plate).

Figure 8. Circuit block diagram for a typical corded optical mouse using an Avago ADNS-2620 optical mouse sensor.

6 MHz

24 MHz

• Caps for pins 6,7 and 8 to ground MUST have trace lengths LESS than 5 mm.
• The 0.1 uF caps must be ceramic.
• Caps should have less than 5 nH of self inductance
• Caps should have less than 0.2 ohms ESR
• Surface mount parts are recommended Regulatory Requirements
• Passes FCC B and worldwide analogous emission limits when assembled into a mouse with unshielded cable and following Avago recommendations.
• Passes EN61000-4-4/IEC801-4 EFTB tests when assem- bled into a mouse with shielded cable and following Avago recommendations.
• UL flammability level UL94 V-0.
• Provides sufficient ESD creepage/clearance distance to avoid discharge up to 15 kV when assembled into a mouse according to usage instructions above.
• For eye safety consideration, please refer to the tech- nical report available on the web site at www.Avago. com/semiconductors.

Parameter Symbol Minimum Maximum Units Notes Storage Temperature TS -0 8 °C Operating Temperature TA -1 °C Lead Solder Temp 0 °C For 10 seconds, 1. mm below seating plane Supply Voltage VDD -0. . V ESD KV All pins, human body model MIL 88 Method 01 Input Voltage VIN -0. VDD +0. V SDIO, CLK, LED_CNTL Input Voltage VIN -0. . V OSC_IN, OSC_OUT, REFA Recommended Operating Conditions Parameter Symbol Minimum Typical Maximum Units Notes Operating Temperature TA 0 0 °C Power Supply Voltage VDD .1 .0 . Volts Register values retained for voltage transients below .10V but greater than .9V Power Supply Rise Time VRT 100 ms Supply Noise VN 100 mV Peak to peak within 0-100 MHz bandwidth Clock Frequency fCLK .0 .0 .0 MHz Set by ceramic resonator Serial Port Clock Frequency SCLK fCLK/1 MHz Resonator Impedance XRES Ω Distance from Lens Reference Z . . . mm Results in ±0. mm DOF Plane to Surface (See Figure 9) Speed S 0 1 in/sec @ frame rate = 100 fps Acceleration A 0. g @ frame rate = 100 fps Light Level onto IC IRRINC 80 ,000 mW/m λ = 9 nm 100 0,000 λ = 87 nm SDIO Read Hold Time tHOLD 100 µs Hold time for valid data (Refer to Figure ) SDIO Serial Write-write Time tSWW 100 µs Time between two write commands (Refer to Figure ) SDIO Serial Write-read Time tSWR 100 µs Time between write and read operation (Refer to Figure ) SDIO Serial Read-write Time tSRW 0 ns Time between read and write operation (Refer to Figure 7) SDIO Serial Read-read Time tSRR 0 ns Time between two read commands (Refer to Figure 7) Data Delay after PD deactivated tCOMPUTE .1 ms After tCOMPUTE, all registers contain data from first image after wakeup from Power-Down mode. Note that an additional 7 frames for AGC stabilization may be required if mouse movement occurred while Power Down. (Refer to Figure 10) SDIO Write Setup Time tSETUP 0 ns Data valid time before the rising of SCLK (Refer to Figure 0) Frame Rate FR 100 00 frames/s See Frame_Period register section

Figure 9. Distance from lens reference plane to surface. Electrical Characteristics over recommended operating conditions. Typical values at °C, VDD = V, MHz, 100 fps.

Electrical Characteristics over recommended operating conditions. Typical values at °C, VDD = V, MHz, 100 fps. Parameter Symbol Min. Typ. Max. Units Notes Supply Current (mouse moving) IDD AVG 1 0 mA Supply Current (mouse not moving) IDD 1 mA Power Down Mode Current IDDPD 170 0 µA SCK pin Input Low Voltage VIL 0.8 V Input High Voltage VIH .0 V Input Capacitance CIN 10 pF Input Resistance RIN 1 MΩ SDIO pin VDD= V, Load = 0 pF , 80n s rise & fall Input Low Voltage VIL 0.8 V Input High Voltage VIH .0 V Output Low Voltage VOL 0. V Output High Voltage VOH 0.8 * VDD V Drive Low Current IL .0 mA Drive High Current IH .0 mA Input Capacitance CIN 10 pF Input Resistance RIN 1 MΩ LED_CNTL pin Output Low Voltage VOL 0.1 V Output High Voltage VOH 0.8 * VDD V Drive Low Current IL 0 µA Drive High Current IH 0 µA OSC_IN Input Resistance RIN 00 kΩ Input Capacitance CIN 1 pF Input High Voltage VIH . V External clock source Input Low Voltage VIL 0.8 V External clock source

sent. Otherwise, the sensor may go into a hang-up state). remain during power-down mode. Figure 13. Power-down configuration register writing operation. cuitry into a no current state. Figure 12. Power-down timing. The address of the configuration register is 1000000. Assume that the original content of the configuration register is 0x00.

1 A6 A5 A4 A3 D5 D4 D3 D2 D1 D0

Figure 19. Write operation. 2620 never initiates data transfers. the master (the microcontroller). 2620 reads SDIO on rising edges of SCK.

1 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0

Figure 20. SDIO setup and hold times SCK pulse width.

Figure 24. SDIO Hi-z state and timing. hold the D0 state on SDIO until a falling edge of SCK. line will go into the Hi-Z state.

1. The ADNS-2620 and the microcontroller might get out

droops or microcontroller firmware flaws.

1. The ADNS-2620 has a transaction timer for the serial

– Writing to an invalid address will have no effect.

1. Collision detection on SDIO

not cause any communication difficulties).

1. In case of synchronization failure, both the ADNS-2620
2. The microcontroller can verify a successful write opera-

and comparing the written data to the read data.

1. The microcontroller can verify the synchronization of

from status register (Address: 0x41). to the ADNS-2620 is operational. write depending upon the state). the ADNS-2620 already has the first bit of an address. is wrong, the data sent back will be incorrect. the wrong data written to the wrong address. Figure 28. Power-up serial port sequence.

the ADNS-2620 will be in sync with the microprocessor. valid value for the chip to function. mode in the previous section.

1. The microcontroller starts the transaction by sending a

Configuration Register to reset it.

1. The digital section is now ready to go. It takes 3 frames for

the analog section to settle. Figure 29. Power-up serial port timer sequence. Figure 30. ADNS-2620 soft reset sequence timing. Figure 31. Soft reset configuration register writing operation.

1 A 6 A5 A4 A3 D5 D4 D3 D2 D1 D0

The ADNS-2620 can be programmed through registers, via the serial port, and configuration and motion data can be read from these registers. Register Address Notes Configuration 0x40 Reset, Power Down, Forced Awake, etc Status 0x41 Product ID, Mouse state of Asleep or Awake Delta_Y 0x42 Y Movement Delta_X 0x43 X Movement SQUAL 0x44 Measure of the number of features visible by the sensor Maximum_Pixel 0x45 Minimum_Pixel 0x46 Pixel_Sum 0x47 Pixel Data 0x48 Actual picture of surface Shutter_Upper 0x49 Shutter_Lower 0x4A Frame Period 0x4B

Configuration Address: 0x40 Access: Read/Write Reset Value: 0x00 Bit 7 1 0 Field C7 C C C C C C1 C0 Data Type: Bit field USAGE: The Configuration register allows the user to change the configuration of the sensor. Shown below are the bits, their default values, and optional values. Field Name Description C7 Reset 0 = No effect 1 = Reset the part C Power down 0 = Normal operation 1 = power down all analog circuitry C LED Shutter Mode 0= Shutter mode off (LED always on even if no motion up to 1 sec) 1= Shutter mode on (LED only on when electronic shutter is open) C – C1 Reserved C0 Forced Awake Mode 0 = Normal, fall asleep after one second of no movement (1500 frames/s) 1 = Always awake Status Address: 0x41 Access: Read Reset Value: 0x41 Bit 7 1 0 Field ID ID1 ID0 Reserved Reserved Reserved Reserved Awake Data Type: Bit Field USAGE: Status information and type of mouse sensor, current state of the mouse. Field Name Description ID - ID0 Product ID (010 for ADNS-0) Reserved Reserved for future Awake Mouse State 0 = Asleep 1 = Awake

Delta_Y Address: 0x42 Access: Read Reset Value: 0x00 Bit 7 1 0 Field Y7 Y Y Y Y Y Y1 Y0 Data Type: Eight bit ’s complement number. USAGE: Y movement is counted since last report. Absolute value is determined by resolution. Reading clears the register. Delta_X Address: 0x43 Access: Read Reset Value: 0x00 Bit 7 1 0 Field X7 X X X X X X1 X0 Data Type: Eight bit ’s complement number. USAGE: X movement is counted since last report. Absolute value is determined by resolution. Reading clears the register

dependent on focus distance. Data Type: Upper 8 bits of a 9-bit integer. USAGE: SQUAL (Surface QUALity) is a measure of the number of features visible by the sensor in the current frame. Number of Features = SQUAL Register Value x . The maximum value is . Since small changes in the current frame can result in changes in SQUAL, variations in SQUAL when looking at a surface are expected. Figure 32. Typical Mean SQUAL vs. z

Maximum_Pixel Address: 0x45 Access: Read Reset Value: 0x00 Bit 7 1 0 Field 0 0 MP MP MP MP MP1 MP0 Data Type: Six bit number. USAGE: Maximum Pixel value in current frame. Minimum value = 0, maximum value = . The maximum pixel value may vary from frame to frame. Shown below is a graph of 0 sequentially acquired maximum pixel values, while the sensor was moved slowly over white paper. Minimum_Pixel Address: 0x46 Access: Read Reset Value: 0x3f Bit 7 1 0 Field 0 0 MP MP MP MP MP1 MP0 Data Type: Six bit number. USAGE: Minimum Pixel value in current frame. Minimum value = 0, maximum value = . The minimum pixel value may vary from frame to frame. Min Pixel on White Paper test number 1 1 6 3 1 4 6 6 1 7 6 9 1 106 121 136 151 166 181 196 211 226 241 256 Min pixel Max Pixel on White Paper test number 1 1 6 3 1 4 6 6 1 7 6 9 1 106 121 136 151 166 181 196 211 226 241 256 Max pixel

Pixel_Sum Address: 0x47 Access: Read Reset Value: 0x00 Bit 7 1 0 Field PS7 PS PS PS PS PS PS1 PS0 Data Type: Upper 8 bits of a 1-bit unsigned integer. USAGE: This register is used to find the average pixel value. It reports the upper 8 bits of a 1-bit unsigned integer, which sums all pixels in the current frame. It may be described as the full sum divided by 18. The formula to calculate the average pixel value is as below: Average Pixel = Register Value x 18 / = Pixel_Sum x 0.9 The maximum register value is 19 ( x / 18 truncated to an integer). The minimum is 0. The pixel sum value may vary from frame to frame. Pixel Data Address: 0x48 Access: Read/Write Reset Value: 0x00 Bit 7 1 0 Field SOF Data_Valid PD PD PD PD PD1 PD0 Data Type: Two status bits, six bit pixel data. USAGE: Digital Pixel data. Minimum value = 0, maximum value = . Any writes to this register resets the pixel hardware so that the next read from the Pixel Data register will read pixel #1 and the StartOfFrame bit will be set. Subsequent reads will auto increment the pixel number. To dump a complete image, set the LED to forced awake mode, write anything to this register, then read times where the DataValid bit is set. On the th read, the StartOfFrame bit will be set indicating that we have completed one frame of pixels and are starting back at pixel 1. It takes at least frames to complete an image as we can only read 1 pixel per frame. The pixel hardware is armed with any read or write to the Pixel Data register and will output pixel data from the next available frame. So, if you were to write the Pixel Data register, wait seconds then read the Pixel Data register; the reported pixel data was from seconds ago. Field Name Description SOF Start of Frame 0 = Not start of frame 1 = Current pixel is number 1, start of frame Data_Valid There is valid data in the frame grabber PD –PD0 Six bit pixel data

Pixel Map (sensor is facing down, looking through the sensor at the surface) First Pixel Last Pixel

The following images are the output of the Pixel Data command. The data ranges from 0 for complete black, to 63 for complete white. An internal AGC circuit adjusts the shutter value to keep the brightest feature (max pixel) in the mid 50’s. (a) White Paper (b) Manila Folder (c) Burl Formica (d) USAF Test Chart

Data Type: Sixteen bit word. USAGE: Units are clock cycles; default value is 0x0100HEX. Read Shutter_Upper first, then Shutter_Lower. the shutter changes, it changes by ±1/16 of the current value. Figure 33. Typical Mean Shutter vs. z

Frame_Period Address: 0x4b Access: Read/Write Reset Value: 0xc2 Bit 7 1 0 Field FP7 FP FP FP FP FP FP1 FP0 Data Type: Eight bit ’s complement number that represents the upper 8 bits of a 1 bit counter. USAGE: The frame period counter counts up until it overflows. Units are clock cycles. The formula is: Clock Rate = Counts (decimal) --> Counts (hex) --> Counts (2’s complement hex) Frame Rate Frame Rate Clocks/Frame Clocks/Frame (frames/sec) Decimal (2’ s complement hex) 9 0 O 11 187 C 000 8000 E0 Note: To optimize tracking performance on dark surfaces, it is recommended that an adaptive frame rate based on shutter value be implemented for frame rates greater than 100. Changing the frame rate results in changes in the maximum speed, acceleration limits, and dark surface performance. The maximum value of the shutter is dependent upon the clock frequency. The formula for the maximum shutter value is: clock freq Max shutter value = – 3476 Frame Rate For a clock frequency of 24 MHz, the following table shows the maximum shutter value. 1 clock cycle is 41.67 nsec. Frames/second Max Shutter Shutter Decimal Hex Upper Lower 000 0x11AC 11 AC 11 197 0x0D 0 D 9 1 0xF07C F0 7C <-- Default Max Shutter

Ordering Information

Specify part number as follows: ADNS-2620 = 8-pin staggered dual inline package (DIP), 40 per tube. <-- Maximum Frame Time <-- Nominal Frame Time For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 00-008 Avago Technologies Limited. All rights reserved. Obsoletes 989-098EN AV0-111EN - March 7, 008