ADNS-2030

ADNS-2030 AVAGO | Alldatasheet

Document overview

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• PDF pages: 34

Technical content

Features

• Precise optical navigation technology
• No mechanical moving parts
• Complete 2D motion sensor
• Serial interface and/or quadrature interface
• Smooth surface navigation
• Programmable frame speed up to 2300 frames per sec (fps)
• Accurate motion up to 14 ips
• 800 cpi resolution
• High reliability
• High speed motion detector
• Wave solderable
• Single 3.3 volt power supply
• Shutdown pin for USB suspend mode operation
• Power conservation mode during times of no move- ment
• On chip LED drive with regulated current
• Serial port registers – Programming – Data transfer
• 16-pin staggered dual inline package (DIP)

Applications

• Cordless optical mice
• Mice for desktop PCs, workstations, and portable PCs
• Trackballs
• Integrated input devices

1 SCLK Serial port clock (input)

2 XA XA quadrature output

3 XB XB quadrature output

4 YB YB quadrature output

5 YA YA quadrature output

6 XY_LED LED control

7 REFA Internal reference

8 REFB Internal reference

9 OSC_IN Oscillator input

10 GND System ground

11 OSC_OUT Oscillator output

12 GND System Ground

14 R_BIN LED current bin resistor

15 PD Power Down Pin, active high

16 SDIO Serial data (input and output)

Figure 2. Package outline drawing of ADNS-2030 optical mouse sensor. Figure 1. Top view. of this component to prevent damage and/or degradation which may be induced by ESD.

1. DIMENSONAL TOLERANCE: ± 0.1 MM
2. COPLANARITY OF LEADS: 0.1 MM
3. LEAD PITCH TOLERANCE: ± 0.15 MM
4. CUMULATIVE PITCH TOLERANCE: ± 0.15 MM
5. ANGULAR TOLERANCE: ± 3.0°
6. CHAMFER (25° X 2) ON THE TAPER SIDE OF THE LEAD.

5 TYP

1. Insert the sensor and all other electrical components
2. Bend the LED leads 90° and then insert the LED into
3. Insert the LED/clip assembly into PCB.
4. Wave Solder the entire assembly in a no-wash solder

remove the kapton tape during wave soldering).

1. Place the lens onto the base plate.
2. Remove the protective kapton tape from optical

held vertically during the kapton removal process.

1. Insert PCB assembly over the lens onto the base plate

Figure 6. Block diagram of ADNS-2030 optical mouse sensor. Figure 7. PCB assembly.

1. The optical position reference for the PCB is set by the
2. Install mouse top case. There must be a feature in

file and HDNS-2100 lens flange.

3.3 VOL T

Figure 8. Typical application for cordless optical mouse.

12 MHz

18 MHz

3.0 Volt µCLM3352

6 MHz

Notes on Bypass Capacitors

• Caps for pins 7, 8 and 12, 13 MUST have trace lengths LESS than 5 mm.
• The 0.1 µF caps must be ceramic.
• Caps should have less than 5 nH of self inductance.
• Caps should have less than 0.2Ω of ESR.
• Surface mount parts are recommended. Regulatory Requirements
• Passes FCC B and worldwide analogous emission limits when assembled into a mouse with unshielded cable and following Avago recommendations.
• Passes EN61000-4-4/IEC801-4 EFT tests when as - sembled into a mouse with unshielded cable and following Avago recommendations.
• UL flammability level UL94 V-0.
• Provides sufficient ESD creepage/clearance distance to avoid discharge up to 15kV when assembled into a mouse according to usage instructions above.
• For eye safety consideration, please refer to the docu- ment, Eye Safety Calculation AN1228 available on the web site, http://www.Avago.com/view/opticalnaviga- tion.
• The 15.0 kΩ resistor is determined by the absolute maximum rating of 50 mA for the HLMP-ED80-XX000. The other resistor values for brighter bins will guarantee sufficient intensity with reduced power. Absolute Maximum Ratings Parameter Symbol Minimum Maximum Units Notes Storage Temperature TS -40 85 °C Operating Temperature TA -15 55 °C Lead Solder Temp 260 °C For 10 seconds, 1.6 mm below seating plane Supply Voltage VDD -0.5 3.6 V ESD 2 KV All pins, human body model MIL 883 Method 3015 Input Voltage VIN -0.5 VDD +0.5 V All I/O pins

Recommended Operating Conditions Parameter Symbol Minimum Typical Maximum Units Notes Operating Temperature TA 0 40 °C Power Supply Voltage VDD 3.0 3.3 3.6 Volts Power Supply Rise Time VRT 100 ms Supply Noise VN 30 mV Peak to peak @27 MHz bandwidth Clock Frequency fCLK 17.4 18.0 18.7 MHz Set by ceramic resonator Serial Port Clock Frequency SCLK fCLK/4 MHz Resonator Impedance XRES 55 Ω Distance from Lens Reference Z 2.3 2.4 2.5 mm Results in ±0.2 mm DOF Plane to Surface (See Figure 9.) Speed S 0 14 in/sec @ frame rate = 1500 fps Acceleration A 0.15 g @ frame rate = 1500 fps Light Level onto IC IRRINC 80 25,000 mW/m2 λ = 639 nm 100 30,000 λ = 875 nm SDIO Read Hold Time tHOLD 100 µs Hold time for valid data (Refer to Figure 27.) SDIO Serial Write-write Time tSWW 100 µs Time between two write commands (Refer to Figure 30.) SDIO Serial Write-read Time tSWR 100 µs Time between write and read operation (Refer to Figure 31.) SDIO Serial Read-write Time tSRW 120 ns Time between read and write operation (Refer to Figure 32.) SDIO Serial Read-read Time tSRR 120 ns Time between two read commands (Refer to Figure 32.) Data Delay after PD ↓ tCOMPUTE 3.2 ms After tCOMPUTE, all registers contain data from first image after PD ↓. Note that an additional 75 frames for AGC stabilization may be required if mouse movement occurred while PD was high. (Refer to Figure 11.) SDIO Write Setup Time tSETUP 60 ns Data valid time before the rising of SCLK (Refer to Figure 25.) PD Pulse Width tPDW 700 µs Pulse width to initiate the power down (to power down the chip) cycle @1500 fps (Refer to Figure 13.) PD Pulse Width tPD 100 µs Pulse width to reset the serial port (to reset the serial port) @1500 fps (but may also initiate a power down cycle) (Refer to Figure 11.) Frame Rate FR 1500 frames/s See Frame_Period register section Bin Resistor R1 15K 15K 37K Ω Refer to Figure 8

Figure 9. Distance from lens reference plane to surface. Electrical Characteristics over recommended operating conditions. Typical values at 25°C, VDD = 3.3 V, 18 MHz, 1500 fps. 705 µsec + 75 frames (Refer to Figure 11). (the rise time is between 10% to 90%). (the fall time is between 10% to 90%). complete within tSPTT (Refer to Figure 35). current for bypass capacitors.

Electrical Characteristics over recommended operating conditions. Typical values at 25°C, VDD = 3.3 V, 18 MHz. DC Supply Current (mouse moving) IDD AVG 13 23 mA No load on XA, XB, YA, YB, SCLK, SDIO. Peak Supply Current IDD PEAK 18 mA No load on XA, XB, YA, YB, SCLK, SDIO. (mouse moving) Excluding LED current. DC Supply Current IDD 10 23 mA No load on XA, XB, YA, YB, SCLK, SDIO. (mouse not moving) Excluding LED current. Output Low Voltage (XY_LED) VOL 0.5 V Refer to Figure 10. (Refer to Figure 10 and table below). Figure 10. Typical I-V characteristic of

values, the extra motion will be reported in the next frame. a transfer, the transfer will resume after PD is de-asserted. Figure 15. Quadrature states per frame (400 cpi mode).

Figure 16. Quadrature states per frame (800 cpi mode).

Figure 17. Quadrature states per frame (800 cpi mode).

1 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0

2030 never initiates data transfers. the master (the microcontroller). Figure 24 . Write operation. Figure 25. SDIO setup and hold times ADNS-2030 reads SDIO on rising edges of SCLK.

1. In case of synchronization failure, both the ADNS-2030
2. Termination of a transmission by the microcontroller
3. The microcontroller can verify success of write opera-

and comparing written data to read data.

1. The microcontroller can verify the synchronization of
2. The ADNS-2030 and the microcontroller might get out
3. The ADNS-2030 has a transaction timer for the serial

the current transaction, the serial port will reset. ing from an invalid address will return all zeros.

1. Collision detection on SDIO:

120 ns of the falling SCLK edge after the last data bit. any communication difficulties). Figure 33. Timing between SCLK and PD rising edge.

Figure 34. Power up serial port sequence. the communication to the ADNS-2030 is operational. write depending upon the state). is wrong, the data sent back will be incorrect. wrong data will be written to the wrong address.

The ADNS-2030 can be programmed through registers, via the serial port, and configuration and motion data can be read from these registers. Address Register 0x00 Product_ID 0x01 Revision_ID 0x02 Motion 0x03 Delta_X 0x04 Delta_Y 0x05 SQUAL Address Register 0x0c Data_Out_Lower 0x0d Data_Out_Upper 0x0e Shutter_Lower 0x0f Shutter_Upper 0x10 Frame_Period_Lower 0x11 Frame_Period_Upper Product_ID Address: 0x00 Access: Read Reset Value: 0x03 Bit 7 6 5 4 3 2 1 0 Field PID7 PID6 PID5 PID4 PID3 PID2 PID1 PID0 Data Type: Eight bit number with the product identifier. USAGE: The value in this register does not change; it can be used to verify that the serial communications link is OK. Revision_ID Address: 0x01 Access: Read Reset Value: 0xNN Bit 7 6 5 4 3 2 1 0 Field PID7 PID6 PID5 PID4 PID3 PID2 PID1 PID0 Data Type: Eight bit number with current revision of the IC. USAGE : NN is a value between 00 and FF which represent the current design revision of the device. Rev. 1.0 0x10 Rev. 2.0 0 x 20 Address Register 0x06 Average_Pixel 0x07 Maximum_Pixel 0x08 Reserved 0x09 Reseved 0x0a Configuration_bits 0x0b Reserved

Motion Address: 0x02 Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field MOT Reserved FAULT OVFY OVFX Reserved Reserved RES Data Type: Bit field USAGE: Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If so, then the user should read registers 0x03 and 0x04 to get the accumulated motion. It also tells if the motion buffers have overflowed and whether or not an LED fault oc- curred since the last reading. The current resolution is also shown. Field Name Description MOT Motion since last report or PD 0 = No motion 1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers Reserved Reserved for future FAULT LED Fault detected – set when RBIN is too low or too high, shorts to VDD or Ground 0 = No fault 1 = Fault detected OVFY Motion overflow Y, ∆Y buffer has overflowed since last report 0 = No overflow 1 = Overflow has occurred OVFX Motion overflow X, ∆X buffer has overflowed since last report 0 = No overflow 1 = Overflow has occurred Reserved Reserved Reserved for future RES Resolution in counts per inch 0 = 400 1 = 800 Notes for Motion: 1. Reading this register freezes the Delta_X and Delta_Y register values. Read this register before reading the Delta_X and Delta_Y registers. If Delta_X and Delta_Y are not read before the motion register is read a second time, the data in Delta_X and Delta_Y will be lost. 2. Avago RECOMMENDS that registers 0x02, 0x03 and 0x04 be read sequentially. 3. Internal buffers can accumulate more than eight bits of motion for X or Y. If either one of the internal buffers overflows, then absolute path data is lost, and the OVFX or OVFY bit is set. To clear these bits (OVFX and OVFY), read the Motion, Delta_X and Delta_Y registers consecutive- ly. Repeat until the motion bit (MOT) is cleared. Until MOT is cleared, the Delta_X or Delta_Y registers will read either positive or negative full scale, except possibly the last read. If the motion register has not been read for long time, at 400 cpi it may take up to 16 read cycles to clear the buffers, at 800 cpi, up to 32 cycles. 4. The FAULT bit signifies that an LED fault has occurred since the last time the motion register was read. An LED fault occurs if RBIN has a low resistance connection to ground. When this is detected the LED is turned off. The FAULT bit is set after a fault occurs. The FAULT bit remains set until the fault condition is cleared and the motion register is read. This bit is updated only when the motion register is read. Once an LED fault has cleared, the hardware will drive the LED normally.

Delta_X Address: 0x03 Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field X7 X6 X5 X4 X3 X2 X1 X0 Data Type: Eight bit 2’s complement number. USAGE: X movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. 00 01 02 7E 7F +127+126+1 +2 FFFE8180 0-1-2-127-128Motion Delta_X 00 01 02 7E 7F +127+126+1 +2 FFFE8180 0-1-2-127-128Motion Delta_Y Delta_Y Address: 0x04 Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field X7 X6 X5 X4 X3 X2 X1 X0 Data Type: Eight bit 2’s complement number. USAGE: Y movement is counts since last report. Absolute value is determined by resolution. Reading clears the register

Data Type: Eight bit number. USAGE: SQUAL (Surface QUALity) is a measure of the number of features visible by the sensor in the current frame. The maximum value is 255. Since small changes in the current frame can result in changes in SQUAL, variations in SQUAL when looking at a surface are expected. equal to zero, if there is no surface below the sensor. getting multiple readings over different heights. Figure 37. Typical SQUAL vs. Height, Z.

Average_Pixel Address: 0x06 Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field 0 0 AP5 AP4 AP3 AP2 AP1 AP0 Data Type: Six bit number. USAGE: Average Pixel value in current frame. Minimum value = 0, maximum = 63. The average pixel value may vary from frame to frame. Shown below is a graph of 250 sequentially acquired average pixel values, while the sensor was moved slowly over white paper. Maximum_Pixel Address: 0x07 Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field 0 0 MP5 MP4 MP3 MP2 MP1 MP0 Data Type: Six bit number. USAGE: Maximum Pixel value in current frame. Minimum value = 0, maximum value = 63. The maximum pixel value may vary from frame to frame. Shown below is a graph of 250 sequentially acquired maximum pixel values, while the sensor was moved slowly over white paper. 0 25 50 75 100 125 150 175 200 225 250 Average Pixel Average Pixel (White Paper) 0 25 50 75 100 125 150 175 200 225 250 Maximum Pixel Value Maximum Pixel (White Paper)

Reserved Address: 0x08 Reserved Address: 0x09 Configuration_bits Address: 0x0a Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field RESET LED_MODE Self Test RES PixDump Reserved Reserved Sleep Data Type: Bit field USAGE: Register 0x0a allows the user to change the configuration of the sensor. Shown below are the bits, their default values, and optional values. Field Name Description RESET Power up defaults (bit always reads 0) 0 = No effect 1 = Reset registers and bits to power up default settings (bold entries) LED_MODE LED Shutter Mode 0 = Shutter mode off (LED always on, even if no motion up to 1 sec) 1 = Shutter mode on (LED only on when electronic shutter is open) Self Test[1] Self Tests (bit always reads 0) 0 = No tests 1 = Perform all self tests, output 16 bit CRC via Data_Out_Upper and Data_Out_Lower registers. RES Resolution in counts per inch 0 = 400 1 = 800 Pix Dump Dump the pixel array through Data_Out_Upper and Data_Out_Lower, 256 bytes each 0 = Disabled 1 = Dump pixel array Reserved Reserved Sleep Sleep Mode 0 = Normal, falls asleep after one second of no movement (1,500 frames/s) 1 = Always awake Note: 1. Since part of the self test is a RAM test, the RAM will be overwritten with the default values when the test is done. If any configuration changes from the default are needed for operation, make the changes AFTER the self test is run. This operation requires substantially more time to complete than other register transactions.

Reserved Address: 0x0b Data_Out_Lower Address: 0x0c Access: Read Reset Value: undefined Bit 7 6 5 4 3 2 1 0 Field DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Data_Out_Upper Address: 0x0d Access: Read Reset Value: undefined Bit 7 6 5 4 3 2 1 0 Field DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8 Data Type: Sixteen bit word. USAGE: Data from the system self test or the pixel dump command can be read out with these registers. The data can be read from 0x0d only, or from 0x0d followed by 0x0c. Data_Out_Upper Data_Out_Lower Notes Self Test result 1: DB FD One of two results returned. Self Test result 2: 20 D6 These values are subject to change with each device design revision. Pixel Dump command: Pixel Address Pixel Data (bits 0-5) and Pixel Data Status (bit 7) Once the pixel dump command is given, the sensor writes the address and the value for the first pixel into the Data_Out_Upper and Data_Out_Lower registers. The MSB of Data_Out_Lower is the status bit for the data. If the bit is high, the data are NOT valid. Once the MSB is low, the data for that particular read are valid and should be saved. The pixel address and data will then be incremented on the next frame. Once the pixel dump is complete, the PixDump bit in register 0x0a should be set to zero. To obtain an accurate image to get the Pixel Dump image, the LED needs to be turned on by changing the sleep mode of the configuration register 0x0a to always awake.

Figure 38. Directions are for a complete mouse,

Figure 39. Pixel dump pictures.

Figure 40. Typical shutter vs. Z (white paper). Data Type: Sixteen bit word. shutter values, while the sensor was moved slowly over white paper.

The maximum value of the shutter is depen - dent upon the frame rate and clock frequen - cy. The formula for the maximum shutter value is: clock freqMax shutter value = – 2816 frame rate Frames/second Max Shutter Shutter Decimal Hex Upper Lower 2300* 5010 0x1392 13 92 2000* 6184 0x1828 18 28 1500 9184 0x23E0 23 E0 1000 15184 0x3B50 3B 50 500 33184 0x81A0 81 A0 * Note: To optimize tracking performance on dark surfaces, it is recommended that an adaptive frame rate based on shutter value be implemented for frame rates greater than 1500. <-- Default Max Shutter clock freqThe formula is: = = counts frame rate (2’s complements hex) For an 18 MHz clock, below are the Frame_period val- ues for popular frame rates. Frame_Period_Lower Address: 0x10 Access: Read/Write Reset Value: 0x20 Bit 7 6 5 4 3 2 1 0 Field FP7 FP6 FP5 FP4 FP3 FP2 FP1 FP0 Frame_Period_Upper Address: 0x11 Access: Read/Write Reset Value: 0xd1 Bit 7 6 5 4 3 2 1 0 Field FP15 FP14 FP13 FP12 FP11 FP10 FP9 FP8 Data Type: Sixteen bit 2’s complement word. USAGE: Sets the frame rate. The frame period counter counts up until it overflows. Units are clock cycles. For a clock frequency of 18 MHz, the following table shows the maximum shutter value. 1 clock cycle is 55.56 nsec.

IC Register State after Reset (power up or setting bit 7, register 0x0a) Address Register Default Value Meaning 0x00 Product_ID 0x03 Product ID = 3 (Fixed value) 0x01 Revision_ID 0xNN Revision of IC (Fixed value) (For each device design revision) 0x02 Motion 0x00 No Motion LED = No fault No X data overflow No Y data overflow Resolution is 400 counts per inch 0x03 Delta_X 0x00 No X motion 0x04 Delta_Y 0x00 No Y motion 0x05 SQUAL 0x00 No image yet to measure 0x06 Average_Pixel 0x00 No image yet to measure 0x07 Maximum_Pixel 0x00 No image yet to measure 0x08 Reserved 0x09 Reserved 0x0a Configuration_bits 0x00 Part is not Reset LED Shutter Mode is off No Self Tests Resolution = 400 counts per inch Pixel Dump is disabled Sleep mode is enabled 0x0b Reserved — 0x0c Data_Out_Lower undefined No data to read 0x0d Data_Out_Upper undefined No data to read 0x0e Shutter_Lower 0x64 Initial shutter value 0x0f Shutter_Upper 0x00 Initial shutter value 0x10 Frame_Period_Lower 0x20 Initial frame period value (corresponds to 1500 fps) 0x11 Frame_Period_Upper 0xd1 Initial frame period value (corresponds to 1500 fps) Changing the frame rate results in changes in the maxi - mum speed, acceleration limits, and dark surface perfor - mance. Frames/second Counts Frame_Period Decimal Hex 2’ s comp Upper Lower 2300* 7826 0x1E92 0xE16E E1 6E 2000* 9000 0x2328 0xDCD8 DC D8 1500 12000 0x2EE0 0xD120 D1 20 1000 18000 0x4650 0xB9B0 B9 B0 500 36000 0x8CA0 0x7360 73 60 <-- Default Frame Period <-- Minimum Frame Period *Note: To optimize tracking performance on dark surfaces, it is recommended that an adaptive frame rate based on shutter value be implemented for frame rates greater than 1500.

Optical Mouse Design References Eye Safety Calculation AN1228

Ordering Information

Specify part number as follows: ADNS-2030 = Sensor IC in a 16-pin staggered DIP , 20 per tube. HDNS-2100 = Round Optical Mouse Lens HDNS-2100#001 = Trimmed Optical Mouse Lens HDNS-2200 = LED Assembly Clip (Black) HDNS-2200#001 = LED Assembly Clip (Clear) HLMP-ED80-XX000 = LED For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 00-00 Avago Technologies, Limited. All rights reserved. Obsoletes -1EN AV0-101EN - April , 00