ACPM-7833-TR1

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Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 20

Technical content

Features

• Operating frequency: 1850– 1910 MHz
• 28.5 dBm linear output power @ 3.4V
• High efficiency: 40% PAE
• Dynamic bias control for low midpower Idd
• Very low quiescent current with single control voltage
• Internal 50 ohm matching networks for both RF IN/ OUT
• 3.2– 4.2V linear operation
• cdma2000 1xRTT capable
• Only 3 SMT parts needed
• 4.0 x 4.0 x 1.1 mm SMT package

Applications

• CDMA handsets
• Datacards
• PDAs

Maximum Ratings[1] Parameter Min. Max. Vdd Supply Voltage 6.0 V Power Dissipation[2] 2.5 W Bias Current 1.5 A Control Voltage (Vcntl) 3.0 V Amplifier Input RF Power 10 dBm Junction Temperature +150°C Storage T emperature (case temperature) -40°C +100°C Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage. 2. Tcase = 25°C Thermal Resistance [2] θjc = 22.3°C/W Recommended operating range of Vdd = 3.2 to 4.2 V, Ta = -30 to +85°C Vdd2 (Pin 10) Gnd RFout Gnd Gnd 1.1 mm4.0 mm (sq) Vdd1 (Pin 1) RFin Gnd Vcntl VbiasGnd Agilent ACPM-7833 YYWWDD XXXX 0.400±0.076 0.850±0.076 0.850±0.076 0.850±0.076 0.850±0.076 4.000±0.076 3.400±0.076 2.000±0.076 4.000±0.076 1.100±0.076 Note: YYWWDD: year – work week – day XXXX: lot code All units are in mm Top View Side View Bottom View Package Marking and Dimensions

Electrical Characterization Information All tests are done in 50 Ω system at Vdd1=Vdd2=Vbias = 3.4V, 25°C, unless noted otherwise. Parameter Units Min Typ Max Comments PCS CDMA Frequency Range MHz 1850 1910 Gain (Fixed Cntl Voltage) Pout = 16 dBm 24 26 28 Vcntl= 1.8V Power Added Efficiency Pout = 28.5 dBm % 38 40 Vcntl= 2.5V Pout = 16 dBm % 7.5 8.5 Vcntl= 1.8V T otal Supply Current mA 520 550 P out = 28.5 dBm, Vcntl= 2.5V mA 135 156 P out =16 dBm, Vcntl= 1.8V mA 31 P out = -5 dBm, Vcntl = 1.2V ACPR @ ± 1.25 MHz offset dBc/30 kHz -45 -48 P out - 28.5 dBm ACPR @ ± 1.98 MHz offset dBc/30 kHz -53 -55 P out - 28.5 dBm Quiescent Current mA 62 80 P out - 28.5 dBm, Vcntl= 2.5V mA 47 60 Vcntl = 1.8V mA 25 Vcntl = 1.2V Vcntl Current mA 2.0 2.7 Vcntl = 2.5V Input VSWR (Pout = 28.5 dBm) 2.0:1 Noise Figure dB 4.5 Noise Power @ 80 MHz offset in 1930– 1990 MHz dBm/Hz -141 -138 Stability (Spurious): Load VSWR 5:1 dBc -50 All phases Harmonic Suppression: 2Fo dBc -30 -38

Part Number No. of Devices Container ACPM-7833-BLK 10 Bulk ACPM-7833-TR1 1000 7” T ape and Reel φ1.55 ± 0.05 φ1.50 (MIN) 4.38 ± 0.10 1.80 ± 0.10 4.38 ± 0.10CL 5.50 ± 0.05[3] 12.00 ± 0.30 Notes: 1. Measured from centerline of sprocket hole to centerline of pocket 2. Cumulative tolerance of 10 sprocket holes is ±0.2 mm 3. All dimensions in millimeters unless otherwise stated. Agilent ACPM-7833 YYWWDD XXXX

Ordering Information

Tape Dimensions and Orientation

NOTES: 1. Reel shall be labeled with the following information (as a minimum). a. manufacturers name or symbol b. Avago Technologies part number c. purchase order number d. date code e. quantity of units 2. A certificate of compliance (c of c) shall be issued and accompany each shipment of product. 3. Reel must not be made with or contain ozone depleting materials. 4. All dimensions in millimeters (mm) 50 min. 12.4 +2.0 –0.0 18.4 max. min wide (ref) Slot for carrier tape insertion for attachment to reel hub (2 places 180 apart) BACK VIEW FRONT VIEW 178 Shading indicates thru slots +0.4 –0.2 21.0±0.8 13.0±0.2 1.5 min. Reel Drawing

Application Information

The following material is presented to assist in general design and use of the APCM-7833.

• 3.0V Characterization, for use in Data Card Applications
• cdma2000 1XRTT Description and Characterization data
• Design tips on various methods to control the bias on Vcntl pin
• Description of ACPR measurement methods
• Description of Avago Technologies evaluation demoboard for ACPM-7833
• IR Reflow Profile (applicable for all Avago Technologies E-pHEMT PAs) 3.0V Characterization, Data Card Applications Electrical Data All tests are done in 50 Ω system at Vdd1=Vdd2=Vbias = 3.0V, 25°C, unless noted otherwise. Parameter Units Min Typ Max Comments

1900 MHz CDMA

Frequency Range MHz 1850 1910 Gain (Fixed Cntl Voltage) (Pout = 28.5 dBm) dB 26 Vcntl = 2.5V (Pout = 13 dBm) dB 28 Vcntl = 2.5V (Pout = -5 dBm) dB 28 Vcntl = 2.5V Power Added Efficiency Pout = 28.0 dBm % 42 Vcntl = 2.5V Pout = 16 dBm % 8.5 Vcntl = 2.5V T otal Supply Current mA 500 P out = 28.0 dBm, Vcntl= 2.5V 100 P out = 13 dBm, Vcntl= 1.6V 30 P out = -5 dBm, Vcntl= 1.2V ACPR @ ± 1.25 MHz offset dBc/30 kHz -43 P out - 28.5 dBm ACPR @ ± 1.98 MHz offset dBc/30 kHz -56 P out - 28.5 dBm Quiescent Current mA 60 P out - 28.5 dBm, Vcntl = 2.5V Input VSWR (Pout = 28.5 dBm) 2.0:1 (Pout = 16 dBm) 2.5:1 Noise Figure dB 4.5 Noise Power @ 80 MHz offset in 1930 - 1990 MHz dBm/Hz -141 Stability (Spurious): Load VSWR 5:1 dBc -50 All phases Harmonic Suppression 2Fo dBc -40 3Fo dBc -40

the IS-95 standard, has a chip rate of 1.2288Mchip/s. one code channel to accommodate the high data rates. different rates and power levels. Table 1. Transmitter Specification in Reverse Link. condition in the reverse link.

Test result of ACPM-7833 using CDMA2000 1X RTT signal Test condition - PA Evaluation board with Vdd1=Vdd2=Vbias = 3.4V, Vcntl = 2.5V, Frequency = 1880 MHz. Test result with each channel configuration. 1.25 MHz 1.25 MHz -1.98 MHz +1.98 MHz Channel IVdd(mA) Pin(dBm) ACPR(dBc) ACPR(dBc) ACPR(dBc) ACPR(dBc) Pout(dBm) Peak to average power ration (Pout = 16 dBm) CCDF(%) Basic Voice + Data Voice + CNTL CNTL only 10 2.11 3.37 3.44 4.00 1 3.74 4.83 5.21 5.75 EIA/TIA-98-D indicates a 2.5 dB allowed back off in power for control channel only configuration. Combinations of these channels will increase the peak to average power ratio for higher data rates. The complementary cumulative distribution function (CCDF) measurement characterizes the peak to average power statistics of CDMA2000 reverse link. For reference, the system specifications of peak to average power ratio of IS-95 and CDMA2000 IX RTT are 3.9 dB and 5.4 dB at 1% CCDF respectively. Higher peak to average power ratio requires a higher margin, both in higher power gain and in improved thermal stability for PA linearity to meet the minimum system specifications. The test results below for the ACPM-7833 show the compliance to the system linearity specifications with 4 channel configurations, representing a broad cross- section of CDMA2000 1X RTT environments.

Power Mode PA_ON Vcntl Power Range Shut Down LOW 0V — High Power HIGH 2.5V - 28.5 dBm To Duplexer Battery Vcntl PA TxIC Switch Circuit for PA Baseband IC PA_ONEnable Vdd1 Vdd2 Vbias Vcntl PMIC or LDO Note: PMIC: Power Management IC LDO: Low Drop Output (Regulator) Design Tips to use Vcntl pin Power Amplifier Control Using Vcntl Pin on ACPM-7833 Power amplifier control scheme in CDMA systems is one of the important and challenging aspects of CDMA- based handset design. Handset designers must balance maintaining adequate linearity while optimizing efficiency at high, medium and low output power levels. The primary method to achieve these goals is to adjust the bias of the PA as a function of output power. Theoretically, the best efficiency would be achieved when the bias of the PA is continually adjusted based on the output power requirement of the PA. However, implementing this type of circuit can be complex and costly. Therefore several different approaches have been developed to provide an acceptable trade-off between optimum efficiency and optimum manufacturability. This application section reviews four methods of controlling the bias of a CDMA power amplifier: fixed, step, logical and dynamic. 1. Fixed Bias Control Using a fixed bias point on the PA is the traditional method, and it is the simplest. For example, the recommended value of the fixed control voltage on the Vcntl pin for the ACPM-7833 is 2.5V. The Vcntl pin on the PA is controlled by PA_ON pin of the baseband IC. When PA_ON is HIGH, the output RF signal of the PA is enabled, enabling the subscriber unit to transmit the required data. The switch circuit also controls the on/off state of the PA. Below is an example of how to control the the output of the PA using PA_ON and Vcntl pins.

Power Mode PA_ON Vcntl Power Range Shut Down LOW 0V — Low Power HIGH 1.2V ~ -5 dBm Mid Power HIGH 1.6V -5 dBm ~ 13 dBm High Power HIGH 2.5V 13 dBm ~ 28.5 dBm To Duplexer Battery Vdd1 Vdd2 Vcntl PA TxIC Switch Circuit for PA Baseband IC PA_ON PDM1 Vbias Enable If PDM1 can be controlled then same circuit can be used for Dynamic bias control 2. Step Bias Control and Dynamic Bias Control (if controled PDM1) The PDM1 output from the baseband IC can be used to create a software-programmable voltage, to be used at the phone designer’s discretion. To get high efficiency and better ACPR, the phone designers can change control voltage of the PA by adjusting PDM1 voltage according to output power of PA. A caution when using this approach—careful consideration must be made to to avoid an abrupt discontinuity in the output signal when the step bias control voltage is applied. The figure below is an example of how to control the PA for multiple bias points using the PA_ON and Vcntl pins.

PA_ON TX_ADC_ADJ Baseband ICT xIC Vcontrol Switch Circuit Enable Vdd1 Vdd2 Vcntl Vbias To Duplexer Battery PA PA_ON TX_ADC_ADJ PDM1 Baseband ICT xIC Vcontrol Switch Circuit Enable Vdd1 Vdd2 Vcntl Vbias 3. Dynamic Bias Control Alternate Implementation Phone designers can use TX_ADC_ADJ pin of the baseband IC to get dynamic bias control with Vcntl pin of PA. TX_ADC_ADJ is a PDM output pin produced by the TX AGC subsystem and used to control the gain of the Tx signal prior to the PA. The variable output levels from two inverting operational amplifiers, generated and compared by TX_ADC_ADJ, provide dynamic control voltages for the Vcntl of 1.0V ~ 2.7V with a 0.1V step. Av = -(V1/Vin) = -R3/R2, V1 = -(R3/R2)Vin, Vo = -(R5/R4)V1= [(R5*R3)/(R4*R2)]*Vin The using of combination of two pins, PDM1 and TX_ADC_ADJ, is another method of realizing a dynamic bias control scheme. The two OP Amps control the Vcntl voltage levels with compared and integrated circuits.

1.23 MHz

849 MHz transmitter channel), the two offsets are at

(1850 ~ 1910 MHz transmitter channel). Figure 16. CDMA Adjacent-Channel Power Ratio Measurement.

836 MHz for general example) shows a comparison of

1.23 MHz bandwidth, a channel power that is measured

in a 1.23 MHz bandwidth is 16 dB. The ACPM-7833 is a fully matched Power Amplifier. Figure 20. ACPM-7833 Evaluation Board Schematic and Layout. Figure 19. Example ACPR measurement using Spectrum Analyzer.

Figure 21. Layer 1 – Top Metal & Solder Mask.

1 GND 1b Vdd2 (s)

2 Vbias 2b GND

3 Vdd1 3b Vdd1 (s)

4 GND 4b Vcntl

5 Vdd2 5b Vbias (s)

Figure 22. Layer 2 – Ground. Figure 23. Layer 3 – Bottom Metal & Solder Mask.

and power control. The control pin is labeled Vcntl. Please refer to for the block diagram of this PAM. corresponding ACPR offsets for IS-98c and JSTD-8. Averaging of 10 is used for ACPR measurements. compensation for PCB traces and cable resistance. 2) Terminate all unused RF ports into 50 Ohms. decrease and current can exceed the rated limit. listed in “Operation Data” in Data Packet. 6) Power down in opposite sequence. Figure 24. Power Module Block Diagram.

For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved. Obsoletes 5989-1899EN AV01-0038EN - February 22, 2006 Nominal stencil thickness Component lead pitch 0.102 mm (0.004 in) Lead pitch less than 0.508 mm (0.020 in) 0.203 mm (0.008 in) Lead pitch greater than 0.635 mm (0.025 in) Zone 1 – Preheat Zone The average heat up rate for surface-mount component on PCB shall be less than 3°C/second to allow even heating for both the component and PCB. This ramp is maintained until it reaches 100°C where flux activation starts. Zone 2 – Soak Zone The flux is being activated here to prepare for even and smooth solder joint in subsequent zone. The temperature ramp is kept gradual to minimize thermal mismatch between solder, PC Board and components. Over-ramp rate here can cause solder splatter due to excessive oxidation of paste. Zone 3 – Reflow Zone The third process zone is the solder reflow zone. The temperature in this zone rises rapidly from 183°C to peak temperature of 235°C for the solder to transform its phase from solid to liquids. The dwell time at melting point 183°C shall maintain at between 60 to 150 seconds. Upon the duration of 10-20 seconds at peak temperature, it is then cooled down rapidly to allow the solder to freeze and form solid. Extended duration above the solder melting point can potentially damage temperature sensitive components and result in excessive inter-metallic growth that causes brittle solder joint, weak and unreliable connections. It can lead to unnecessary damage to the PC Board and discoloration to component’s leads. Zone 4 – Cooling Zone The temperature ramp down rate is 6°C/second maximum. It is important to control the cooling rate as fast as possible in order to achieve the smaller grain size for solder and increase fatigue resistance of solder joint. Solder Paste The recommended solder paste is type Sn6337A or Sn60Pb40A of J-STD-006. Note: Solder paste storage and shelf life shall be in accordance with manufacturer’s specifications. Stencil or Screen The solder paste may be deposited onto PCB by either screen printing, using a stencil or syringe dispensing. The recommended stencil thickness is in accordance to JESD22-B102-C.