ACPM-7381-OR1 AVAGO | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 15

Technical content

Features

  • Excellent Linearity
  • Low quiescent current
  • High Efficiency PAE at 28 dBm: 37.4% PAE at 16dBm: 16.4% PAE at 8dBm: 6.7%
  • 10-pin surface mounting package (4mmx4mmx1.1mm)
  • Internal 50ohm matching networks for both RF input and output
  • RoHS Compliant

Applications

  • WCDMA Handset (HSDPA) Output Match Input Match Inter Stage Match DA PA Bias Ci rcuit & Control Logic RF Input (2) RF Output (8) Vcc1 (1) Vcc2(10) Ven (5)Vmode1 (3) MODULE MMIC Vmode0 (4) TR Switch

Table 1. Absolute Maximum Ratings [1] Table 2. Recommended Operating Condition Table 3. Power Range Truth Table [2]

  1. No damage assuming only one parameter is set at limit at a time with all other parameters set at or below nominal value.

Table 4. Electrical Characteristics for WCDMA Mode (Vcc=3.4V, Ven=2.6V, T=25°C, Zin/Zout=50ohm) [1]

5 MHz offset

10 MHz offset

10 Deg

15 Deg

  1. Electrical characteristics are specified under WCDMA modulated ( 3GPP Uplink DPCCH + 1DPDCH ) signal
  2. ACP is expressed as a ratio of total adjacent power to signal power, both with 3.84MHz bandwidth at specified offsets.

Table 5. Electrical Characteristics for HSDPA Mode (Vcc=3.4V, Ven=2.6V, T=25°C, Zin/Zout=50ohm) [1]

  1. Electrical characteristics are specified under HSDPA modulated Up-Link signal (DPCCH/DPDCH=12/15, HS-DPCCH/DPDCH=15/15)
  2. ACP is expressed as a ratio of total adjacent power to signal power, both with 3.84MHz bandwidth at specified offsets

Figure 11. Evaluation Board Schematic Figure 12. Evaluation Board Assembly Diagram

1 Vcc1

2 RF In

3 Vmode1

4 Vmode0

5 Ven

Figure 13. Package Dimensional Drawing and Pin Descriptions (All dimensions are in millimeters) Figure 14. Marking Specifications

1 Vcc1 Supply Voltage

2 RF In RF Input

3 Vmode1 Control Voltage

4 Vmode0 Control Voltage

5 Ven Enable Voltage

6 GND Ground

7 GND Ground

8 RF Out RF Output

9 GND Ground

10 Vcc2 Supply Voltage

Figure 18. Tape and Reel Format – 4 mm x 4 mm.

Figure 19. Plastic Reel Format (all dimensions are in millimeters)

  1. Reel shall be labeled with the following information
  2. A certificate of compliance (c of c) shall be issued

and accompany each shipment of product.

  1. Reel must not be made with or contain ozone
  2. All dimensions in millimeters (mm)

Table 7. Moisture Classification Level and Floor Life

1 Unlimited at =< 30°C/85% RH

  1. The MSL Level is marked on the MSL Label on each shipping bag.

Table 6. ESD Classification

1 Vcc1 Supply Voltage ± 2000V ± 200V Class 2

2 RF In RF Input ± 2000V ± 200V Class 2

3 Vmode1 Control Voltage ± 2000V ± 200V Class 2

4 Vmode0 Control Voltage ± 2000V ± 200V Class 2

5 Ven Enable Voltage ± 2000V ± 200V Class 2

6 GND Ground ± 2000V ± 200V Class 2

7 GND Ground ± 2000V ± 200V Class 2

8 RF Out RF Output ± 2000V ± 200V Class 2

9 GND Ground ± 2000V ± 200V Class 2

10 Vcc2 Supply Voltage ± 2000V ± 200V Class 2

  1. Module products should be considered extremely ESD sensitive

structive damage will result. a factory environment at each manufacturing site. Avago Technologies follows JEDEC Standard J-STD 020B. various temperatures and relative humidity, and times.

Time 25°C to Peak Temperature 6 min max. 8 min max. Figure 20. Typical SMT Reflow Profile for Maximum Temperature = 260 +0/-5°C

Packages described in this document must be stored in sealed moisture barrier, antistatic bags. Shelf life in a sealed moisture barrier bag is 12 months at <40°C and 90% relative humidity (RH) J-STD-033 p.7. Out-of-Bag Time Duration After unpacking the device must be soldered to the PCB within 168 hours as listed in the J-STD-020B p.11 with factory conditions <30°C and 60% RH. Baking It is not necessary to re-bake the part if both conditions (storage conditions and out-of bag conditions) have been satisfied. Baking must be done if at least one of the con - ditions above have not been satisfied. The baking condi - tions are 125°C for 12 hours J-STD-033 p.8. CAUTION Tape and reel materials typically cannot be baked at the temperature described above. If out-of-bag exposure time is exceeded, parts must be baked for a longer time at low temperatures, or the parts must be de-reeled, de- taped, re-baked and then put back on tape and reel. (See moisture sensitive warning label on each shipping bag for information of baking). Board Rework Component Removal, Rework and Remount If a component is to be removed from the board, it is recommended that localized heating be used and the maximum body temperatures of any surface mount component on the board not exceed 200°C. This method will minimize moisture related component damage. If any component temperature exceeds 200°C, the board must be baked dry per 4-2 prior to rework and/or component removal. Component temperatures shall be measured at the top center of the package body. Any SMD packages that have not exceeded their floor life can be exposed to a maximum body temperature as high as their specified maximum reflow temperature. Removal for Failure Analysis Not following the above requirements may cause moisture/reflow damage that could hinder or com - pletely prevent the determination of the original failure mechanism. Baking of Populated Boards Some SMD packages and board materials are not able to withstand long duration bakes at 125°C. Examples of this are some FR-4 materials, which cannot withstand a 24 hr bake at 125°C. Batteries and electrolytic capacitors are also temperature sensitive. With component and board temperature restrictions in mind, choose a bake tem - perature from Table 4-1 in J-STD 033; then determine the appropriate bake duration based on the component to be removed. For additional considerations see IPC-7711 andIPC-7721. Derating due to Factory Environmental Conditions Factory floor life exposures for SMD packages removed from the dry bags will be a function of the ambient envi - ronmental conditions. A safe, yet conservative, handling approach is to expose the SMD packages only up to the maximum time limits for each moisture sensitivity level as shown in Table 7. This approach, however, does not work if the factory humidity or temperature is greater than the testing conditions of 30°/60% RH. A solution for address - ing this problem is to derate the exposure times based on the knowledge of moisture diffusion in the component package materials ref. JESD22-A120). Recommended equivalent total floor life exposures can be estimated for a range of humidities and temperatures based on the nominal plastic thickness for each device. Table 9 lists equivalent derated floor lives for humidities ranging from 20-90% RH for three temperature, 20°, 25°, and 30°C. This table is applicable to SMDs molded with novolac, biphenyl or multifunctional epoxy mold compounds. The following assumptions were used in calculating Table 9: 1. Activation Energy for diffusion = 0.35eV (smallest known value). 2. For ≤60% RH, use Diffusivity = 0.121exp ( -0.35eV/kT) mm2/s (this used smallest known Diffusivity @ 30°C). 3. For >60% RH, use Diffusivity = 1.320exp ( -0.35eV/kT) mm2/s (this used largest known Diffusivity @ 30°C).

Table 8. Recommended Equivalent Total Floor Life (days) @ 20°C, 25 °C & 30 °C Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.