ACPL-064L-000E

DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 16

Technical content

Features

• Ultra-low IDD current: 1.3 mA/channel maximum
• Low input current: 1.6 mA
• Built-in slew-rate controlled outputs
• 20 kV/μs minimum Common Mode Rejection (CMR) at VCM = 1000 V
• High speed: 10 MBd minimum
• Guaranteed AC and DC performance over wide temperature: –40°C to +105°C
• Wide package selection: SO-5, SO-8, stretched SO-6 and stretched SO-8
• Safety approval – UL 1577 recognized – 3750 Vrms for 1 minute for ACPL-064L/M61L and 5000 Vrms for 1 minute for ACPL-W61L/K64L – CSA Approval – IEC/EN/DIN EN 60747-5-5 approval for Reinforced Insulation
• RoHS compliant

Applications

• Communication interfaces: RS485, CANBus and I2C
• Microprocessor system interfaces
• Digital isolation for A/D and D/A convertors Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product 5NC* Anode Cathode VDD GND Vo SHIELD ACPL-M61L Anode Cathode VDD GND Vo A 0.1 µF bypass capacitor must be connected between pins VDD and GND.

1 VDD

(POSITIVE LOGIC) LED OUTPUT ON L OFF H

Ordering Information

The ACPL-064L and ACPL-M61L are UL Recognized with an isolation voltage of 3750 V rms for 1 minute per UL1577. The ACPL-W61L and ACPL-K64L are UL Recognized with an isolation voltage of 5000 V rms for 1 minute per UL1577. All devices are RoHS compliant. Part number Option RoHS Compliant Package Surface Mount Tape & Reel UL1577 5000 Vrms /1 Minute rating IEC/EN/DIN EN 60747-5-5 Quantity ACPL-M61L -000E SO-5 X 100 per tube -060E X X 100 per tube -500E X X 1500 per reel -560E X X X 1500 per reel ACPL-064L -000E SO-8 X 100 per tube -060E X X 100 per tube -500E X X 1500 per reel -560E X X X 1500 per reel ACPL-W61L -000E Stretched S06 X X 100 per tube -060E X X X 100 per tube -500E X X X 1000 per reel -560E X X X X 1000 per reel ACPL-K64L -000E Stretched S08 X X 80 per tube -060E X X X 80 per tube -500E X X X 1000 per reel -560E X X X X 1000 per reel To form an ordering part number, choose a part number from the part number column and combine it with the desired option from the option column. Example 1: The part number ACPL-M61L-560E describes an optocoupler with a surface mount SO-5 package; delivered in Tape and Reel with 1500 parts per reel; with IEC/EN/DIN EN 60747-5-5 Safety Approval; and full RoHS compliance. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.

5.994 ± 0.203 (0.236 ± 0.008) 3.937 ± 0.127 (0.155 ± 0.005) 0.406 ± 0.076 (0.050) BSC 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.060) 45° X 0.432 (0.017) 0.228 ± 0.025 (0.009 ± 0.001) TYPE NUMBER (LAST 3 DIGITS) DATE CODE 0.305 (0.012) MIN. 0.203 ± 0.102 (0.008 ± 0.004) PIN ONE 0 ~ 7° * Total package length (inclusive of mold /f_lash) Dimensions in Millimeters (Inches). Note: Floating lead protrusion is 0.15 mm (6 mils) max. Lead coplanarity = 0.10 mm (0.004 inches) max. Option number 500 not marked. LAND PATTERN RECOMMENDATION 7.49 (0.295) 1.91 (0.075) 0.64 (0.025) 3.95 (0.156) 1.27 (0.5) ROHS-COMPLIANCE INDICATOR MXXX XXX 7.0 ± 0.2 (0.276 ± 0.008) 2.5 ± 0.1 (0.098 ± 0.004) 0.102 ± 0.102 (0.004 ± 0.004) 4.4 ± 0.1 (0.173 ± 0.004) 1.27 (0.050)BSC 0.15 ± 0.025 (0.006 ± 0.001) 0.71 (0.028) MIN 0.4 ± 0.05 (0.016 ± 0.002) 3.6 ± 0.1* (0.142 ± 0.004) Dimensions in millimeters (inches). Note: Foating Lead Protrusion is 0.15 mm (6 mils) max. * Maximum Mold /f_lash on each side is 0.15 mm (0.006). 7° MAX. MAX. LEAD COPLANARITY = 0.102 (0.004) 8.26 (0.325) 1.80 (0.071) 2.54 (0.10) 1.27 (0.05) 0.64 (0.025) 4.39 (0.17) LAND PATTERN RECOMMENDATION 0.33 (0.013) ROHS-COMPLIANCE INDICATOR PART NUMBER DATE CODE

ACPL-W61L Stretched SO-6 Package ACPL-K64L Stretched SO-8 Package 4.480±0.254 (0.0180±0.010) 45° 0.381±0.127 (0.015±0.005) 1.27 (0.050) BSG 0.20±0.10 (0.008±0.004) 0.45 (0.018) 0.750±0.250 (0.0295±0.010) 11.50±0.250 (0.453±0.010) 6.807 0.268 Dimensions in Millimeters (Inches). Lead coplanarity = 0.1 mm (0.004 inches). 12.65 (0.498) LAND PATTERN RECOMMENDATION 3.180±0.127 (0.125±0.005) 1.590±0.127 (0.063±0.005)7° 1.91 (0.075) 321 456 0.76 (0.030) +0.127 +0.005 - 0.000 )( W61L YWW PART NUMBER DATE CODE ROHS-COMPLIANCE INDICATOR 0.381±0.13 (0.015±0.005) 1.270 (0.050) BSG 12.650 (0.5) 1.905 (0.1) 321 5678 5.850±0.254 (0.230±0.010) LAND PATTERN RECOMMENDATION Dimensions in Millimeters (Inches). Lead coplanarity = 0.1 mm (0.004 inches). 7° 45° 0.200±0.100 (0.008±0.004) 0.450 (0.018) 0.750±0.250 (0.453±0.010) 6.807±0.127 (0.268±0.005) 3.180±0.127 (0.125±0.005) 1.590±0.127 (0.063±0.005) K64L YWW PART NUMBER DATE CODE ROHS-COMPLIANCE INDICATOR

The ACPL-064L, ACPL-M61L, ACPL-W61L and ACPL-K64L are approved by the following organizations: IEC/EN/DIN EN 60747-5-5 (Option 060 only) UL Approval under UL 1577 component recognition program up to V ISO = 3750 VRMS for the ACPL-M61L/064L and V ISO = 5000 VRMS for the ACPL-W61L/K64L File E55361. CSA Approval under CSA Component Acceptance Notice #5, File CA 88324. Insulation and Safety Related Specifications Parameter Symbol ACPL-064L ACPL-M61L ACPL-W61L ACPL-K64L Units Conditions Minimum External Air Gap (External Clearance) L(101) 4.9 5 8 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 4.8 5 8 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. Tracking Resistance (Comparative Tracking Index) CTI 175 175 175 V DIN IEC 112/VDE 0303 Part 1 Isolation Group IIIa IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1) Reflow Soldering Profile The recommended reflow soldering conditions are per JEDEC Standard J-STD-020 (latest revision). Non-halide flux should be used.

IEC/EN/DIN EN 60747-5-5 Insulation Characteristics* (Option 060) Description Symbol Characteristic Unit ACPL-064L/ ACPL-M61L ACPL-W61L/ ACPL-K64L Installation classification per DIN VDE 0110/39, Table 1 for rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 600 Vrms for rated mains voltage ≤ 1000 Vrms I – IV I – III I – II I – IV I – IV I – III I – III Climatic Classification 55/105/21 55/105/21 Pollution Degree (DIN VDE 0110/39) 2 2 Maximum Working Insulation Voltage VIORM 567 1140 Vpeak Input to Output Test Voltage, Method b* VIORM x 1.875=VPR, 100% Production Test with tm =1 sec, Partial discharge < 5 pC VPR 1063 2137 Vpeak Input to Output Test Voltage, Method a* VIORM x 1.6=VPR, Type and Sample Test, tm = 10 sec, Partial discharge < 5 pC VPR 907 1824 Vpeak Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) VIOTM 6000 8000 Vpeak Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature Input Current Output Power TS IS, INPUT PS, OUTPUT 150 150 600 175 230 600 mA mW Insulation Resistance at TS, VIO = 500 V RS >109 >109 Ω * Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/ DIN EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. ** Refer to the following figures for dependence of PS and IS on ambient temperature. TS – CASE TEMPERATURE – °C 400 600 200 100 300 500 700 PS (mW) IS (mA) Surface Mount SO-8 Product 200 400 600 800 1000 0 25 50 75 100 125 150 175 TS – CASE TEMPERATURE – °C PS (mW) IS (mA) POWER OUTPUT – P S, INPUT CURRENT – I S Surface Mount SSO-6/SSO-8 Product POWER OUTPUT – P S, INPUT CURRENT – I S 0 25 50 75 100 125 150 175 200

Parameter Symbol Min Max Units Condition Storage Temperature TS -55 125 °C Operating Temperature TA -40 105 °C Reverse Input Voltage VR 5 V Supply Voltage VDD 6.5 V Average Forward Input Current IF – 8 mA Peak Forward Input Current (IF at 1 μs pulse width, <10% duty cycle) IF(TRAN) – 1 A ≤1 μs Pulse Width, <300 pulses per second 80 mA ≤1 μs Pulse Width, <10% Duty Cycle Output Current IO 10 mA Output Voltage VO –0.5 VDD +0.5 V Input Power Dissipation PI 14 mW Output Power Dissipation PO 20 mW Lead Solder Temperature TLS 260°C for 10 sec., 1.6 mm below seating plane Solder Reflow Temperature Profile See Package Outline Drawings section Recommended Operating Conditions Parameter Symbol Min Max Units Operating Temperature TA - 40 105 °C Input Current, Low Level IFL 0 250 μA Input Current, High Level IFH 1.6 6.0 mA Power Supply Voltage VDD 2.7 5.5 V Forward Input Voltage VF (OFF) 0.8 V Electrical Specifications (DC) Over the recommended temperature (TA = –40°C to +105°C) and supply voltage (2.7 V ≤ VDD ≤ 5.5 V). All typical specifi- cations are at VDD = 5 V and TA = 25°C. Parameter Symbol Channel Min Typ Max Units Test Conditions Input Forward Voltage VF 0.95 1.3 1.7 V IF = 2 mA Figure 1, 2 Input Reverse Breakdown Voltage BVR 3 5 V IR = 10 μA Logic High Output Voltage VOH VDD - 0.1 VDD V IF = 0 mA, VI = 0 V (RT = 1.68 kΩ) or (RT = 870 Ω), IO = -20 μA VDD - 1.0 VDD V IF = 0 mA, VI = 0 V (RT = 1.68 kΩ) or (RT = 870 Ω), IO = -3.2 mA Logic Low Output Voltage VOL 0.03 0.1 V IF = 2 mA, VI = 5 V (RT = 1.68 kΩ) or VI = 3.3V (RT = 870 Ω), IO = 20 μA 0.18 0.4 V IF = 2 mA, VI = 5 V (RT = 1.68 kΩ) or VI = 3.3V (RT = 870 Ω), IO = 3.2 mA Input Threshold Current ITH 0.7 1.3 mA Figure 3 Logic Low Output Supply Current IDDL Single 0.8 1.3 mA Figure 4 Dual 1.6 2.6 Logic High Output Supply Current IDDH Single 0.8 1.3 mA Figure 5 Dual 1.6 2.6 Input Capacitance CIN 60 pF f = 1 MHz, VF = 0 V Input Diode Temperature Coefficient ΔVF/ΔTA -1.6 mV/°C IF = 2 mA

Figure 8. Recommended printed circuit board layout and input current limiting resistor selection. capacitor. Capacitor values should be 0.1 μF.

Optocoupler CMR Performance The principal protection against common mode noise, comes from the fundamental isolation properties of the optocoupler, and this in turn is directly related to the Input-Output leakage capacitance of the optocoupler. To provide maximum protection to circuitry connected to the input or output of the optocoupler the leakage capac- itance is minimized by having large separation distances at all points in the optocoupler construction, including the LED/photodiode interface. In addition to the optocouplers basic physical construc - tion, additional circuit design steps mitigate the effects of common mode noise. The most important of these is the Faraday shield on the photodetector stage. A Faraday shield is effective in optocouplers because the internal modulation frequency (light) is many orders of magnitude higher than the common mode noise frequency. Improving CMR Performance at the Application Level In an end application it desirable that the optocouplers common mode isolation be as close as possible to that indicated in the data sheet specifications. The first step in meeting this goal is to ensure maximum separation between PCB interconnects on either side of the opto- coupler is maintained and that PCB tracks beneath the optocoupler are avoided. It is inevitable that a certain amount of CMR noise will be coupled into the inputs and this can potentially result in false-triggering of the input. This problem is frequently observed in devices with input high input impedance. In some cases this can cause momentary missing pulses and may even cause input circuitry to latch-up in some alternate technologies. The ACPL-x6xL optocoupler family does not have an input latch-up issue. Even at very high CMR levels such as those experienced in end equipment level tests (for example IEC61000-4-4) the ACPL-x6xL series is immune to latch-up because of the simple diode structure of the LED. In some cases achieving the rated data sheet CMR per - formance level is not possible in an application. This is often because of the practical need to actually connect the isolator input to the output of a dynamically changing signal rather than tying the input statically to VDD or GND. A data sheet CMR “specmanship” issue is often seen with alternative technology isolators that are based on AC encoding techniques. To address the need to define achievable end application performance on data sheets, the ACPL-x6xL optocouplers include an additional typical performance specification for dynamic CMR in the electrical parameter table. The dynamic CMR specification indicates the typical achiev - able CMR performance as the input is being toggled on or off during a CMR transient. The logic output the ACPL-x6xL optocouplers is mainly controlled by LED current level, and since the LED current features very fast rise and fall times, dynamic noise immunity is essentially the same as static noise immunity. Despite their immunity to input latch-up and the excellent dynamic CMR immunity, ACPL-x6xL opto - coupler devices are still potentially vulnerable to miss- operation caused by the LED being turned either on or off during a CMR disturbance. If the LED status could be ensured by design, the overall application level CMR performance would be that of the photodetector. To benefit from the inherently high CMR capabilities of the ACPL-x6xL family, some simple steps about operating the LED at the application level should be taken. In particular, ensure that the LED stays either on or off during a CMR transient. Some common design techniques to accomplish this are: Keep the LED On: i) Overdrive the LED with a higher than required forward current. Keep the LED Off: i) Reverse bias the LED during the off state. ii) Minimize the off-state impedance across the anode and cathode of the LED during the off state. All these methods allow the full CMR capability of the ACPL-x6xL family to be achieved, but they do have practical implementation issues or require a compromise on power consumption. There is, however, an effective method to meet the goal of maintaining the LED status during a CMR event with no other design compromises other than adding a single resistor. This CMR optimization takes advantage of the differential connection to the LED. By ensuring the common mode impedances at both the cathode and anode of the LED are equal, the CMR transient on the LED is effectively canceled. As shown in Figure 11, this is easily achieved by using two, instead of one, input bias resistors.

Figure 12. AC equivalent circuit of ACPL-x6xL. Table 1. Common Mode Pulse Polarity and LED Current Transients