ACPL-024L-000E

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Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 11

Technical content

Features

• CMOS output
• Wide supply voltage: 2.7 V – 5.5 V
• Low power supply current IDD: 1.1 mA/channel max.
• Low forward current IF: 1.6 mA min
• Speed: 5 MBd typ
• Pulse width distortion (PWD): 200 ns max
• Propagation delay skew (tpsk): 220 ns max
• Propagation delay (tp): 250 ns max
• Common mode rejection: 25 kV/μs min at VCM = 1000 V
• Hysteresis: 0.2 mA typ
• Temperature range: -40 °C to 105 °C
• Safety and regulatory approvals – UL 1577 recognized – 3750 Vrms for 1 minute for ACPL-M21L/021L/024L – CSA Approval – IEC/EN 60747-5-5, Approval for Reinforced Insulation

Applications

• Low isolation of high speed logic systems
• Computer peripheral interface
• Microprocessor system interface
• Ground loop elimination
• Pulse transformer replacement
• High speed line receiver
• Power control systems

Description

ACPL-M21L (single channel SO-5 package), ACPL-021L (single channel SO-8 package) and ACPL-024L (dual channel SO-8 package) are optically-coupled logic gates. The detector IC has CMOS output stage and optical receiver input stage with built-in Schmitt trigger to provide logic-compatible waveforms, eliminating the need for additional waveshaping. An internal shield on the ACPL-M21L/021L/024L guar - antees common mode transient immunity of 25 kV/µs at a common mode voltage of 1000 V. The ACPL-x2xL optocouplers' series operates from a 2.7 V to 5.5 V supply with guaranteed AC and DC performance from an extended temperature range of -40 °C to 105 °C. Glitches free output upon power-up and power-down of optocou- pler. Functional Diagram ACPL-021L Anode VDD GND VO Shield Cathode Anode VDD GND VO Shield 1NC NC 4 Cathode NC ACPL-M21L ACPL-024L

1 VDD

Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product

Ordering Information

ACPL-M21L, ACPL-024L and ACPL-021L are UL Recognized with 3750 Vrms for 1 minute per UL1577. Part number Option Package Surface Mount Tape & Reel UL1577

5000 Vrms /

1 Minute Rating IEC/EN 60747-5-5 QuantityRoHS Compliant

ACPL-M21L -000E SO-5 X 100 per tube -060E X X 100 per tube -500E X X 1500 per reel -560E X X X 1500 per reel ACPL-024L -000E SO-8 X 100 per tube -060E X X 100 per tube -500E X X 1500 per reel -560E X X X 1500 per reel ACPL-021L -000E SO-8 X 100 per tube -060E X X 100 per tube -500E X X 1500 per reel -560E X X X 1500 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-M21L-500E to order product of SO-5 package in Tape and Reel packaging with RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.

7.0 ± 0.2 (0.276 ± 0.008) 2.5 ± 0.1 (0.098 ± 0.004) 0.102 ± 0.102 (0.004 ± 0.004) 4.4 ± 0.1 (0.173 ± 0.004) 1.27 (0.050)BSC 0.15 ± 0.025 (0.006 ± 0.001) 0.71 (0.028) MIN 0.4 ± 0.05 (0.016 ± 0.002) 3.6 ± 0.1* (0.142 ± 0.004) Dimensions in millimeters (inches). Note: Foating Lead Protrusion is 0.15 mm (6 mils) max. * Maximum Mold /f_lash on each side is 0.15 mm (0.006). 7° MAX. MAX. LEAD COPLANARITY = 0.102 (0.004) 8.27 (0.325) 1.8 (0.072) 2.5 (0.10) 1.3 (0.05) 0.5 (0.02) 4.4 (0.17) LAND PATTERN RECOMMENDATION 0.3 (0.01)

ACPL-024L/021L SO-8 Package Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used. Regulatory Information The ACPL-M21L/024L/021L is approved by the following organizations: UL Approval under UL 1577, component recognition program up to VISO = 3750 VRMS for ACPL-M21L/024L/021L CSA Approval under CSA Component Acceptance Notice #5. IEC/EN 60747-5-5 (Option 060 only) XXXV YWW 8 7 6 5 4321 5.994 ± 0.203 (0.236 ± 0.008) 3.937 ± 0.127 (0.155 ± 0.005) 0.406 ± 0.076 (0.050) BSC 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.060) 45° X 0.432 (0.017) 0.228 ± 0.025 (0.009 ± 0.001) TYPE NUMBER (LAST 3 DIGITS) DATE CODE 0.305 (0.012) MIN. 0.203 ± 0.102 (0.008 ± 0.004) PIN ONE 0 ~ 7° * Total package length (inclusive of mold /f_lash) Dimensions in Millimeters (Inches). Note: Floating lead protrusion is 0.15 mm (6 mils) max. Lead coplanarity = 0.10 mm (0.004 inches) max. Option number 500 not marked. LAND PATTERN RECOMMENDATION 7.49 (0.295) 1.9 (0.075) 0.64 (0.025) 3.95 (0.156) 1.3 (0.5)

Insulation and Safety Related Specifications Parameter Symbol ACPL-M21L ACPL-024L ACPL-021L Units Conditions Minimum External Air Gap (Clearance) L(101) 5 4.9 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(102) 5 4.8 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. Tracking Resistance (Comparative Tracking Index) CTI 175 175 Volts DIN IEC 112/VDE 0303 Part 1 Isolation Group IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1) IEC/EN 60747-5-5 Insulation Characteristics* (Option 060) Description Symbol Characteristic Unit ACPL-M21L/ 024L/021L Installation classification per DIN VDE 0110/39, Table 1 for rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 600 Vrms for rated mains voltage ≤ 1000 Vrms I – IV I – III I – II Climatic Classification 55/105/21 Pollution Degree (DIN VDE 0110/39) 2 Maximum Working Insulation Voltage VIORM 567 Vpeak Input to Output Test Voltage, Method b* VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial discharge < 5 pC VPR 1063 Vpeak Input to Output Test Voltage, Method a* VIORM x 1.6 = VPR, Type and Sample Test, tm = 10 sec, Partial discharge < 5 pC VPR 896 Vpeak Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) VIOTM 6000 Vpeak Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature TS 150 °C Input Current IS, INPUT 150 mA Output Power PS, OUTPUT 600 mW Insulation Resistance at TS, VIO = 500 V RS >109 W * Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. ** Refer to the following figure for dependence of PS and IS on ambient temperature.

Parameter Symbol Min Max Units Condition Storage Temperature TS -55 125 °C Operating Temperature TA -40 105 °C Reverse Input Voltage VR 5 V Supply Voltage VDD 6.5 V Average Forward Input Current IF 8 mA Peak Forward Input Current IF(TRAN) 1 A ≤ 1 μs Pulse Width, < 300 pulses per second Output Current IO 10 mA At max VDD Output Voltage VO -0.5 VDD +0.5 V Lead Solder Temperature TLS 260 °C for 10 sec., 1.6 mm below seating plane Solder Reflow Temperature Profile See Package Outline Drawings section Recommended Operating Conditions Parameter Symbol Min Max Units Operating Temperature TA -40 105 °C Input Current, Low Level IFL 0 250 μA Input Current, High Level IFH 1.6* 6 mA Power Supply Voltage VDD 2.7 5.5 V Forward Input Voltage VF (OFF) 0.8 V * The initial switching threshold is 1.6 mA or less. It is recommended that 2.2 mA be used to permit at least a 20% LED degradation guardband. Electrical Specifications (DC) Over recommended temperature (TA = -40 °C to 105 °C) and supply voltage (2.7 V ≤ VDD ≤ 5.5 V). All typical specifications are at VDD = 2.7 V, TA = 25 °C, unless otherwise specified. Parameter Symbol Channel Min Typ Max Units Test Conditions Input Forward Voltage VF 1.5 2.0 V IF = 2.2 mA (Figure 1 & 2) Input Reverse Breakdown Voltage BVR 8 11 V IR = 10 μA Logic High Output Voltage VOH VDD - 0.1 V IF = 2.2 mA, IO = -20 μA VDD - 1.0 V IF = 2.2 mA, IO = -3.2 mA (Figure 3) Logic Low Output Voltage VOL 0.001 0.1 V IF = 0 mA, IO = 20 μA 0.15 0.4 V IF = 0 mA, IO = 3.2 mA (Figure 4) Input Threshold Current ITH 0.5 1.4 mA Figure 5 Logic Low Output Supply Current IDDL Single 0.6 1.1 mA VF = 0 V, VDD = 5.5 V, IO = Open (Figure 6)Dual 1.2 2.2 Logic High Output Supply Current IDDH Single 0.5 1.1 mA IF = 2.2 mA, VDD = 5.5 V, IO = Open (Figure 7)Dual 1.0 2.2 Input Capacitance CIN 77 pF f = 1 MHz, VF = 0 V Input Diode Temperature Coefficient ΔVF/ΔTA -1.9 mV/°C IF = 2.2 mA

Figure 12. Circuit for tPLH, tPHL, tr, tf

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Figure 13. Recommended printed circuit board layout and input current limiting resistor selection