ACML-7400

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Technical content

Features

Dual supply voltage compatible – 3.3 V & 5 V Wide operating temperature range (-40° C to +105° C) Support high speed data rate of at least 100 MBd Lower power consumption – 15 mA per channel typical Low propagation delay: 36 ns max Low propagation delay skew – Channel-to-channel: 4 ns max – Part-to-part: 8 ns max Low pulse width distortion: 3 ns max Safety and Regulatory Approvals UL Recognised – 5600 V RMS for 1 min. per UL1577 – CSA Component Acceptance Notice #5 IEC 60950-1 – Basic Insulation, 800 V RMS max. working voltage – Reinforced Insulation, 400 V RMS max. working voltage IEC 61010-1 – Basic Insulation, 800 V RMS max. working voltage – Reinforced Insulation, 400 VRMS max. working voltage IEC 60601-1 – 2 Means of Patient Protection, 250 V RMS max. working voltage – 2 Means of Operator Protectioin, 400 V RMS max. working voltage High Common Mode Transient Immunity – 25 kV/s min CMOS buff er input and output DC correctness Lead-free Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product

Device Number Channel Confi guration Package ACML-7400 Quad, All-in-One 16-pin Small Outline, Wide Body ACML-7410 Quad, Bi-directional, 3/1 16-pin Small Outline, Wide Body ACML-7420 Quad, Bi-directional, 2/2 16-pin Small Outline, Wide Body

Ordering Information

ACML-7400, ACML-7410 and ACML-7420 are UL Recognized with 5600 VRMS for 1 minute per UL1577. Part number Option Package Surface Mount Tape & Reel UL 5600 VRMS /

1 Minute rating QuantityRoHS Compliant

-000E Wide Body SO-16 X X 45 per tube -500E X X X 850 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACML-7420-500E to order product of Wide Body SO-16 package in Tape and Reel in RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.

VDD1, VDD2 Power supply at primary and secondary side GND1, GND2 Ground at primary and secondary side VIN1, VIN2, VIN3, VIN4 Input for channel 1, 2, 3 and 4 VO1, VO2, VO3, VO4 Output for channel 1, 2, 3 and 4 VOE1, VOE2 Output enable at VDD1 and VDD2 side, these pins should be connected to the respective VDD when not in use. NC No connectivity Truth Table (ACML-7410) VDD1 VIN1,IN2,IN3 VOE1 VO4 VDD2 VIN4 VOE2 VO1, O2, O3 Remark HH XXHXH o r NC H Input (V IN1, IN2, IN3) logic High during normal operation. The default state for VOE2 is High state. HL XXHXH o r NC L Input (V IN1, IN2, IN3) logic Low during normal operation. The default state for VOE2 is High state. H X X X H X L Z Output (V O1, O2, O3) is disabled to high impedance state when VOE2 is set to Low. L X X X H X H H When V DD1 is not powered, the output (VO1, O2, O3) default state is High. Output (VO1, O2, O3) typically restored 100 s after VDD1 is restored. H X H or NC HHHXX I nput (VIN4) logic High during normal operation. The default state for VOE1 is High state. H X H or NC L H L X X Input (V IN4) logic Low during normal operation. The default state for VOE1 is High state. H X L Z H X X X Output (V O4) is disabled to high impedance state when VOE1 is set to Low. H X H H L X X X When V DD2 is not powered, the output (VO4) default state is High. Output (VO4) typically restored 100 s after VDD2 is restored. X means don’t care NC means not connection.

ACML-7400, ACML-7410 and ACML-7420 16-Lead Surface Mount (SOIC-16) Package Recommended Pb-Free IR Profi le Recommended refl ow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used. Regulatory Information The ACML-7400, ACML-7410 and ACML-7420 are approved by the following organizations: UL UL1577, component recognition program. CSA Component Acceptance Service Notice #5A. 7.493 ± 0.254 (0.295 ± 0.010) 10111213141516 87654321 0.457 (0.018) 3.505 ± 0.127 (0.138 ± 0.005) 10.312 ± 0.254 (0.406 ± 0.10) 10.160 ± 0.254 (0.408 ± 0.010) 0.025 MIN. 0.203 ± 0.076 (0.008 ± 0.003) STANDOFF 8.986 ± 0.254 (0.345 ± 0.010) 0-8° 0.457 (0.018) 1.270 (0.050) ALL LEADS TO BE COPLANAR ± 0.002 A 7400 YYWW TYPE NUMBER DATE CODE DIMENSIONS IN MILLIMETERS AND (INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX. 11.63 (0.458) 2.16 (0.085) 0.64 (0.025) LAND PATTERN RECOMMENDATION TUV Rheinland Insulation Category IEC 60950-1 IEC 61010-1 IEC 60601-1 Reinforced Basic Reinforced Basic

2 Means of

(567 VPEAK)

800 VRMS

(1132 VPEAK)

400 VRMS

(567 VPEAK) (1132 VPEAK)

250 VRMS

(354 VPEAK) (567 VPEAK)

Insulation and Safety Related Specifi cations Parameter Symbol ACML-7400 ACML-7410 ACML-7420 Units Conditions Minimum External Air Gap (Clearance) L(101) 8.1 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(102) 8.1 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.05 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1 Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1) All creepage and clearance pertain to the isolation component itself. These dimensions are needed as a starting point for the designer when determining the circuit insulation requirements, and not refl ective of the equipment standard requirements. Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature T S -55 +125 °C Ambient Operating Temperature T A -40 +125 °C Supply Voltages V DD1, VDD2 0 6.5 Volts Input Voltage V I -0.5 V DD +0.5 Volts Output Voltage V O -0.5 V DD +0.5 Volts Average Output Current I O ±15 mA Electrostatic Discharge Human Body Model HBM ±4 kV Charge Device Model CDM ±1 kV Solder Refl ow Temperature Profi le Please refer to Solder Refl ow Temperature Profi le Recommended Operating Conditions Parameter Symbol Min. Max. Units Notes Ambient Operating Temperature T A -40 +105 °C Supply Voltages ( 3.3 V operation) V DD1, VDD2 3.0 3.6 V Supply Voltages ( 5 V operation) V DD1, VDD2 4.5 5.5 V Logic High Input Voltage V IH 0.7 x VDD VDD V Logic Low Input Voltage V IL 0.0 0.3 x V DD V

Electrical Specifi cations The following specifi cations apply to ACML-7400 and are applicable to ambient temperature of -40° C ≤ T A ≤ 105° C, All typical specifi cations at TA = +25° C. Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Notes Input Supply Current, No data IDD1(0) 5.9* 10 mA No Input 1,7 1 Input Supply Current,

25 MBd data rate

IDD1(25) 16 mA V DD1 = 3.3 V 12.5 MHz logic signal 1,7 2 17 V DD1 = 5.0 V Input Supply Current,

100 MBd data rate

IDD1(100) 30* 40 mA V DD1 = 3.6 V 50 MHz logic signal 1,7 2 31** 40 V DD1 = 5.5 V Output Supply Current, No data IDD2(0) 12* 16 mA No Input 2,8 3 13** V DD1 = 5.5 V Output Supply Current,

25 MBd

IDD2(25) 15 mA V DD1 = 3.3 V 12.5 MHz logic signal 2,8 4 17 V DD1 = 5.0 V Output Supply Current, IDD2(100) 23* 32 mA V DD1 = 3.6 V 50 MHz logic signal 2,8 4 30** 40 V DD1 = 5.5 V Logic Input Current I IN -10 10 A Logic High Output Voltage VOH VDD-0.1 V DD-0.02 V IOUT = -20 A, VIN = VDD1 0.8*VDD VDD-0.25 V I OUT = -4 mA, VIN = VDD1 Logic Low Output Voltage VOL 0.02 0.1 V IOUT = 20 A, VIN = 0 V 0.25 0.8 V I OUT = 4 mA, VIN = 0 V * Typical data based on 3.3 V supply, ** Typical data based on 5.0 V supply The following specifi cations apply to ACML-7410 and are applicable to ambient temperature of -40° C ≤ T A ≤ 105° C, All typical specifi cations at TA = +25° C. Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Notes Input Supply Current, No data IDD1(0) 8.4* 11.5 mA No Input 3,7 1 Input Supply Current, IDD1(25) 15.5* mA V DD1 = 3.3 V 12.5 MHz logic signal 3,7 2 17** V DD1 = 5.0 V Input Supply Current, IDD1(100) 28.5* 38 mA V DD1 = 3.6 V 50 MHz logic signal 3,7 2 30.5** 40 V DD1 = 5.5 V Output Supply Current, No data IDD2(0) 9.5* 14.5 mA No Input 4,8 3 10.4** V DD1 = 5.5 V Output Supply Current, IDD2(25) 15* mA V DD1 = 3.3 V 12.5 MHz logic signal 4,8 4 17** V DD1 = 5.0 V Output Supply Current, IDD2(100) 25* 34 mA V DD1 = 3.6 V 50 MHz logic signal 4,8 4 30** 40 V DD1 = 5.5 V Logic Input Current I IN -10 10 A Logic High Output Voltage VOH VDD-0.1 V DD-0.02 V IOUT = -20 A, VIN = VDD1 0.8*VDD VDD-0.25 V I OUT = -4 mA, VIN = VDD1 Logic Low Output Voltage VOL 0.02 0.1 V IOUT = 20 A, VIN = 0 V 0.25 0.8 V I OUT = 4 mA, VIN = 0 V * Typical data based on 3.3 V supply, ** Typical data based on 5.0 V supply

The following specifi cations apply to ACML-7420 and are applicable to ambient temperature of -40° C ≤ T A ≤ 105° C, All typical specifi cations at TA = +25° C. Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Notes Input Supply Current, No data IDD1(0) 9.0* 13 mA No Input 5,7 1 Input Supply Current, IDD1(25) 15* mA V DD1 = 3.3 V 12.5 MHz logic signal 5,7 2 17** V DD1 = 5.0 V Input Supply Current, IDD1(100) 27* 36 mA V DD1 = 3.6 V 50 MHz logic signal 5,7 2 30** 40 V DD1 = 5.5 V Output Supply Current, No data IDD2(0) 9.0* 13 mA No Input 6,8 3 Output Supply Current, IDD2(25) 15* mA V DD1 = 3.3 V 12.5 MHz logic signal 6,8 4 17** V DD1 = 5.0 V Output Supply Current, IDD2(100) 27* 36 mA V DD1 = 3.6 V 50 MHz logic signal 6,8 4 30** 40 V DD1 = 5.5 V Logic Input Current I IN -10 10 A Logic High Output Voltage VOH VDD-0.1 V DD-0.02 V IOUT = -20 A, VIN = VDD1 0.8*VDD VDD-0.25 V I OUT = -4 mA, VIN = VDD1 Logic Low Output Voltage VOL 0.02 0.1 V IOUT = 20 A, VIN = 0 V 0.25 0.8 V I OUT = 4 mA, VIN = 0 V * Typical data based on 3.3 V supply, ** Typical data based on 5.0 V supply

The following specifi cations apply to ACML-7400, ACML-7410 and ACML-7420 and are applicable to ambient tempera- Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Notes Maximum Data Rate 100 MBd 50 MHz Logic Signal Minimum Pulse Width 10 ns 50 MHz Logic Signal Propogation Delay Time to Logic Low Output t PHL 18 27 32 ns 4.5 V ≤ V DD1 = VDD2 ≤ 5.5 V, CL = 15 pF Propogation Delay Time to Logic High Output tPLH 18 27 32 ns 9 5 Pulse Width Distortion PWD -2 0 2 ns 11 6 Propagation Delay Channel Skew tCSK 0 3 ns 12 7 Propagation Delay Part Skew tPSK 1 5 ns 8 Propogation Delay Time to Logic Low Output tPHL 20 28 36 ns C L = 15 pF 9,10 5 Propogation Delay Time to Logic High Output tPLH 20 27.5 36 ns 9,10 5 Pulse Width Distortion PWD -3 0.5 3 ns 11 6 Propagation Delay Channel Skew tCSK 0 4 ns 12 7 Propagation Delay Part Skew tPSK 1 8 ns 8 Output Rise Time (10% – 90%) t R 3n s C L = 15 pF Output Fall Time (90% - 10%) t F 3n s C L = 15 pF Output Enable time t ENABLE 10 ns V IN = 0 V or VDD 9 Output Disable time t DISABLE 10 ns V IN = 0 V or VDD 10 Common Mode Transient Immunity at Logic High Output | CM H | 25 >40 kV/s VCM = 1000 V, TA = 25° C, VIN = VDD VO > 0.8 x VDD Common Mode Transient Immunity at Logic Low Output | CM L | 25 >40 kV/s VCM = 1000 V, TA = 25° C, VIN = 0 V, VO < 0.8 V

All Typicals at TA = 25° C. Parameters Symbol Min. Typ. Max. Unit Test Conditions Notes Input-Output Momentary With-stand Voltage VISO 5600 V RMS RH ≤ 50%, t = 1 min, TA = 25°C 12, 13, Input-Output Resistance R I-O 1014  VI-O = 500 V dc 12 Input-Output Capacitance C I-O 1.9 pF f = 1 MHz 12 Input Capacitance C I 4.3 pF 15 Package Power Dissipation P PD 750 mW T A = 25° C Notes: 1. I DD1(0) is the supply current consumption at VDD1 of ACML-7400, ACML-7410 and ACML-7420 when there is no signal to all inputs. 2. I DD1(F) is the supply current consumption at VDD1 of ACML-7400, ACML-7410 and ACML-7420 when inputs are switching at the specifi ed data rate, and outputs are switching at same data rate with no load. 3. I DD2(0) is the supply current consumption at VDD2 of ACML-7400, ACML-7410 and ACML-7420 when there is no signal to all inputs. 4. I DD2(F) is the supply current consumption at VDD2 of ACML-7400, ACML-7410 and ACML-7420 when inputs are switching at the specifi ed data rate, and outputs are switching at same data rate with no load. 5. t PHL propagation delay is measured from the 50% level on the falling edge of the VIN signal to the 50% level of the falling edge of the VOUT signal. tPLH propagation delay is measured from the 50% level on the rising edge of the VIN signal to the 50% level of the rising edge of the VOUT signal. 6. PWD is defi ned as tPHL -tPLH. 7. t CSK is equal to the magnitude of the worst case diff erence in t PHL and/or tPLH that will be seen between channels of the same unit at any given temperature and supply voltages within the recommended operating conditions. 8. t PSK is equal to the magnitude of the worst case diff erence in tPHL and/or tPLH that will be seen between units at any given temperature and supply voltages within the recommended operating conditions. 9. t ENABLE is the duration when VOE is set to High state and output is restored per input signal (VO = VIN). 10. t DISABLE is the duration when VOE is set to Low and VO is switched to high impedance state. 11. CM H is the maximum common mode voltage slew rate that can be sustained while maintaining V OUT > 0.8 VDD2. CML is the maximum common mode input voltage that can be sustained while maintaining VOUT < 0.8 V. The common mode voltage slew rates apply to both rising and falling common mode voltage edges. 12. Device considered a two-terminal device: pins 1, 2, 3, 4, 5, 6, 7, 8 shorted together and pins 9, 10, 11, 12, 13, 14, 15 an d 16 shorted together. 13. In accordance with UL1577, each ACML-7400, ACML-7410 AND ACML-7420 device is proof tested by applying an insulation test voltage 6800 VRMS for 1 second. 14. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-outp ut continuous voltage rating. For the continuous voltage rating refers to your equipment level safety specifi cation. 15. C I is the capacitance measured at input pin.

pins should be as short as possible. Figure 13. Typical Schematic of ACML-7410 on PC Board how quickly a logic signal propagates through a system. from high to low. Please see Figure 14. Figure 14. Threshold Levels of AC Parameters

0 VVIN

Figure 15. Illustration of TPSK Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved. be sent through the isolators. longest propagation delay, either tPLH and tPHL. recommended temperature and power supply ranges.