ACM1002A AZDISPLAYS | Alldatasheet
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AZ DISPLAYS, INC. PART NUMBER: ACM1002A Series REVISED: MARCH 14, 2006 COMPLETE LCD SOLUTIONS SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY
General Specification Table 1 Item Standard Value Unit Character Format □Dot-Graphic ■Character □Digits □ ■with ICON Dots Module Dimension 38.0(W) *25.5(H) *1.8(T) mm Viewing Area 34.0(W) * 14.0(H) mm Dot Size 0.5(W) *0.75(H) mm Dot Pitch 0.55(W) * 0.8(H) mm Character Size 2.7(W) * 5.55(H) Character Pitch 3.2(W) * 6.25(H) Driving 1/18duty, 1/5bias View Direction 6H ■ 12H □ Other: □ Polarizer Type □TN, Positive □TN, Negative □HTN, Positive □HTN, Negative □STN, Yellow-Green ■STN, Gray □STN, Blue □FSTN, Positive □FSTN, Negative □Color STN □FM LCD Display Mode □Transmissive □Reflective ■Transflective □Anti-Glare Driver IC PCF2119_RU/2（PHILIPS） Interface 6800 □ 8080□ Ｉ2Ｃ■ DC/DC Converter Internal ■ External □ Operation Temperature -20℃— +70℃ Storage Temperature -30℃— +80℃
ELECTRICAL CHARACTERISTICS
No ITEM Symbol Min. Typ. Max. Unit
1 OPERATING TEMPERATURE TOP -20 - 70 ℃
2 STORAGE TEMPERATURE TST -30 - 80 ℃
3 SUPPLY VOLTAGE FOR LOGIC VDD VSS - 6.5 V 4 SUPPL Y VOLTAGE FOR LCD VLCD VSS - 7.5 V 5 INPUT VOLTAGE VIN VSS - VDD+0.5 V
6 STATIC ELECTRICITY Be sure that you are grounded when handing LCM
(Ta=25 , V℃ DD=5.0V) Table 4 No Item Symbol Condition Min. Typ. Max. Unit 1 Supply Voltage For Logic VDD-VSS / / 5.0 / V
2 Supply Voltage For LCD Driver VDD-Vo
(VLCD) / / 5.0 / V 3 Input High Voltage VIH H level 0.7VDD / VDD V 4 Input Low Voltage VIL L level VSS / 0.3VDD V
5 Supply Current For Logic IDD / / / 1 mA
1 SCL I I2C-bus serial clock input
2 SDA I I2C-bus serial data input
3 VDD Power
Supply Logic supply voltage.
4 VSS Power
5 VLCD VO This input is used for the generation of the LCD bias levels.
6 RESET I The external reset is active HIGH
3.4 Commands
- I2C-bus timing diagram. Timing characteristics: I2C-bus interface: note 2 fSCL SCL clock frequency - - 400 kHz tLOW SCL clock low period 1.3 - - ms tHIGH SCL clock high period 0.6 - - ms tSU;DAT data set-up time 100 - - ns tHD;DAT data hold time 0 - - ns tr SCL, SDA rise time notes 1 and 3 15 + 0.1CB - 300 ns tf SCL, SDA fall time notes 1 and 3 15 + 0.1CB - 300 ns CB capacitive bus line load - - 400 pF tSU;STA set-up time for a repeated START condition 0.6 - - ms tHD;STA START condition hold time 0.6 - - ms tSU;STO set-up time for STO condition 0.6 - - ms tSW tolerable spike width on bus - - 50 ns tBUF bus free time between STOP and START condition 1.3 - - ms Notes： 1. Tested on a sample basis. 2. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced toVIL and VIH with an input voltage swing of VSS to VDD. 3. CB = total capacitance of one bus line in pF.
Electro-optical Characteristics No Item Symbol Condition Min Typ Max Unit Drive 1 Contrast Ratio CR 4.0 5.0 - - Rise Tr - 160 200 ms Response time Down Tf Ta=23±3℃ θ1=θ2= θ3=θ4=0 - 130 180 ms φ=270 θ1 70 12H φ=90 θ2 30 φ=0 θ3 60 Viewing Angle Range φ=180 Ta=23±3℃ Cr=2 Deg Vop=5.0V 1/18Duty 1/5 Bias f=100HZ LCD Driving Voltage VOP Ta=23±3℃ - 5.0 - V
The display control instructions control the internal state of the PCF2119_RU/2（PHILIPS） Instruction is received from MPU to PCF2119_RU/2（PHILIPS）for the splay control. The following table shows various instructions. X: Don’t care Table 6 Instruction R S R W D B D B D B D B D B D B D B D B
Description
H = 0 or 1 Function set 0 0 0 0 1 D L
0 M S
L H sets interface Data Length (DL) and number of display lines (M); single line/MUX 1 : 9 (SL), extended instruction set control (H) Read busy flag and address counter 0 1 B F AC reads the Busy Flag (BF) indicating internal operating is being performed and reads address counter contents Read data 1 1 read data reads data from CGRAM or DDRAM Write data 1 0 write data writes data from CGRAM or DDRAM H = 0 Clear display 0 0 0 0 0 0 0 0 0 1 clears entire display and sets DDRAM address 0 in address counter Return home 0 0 0 0 0 0 0 0 1 0 sets DDRAM address 0 in address counter; also returns shifted display to original position; DDRAM contents remain unchanged Entry mode set 0 0 0 0 0 0 0 1 I D S sets cursor move direction and specifies shift of display; these operations are performed during data write and read Display control 0 0 0 0 0 0 1 D C B sets entire display on/off (D), cursor
on/off (C) and blink of cursor position character (B); D = 0 (display off) puts chip into the power-down mode Cursor/display shift 0 0 0 0 0 1 S C R L 0 0 moves cursor and shifts display without changing DDRAM contents Set CGRAM address 0 0 0 1 ACG sets CGRAM address; bit 6 is to be set by the command ‘set DDRAM address’; look at the description of the commands Set DDRAM address 0 0 1 ADD sets DDRAM address H = 1 Reserved 0 0 0 0 0 0 0 0 0 1 do not use Screen configuration 0 0 0 0 0 0 0 0 1 L set screen configuration Display configuration 0 0 0 0 0 0 0 1 P Q set display configuration Icon control 0 0 0 0 0 0 1 I M I B D M section mode (IM), icon blink (IB), direct mode(DM) Temperature control 0 0 0 0 0 1 0 0 T C T C set temperature coefficient (TCx) Set HVgen stages 0 0 0 1 0 0 0 0 S S set internal HVgen stages (S1,S0 = 11 not allowed) Set VLCD 0 0 1 V voltage store VLCD in register VA or VB (V) Table7 Explanations of symbols used in Table 6 STATE BIT LOGIC 0 LOGIC 1 I/D decrement increment S display freeze display shift D display off display on C cursor off cursor on B cursor character blink off: character at cursor position does not blink cursor character blink on: character at cursor position blinks S/C cursor move display shift R/L left shift right shift DL 4 bits 8 bits H use basic instruction set use extended instruction set left/right screen: standard connection (as in PCF2114) left/right screen: mirrored connection (as in PCF2116) 1st 16 characters of 32: columns are from 1 to 80 1st 16 characters of 32: columns are from 1 to 80 L (no impact, if M = 1 or SL = 1) 2nd 16 characters of 32: columns are from 1 to 80 2nd 16 characters of 32: columns are from 80 to 1 P r column data: left to right (as in PCF2116); column data is displayed from 1 to 80 column data: right to left; column data is displayed from 80 to 1 Q row data: top to bottom (as in PCF2116); row data is displayed from 1 to 16 and icon row data is in 17 and 18 in single line mode (SL = 1) row data: bottom to top; row data is displayed from 16 to 1 and icon row data is in 18 and in single line mode (SL = 1) Page 6
row data is displayed from 1 to 8 and icon row data in 17 row data is displayed from 8 to 1 and icon row data in 17 IM character mode; full display icon mode; only icons displayed IB icon blink disabled icon blink enabled DM direct mode disabled direct mode enabled V set VA set VB M (no impact, if SL = 1) 1-line by 32 display 2-line by 16 display SL MUX 1 : 18 (1X32 or 2X?16 character display) MUX 1 : 9 (1X16 character display) C0 last control byte; see Table 5 another control byte follows after data/command Table 8 Explanation of TC1 and TC2 used in Table 6 TC1 TC2 DESCRIPTION 0 0 VLCD temperature coefficient 0 1 0 VLCD temperature coefficient 1 0 1 VLCD temperature coefficient 2 1 1 VLCD temperature coefficient 3; for ranges for TC see Chapter 14 Table 9 Explanation of S1 and S2 used in Table 6 S1 S2 DESCRIPTION 0 0 set internal HVgen stages to 1 (2 * voltage multiplier) 0 1 set internal HVgen stages to 2 (3 * voltage multiplier) 1 0 set internal HVgen stages to 3 (4 * voltage multiplier) 1 1 do not use Page 7
AZ Displays, Inc.
AZ Displays, Inc. ACM1002A SERIES
›Ê’c VSS VDD SDA SCL COM8 COM2 SEG50 SEG1 COM10 COM16 RESET AZ Displays, Inc. ACM1002A SERIES