A2550N

CXA2550M SONY | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 15

Technical content

Features

• Low power consumption (35mW at 3.5V)
• APC circuit
• RF level control circuit
• Both single power supply and dual power supply operations possible. Structure Bipolar silicon monolithic IC

Applications

Absolute Maximum Ratings(Ta = 25°C)

• Supply voltage V CC 12 V
• Operating temperature Topr –20 to +75 °C
• Storage temperature Tstg –65 to +150 °C
• Allowable power dissipation PD (SOP) 620 mW (SSOP) 370 mW Operating Conditions Supply voltage V CC – VEE 3.0 to 4.0 V – 1 – CXA2550M/N E97514B25 RF Amplifier for CD Players Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. CXA2550M 20 pin SOP (Plastic) CXA2550N 20 pin SSOP (Plastic) VC VC 10k 8k 6p VC VC 10k 8k 6p VC 13.4k VCC 50µA 10k 56k10kVEE 10k 55k 10k 56k VCC VEE APC LD AMPAPC PD AMP VREF 1.25V VCC 15k VC 54k VEE VC VC 13k 12p VEE VC 25k 260k 260k 26k 13k12p VC VC 32k 32k 24p 174k 24p 87k 154k FOCUS ERROR AMP 30k 30k 96k 11 TRACKING ERROR AMP 15k VC VCC 30k 30k VEE 1AGCVTH LD PD PD1 PD2 V EE F E EI VC VCC LD_ON AGCCONT (50%/30%/OFF) RFTC RF I RF O RFM FE FE_BIAS TE 95k VC VC 670mV Block Diagram and Pin Configuration(Top View)

– 2– CXA2550M/N Pin Description Pin No. Symbol I/O Equivalent circuit Description

1 AGCVTH —

Reference level variable pin for RF level control. The reference level can be varied by the external resistor. 147 13.4k 50µ 10µ 2 LD O APC amplifier output pin. PD1 PD2 I I Inversion input pin for RF I-V amplifiers. Connect these pins to the photodiodes A + C and B + D respectively. The current is supplied. 10k 3 PD I APC amplifier input pin.55k147 10k 20µ 10k 100µ 6 VEE — 6 VEE VEE pin.

– 3– CXA2550M/N F E I I Inversion input pin for F and E I-V amplifiers. Connect these pins to the photodiodes F and E respectively. The current is supplied. 260k 10µ 12p 9 EI — Gain adjustment pin for I-V amplifier. 11 TE O Tracking error amplifier output pin. E-F signal is output. 147 260k 26k 13k

10 VC O

(Vcc + VEE )/2. Connect to GND for ±1.75 power supply; connect a smoothing capacitor for single +3.5V power supply. 200µ 120 120 16k VCC VCC 15k VEE 96k 300µ Pin No. Symbol I/O Equivalent circuit Description

– 4– CXA2550M/N

12 FE_BIAS I Bias adjustment pin for inverted side

of focus error amplifier. 164k 10µ 24p 32k 174k 13 FE O Focus error amplifier output pin. 15 RF O O RF amplifier output pin. 174k 300µ 24p

14 RFM I

RF amplifier inverted side input pin. RF amplifier gain is determined by the resistor connected between this pin and RFO pin. 147 850 147 60k 1m Pin No. Symbol I/O Equivalent circuit Description

– 5– CXA2550M/N

16 RF I I The RF amplifier output RFO is input

with its capacitance coupled. 147 15k 20µ

17 RFTC — External time-constant pin for RF

level control.

19 LD_ON I

APC amplifier ON/OFF switching pin. OFF for Vcc and ON for V EE . 147 50µ 10µ 50µ

18 AGCCONT I

RF level control ON (limit level of 50%/30%)/OFF switching pin. OFF for Vcc, 30% for open or Vc and 50% for V EE . 147 50k 15µ 15µ 147 50µ VREF 20 VCC VCC20 Vcc pin. Pin No. Symbol I/O Equivalent circuit Description

– 6– CXA2550M/N Electrical Characteristics (Ta = 25°C, VCC = 1.75V, VEE = –1.75V, VC = GND) Input GND Input GND Input resistance 33kΩ Input 1kHz 120mVp-p Input 3MHz 120mVpp Input resistance 33kΩ Input 1kHz 120mVp-p Input 1kHz 120mVp-p V13-4 = V13-2 – V13-3 Input resistance 390kΩ Input 1kHz 240mVp-p Input 1kHz 240mVp-p V11-4 = V11-2 – V11-3 LD OFF 6.37 –13.23 –50.0 16.7 1.45 –120.0 16.4 16.4 –3.0 1.25 –50 7.3 7.3 –3.0 1.25 –830 470 1400 –600 9.8 –9.8 –10 19.7 19.4 19.4 10.3 10.3 –330 970 1590 13.23 –6.37 60.0 22.7 –1.25 120.0 22.4 22.4 3.0 –1.25 13.3 13.3 3.0 –1.25 170 1470 100 mA mA mV dB dB V V mV dB dB dB V V mV dB dB dB V V mV mV mV mV

12345678 E 2 E 3 E 4

O O O O O O O O O O O O O O O O O O O O O O 0.8mA 450µA 570µA 0µA 0µA 300mV 300mV 300mV 300mV 2.7V 2.7V 2.7V 2.7V 2.0V 2.0V 0.5V 2.0V RF amplifier FE amplifier TE amplifier APC Output DC measurement Output AC measurement Output AC measurement Output DC measurement Output DC measurement Output DC measurement Output AC measurement Output AC measurement Output DC measurement Output DC measurement Output DC measurement Output AC measurement Output AC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement I1 I2 E1 Current consumption No. Measurement itemSymbol SW conditions Bias conditions Measure- ment pin Description of I/O waveform and measurement method Min. Typ. Max. Unit

– 7– CXA2550M/N –1900 –1700 700 700 2.7 1.3 –100 –1322 –1163 1471 1204 –100 –200 1900 1700 2.2 0.5 100 mV mV mV mV V V V mV No. Measurement item Symbol SW conditions Bias conditions Description of I/O waveform and measurement method Min. Typ. Max. Unit 50% limit 30% limit –50% limit –30% limit High Level Middle Level Low Level V2-7 V2-8 V2-9 V2-10 V18-1 V18-2 V18-3 V10-1 O O O O O O O O O 800µA 700µA 230µA 320µA 50mV 50mV 800mV 800mV 0.5V/ 2.7V 1.3V/ 2.7V 0.5V/ 2.7V 2.2V/ 2.7V 2.0V 2.0V 2.0V 2.0V RF level controlAGCCONT Output DC measurement I1 I2 E1 Center output voltage Level control: 50% – Level control OFF Level control: 30% – Level control OFF Level control: –50% – Level control OFF Level control: –30% – Level control OFF Note)O in the SW conditions 7 represents the OFF state.

– 8– CXA2550M/N Electrical Characteristics Measurement Circuit 0.8mA I2 R1 300 33k 33k 33µ R4 390k 390k AC E1 GND GND GNDGND V EEVEEVCCVCC VEE GND 5.5k R10 10k GND 10k GND 10k GND 10k GND GND VEE R11 1M C2 0.1µVEE VEE VEE 33µ GND 2 3 4 5 6 7 8 9 10 11121314151617181920 1VCC AGCVTH LD_ON LD AGCCONT PD RFTC PD1 RF I PD2 RF O VEE RFM F FE E FE_BIAS EI TE VC

– 9– CXA2550M/N Description of Functions RF Amplifier The photodiode current input to the input pins (PD1, PD2) are current-to-voltage (I-V) converted by the equivalent resistance of 58kΩ at PD I-V amplifiers, respectively. The signal is added by the RF summing amplifier and then the I-V converted output voltage of the photodiode (A + B + C + D) is output to RFO pin. This pin is used check the eye pattern. The frequency response of the RF output signal can be equalized by adding the capacitance (Cp) to RFI pin. The low frequency component of the RFO output voltage is as follows; V RFO = –2.75 × (VA + VB) = 159.5kΩ× (iPD1 + iPD2) Focus Error Amplifier The difference between the RF I-V amplifier output VA and VB is obtained and the I-V converted voltage of the photodiode (A + C – B – D) is output. The FE output voltage (low frequency) is as follows; V FE = 5.4 × (VA – VB) = (iPD2 – iPD1) × 315kΩ GND 33k I-V PD1 58k 2kVA PD1 IV AMP 33k I-V PD2 58k 2kVB PD2 IV AMP RF SUMMING AMP 5.5k RFM RFO Cp VCC 174k 24p 164k 32k 32k 87k 24p VEE 47k FE FE BIAS VB VA – (B + D) – (A + C)

– 10– CXA2550M/N Tracking Error Amplifier Each signal current from the photodiodes E and F is I-V converted and input to Pins 7 and 8 via a resistor which determines the gain. The signal is amplified by the gain amplifier, operated by the tracking error amplifier and then the (F-E) signal is output to Pin 11. The balance adjustment is performed by varying the combined resistance value of the feedback resistors, which are T type-configured at the E I-V amplifier, by using the external resistance value of EI pin. F I-V amplifier feedback resistance value = R F1 + RF2 + = 403kΩ E I-V amplifier feedback resistance value = (RE1 // R1) + RE2 + Leave EI pin open when the balance adjustment is not executed in this IC. The gain for F I-V and E I-V amplifiers becomes the same when EI pin is left open. I-V F R F1 260k 30k I-V E 12p R F3 26k R F2 13k 96k 96kR E1 260k 12p R E2 13k R E3 26k TE 30k EI 22k 4.7k270k R 1 R 2 220k 220k R F1 × R F2 R F3 (RE1 // R1) × R E2 (RE3 // R2)

– 11– CXA2550M/N Center Voltage Generation Circuit This circuit provides the center potential when this IC is used at single power supply. The maximum current is approximately ±3mA. The output impedance is approximately 50Ω . APC & Laser Power Control

• APC When the laser diode is driven by a constant current, the optical power output has extremely large negative temperature characteristics. The APC circuit is used to maintain the optical power output at a constant level. The laser diode current is controlled according to the monitor photo diode output. APC is set to ON by connecting the LD_ON pin to V CC ; OFF by connecting it to VCC . VR 30k 30k VEE VCC VEE VCC LD 100µ 10µH LD PD GND 100 500 PD 10k 55k 10k VEE 130mV R10 56k VCC R11 10k R12 56k VEE VREF R14 12.5k 50µ R15 13.4k 54k VEE 0.01µ RF I RF O 1.1Vp-p RF 670mV VEEVEE AGCVTHRFTC R13 AGCCONT MICRO- COMPUTER LD_ON MICRO- COMPUTER VL

– 12– CXA2550M/N Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. Application Circuit

• For single power supply +3.5V
• For dual power supply ±1.75V 151720 4 5 19 18 16 6 7 9 1314 1112 2 31 AGCVTH LD PD PD1 PD2 V EE F E EI VC V CC LD_ON AGCCONT RFTC RF I RF O RFM FE FE_BIAS TE FOCUSBIAS I_V TRK E GAIN I_VI_V I_V SSP GND47k V CC SSPSSP 5.5k0.01µ GND C3 0.1µR11 1M MICRO-COMPUTERMICRO-COMPUTER+3.5V V CC 33µ/6.3V GND VC R5 270k 22k R5 4.7k VC GND R5 220k EF R4 220k GND VC 33µ/6.3V R3 33kR2 33k A B C D PD 500 100 LD 1µ/6.3V 10µH11 100µ/6.3V V CC GND AGCVTH LD PD PD1 PD2 V EE F E EI VC V CC LD_ON AGCCONT RFTC RF I RF O RFM FE FE_BIAS TE FOCUSBIAS I_V TRK E GAIN I_VI_V I_V SSP V EE 47kV CC SSPSSP 5.5k0.01µ VEE C3 0.1µR11 1M MICRO-COMPUTERMICRO-COMPUTER+1.75V V CC 33µ/6.3V GND R5 270k 22k R5 4.7k GND R5 220k EF R4 220k VEE 33µ/6.3V R3 33kR2 33k A B C D PD 500 100 LD 1µ/6.3V 10µH11 100µ/6.3V V CC GND GND GND VEE GND 151720 4 5 19 18 16 6 7 9 1314 1112 2 31 8

– 13– CXA2550M/N

• LASER POWER CONTROL (LPC) The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. The RF O and RF I levels are compared and the larger of the two is smoothed by the RFTC's external CR. This signal is then compared with the reference level. The laser power is controlled by attaching an offset to V L according to the results of comparison with the reference level. Set the reference level to 670mV. (center voltage reference) When the reference level is changed, connect the external resistor to the AGCVTH pin (Pin 1). The reference level can be lowered by connecting the resistor between Pin 1 and the center output voltage or between Pin 20 and V CC . The AGCCONT pin (pin 18) is used to switch the level of the laser power control circuit; OFF, ON (laser power limit of 30%) and ON (laser power limit of 50%) Note)For the laser power limit, 50% is recommended for PD IC; 30% for LC. Notes on Operation 1. Power supply The CXA2550M/N can be used either at dual power supply or single power supply. The table below shows the connection of power supply for each case. 2. RF amplifier In this circuit, the IC internal phase compensation value is set so as to support the voltage output-type pickup. Therefore, when the current output-type pickup is used, the capacitance of optical pickup and leads etc. are attached to PD1 and PD2 pins and oscillation may occur. 3. laser power control The RF level is stabilized by attaching an offset to the APC V L and controlling the laser power in sync with the RF level fluctuations. Therefore, use this circuit in the state where the focus servo is applied. The laser life is shortened by increasing the laser power when the less light is reflected from the disc. It is recommended that the typical laser power value is set lower to maintain the laser life. Take care of the laser maximum ratings when using the laser power control circuit. AGCCONT H (VCC ) M (VC or OPEN) L (V EE ) LPC OFF ON ON LPC limit 30% 50% VL variable range Approximately 1.27V Approximately 1.27V ± 350mV Approximately 1.27V ± 570mV Dual power supply Single power supply V CC +power supply Power supply VEE –power supply GND VC GND OPEN

– 14– CXA2550M/N Package Outline Unit: mm CXA2550M SONY CODE EIAJ CODE JEDEC CODE SOP-20P-L01 ∗SOP020-P-0300-A PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT COPPER ALLOY SOLDER PLATING EPOXY / PHENOL RESIN 0.3g 20PIN SOP (PLASTIC) 300mil 12.45 – 0.1 + 0.4 20 11 0.45 ± 0.1 1.27 101 5.3 – 0.1+ 0.3 7.9 ± 0.4 6.9 0.2 – 0.05 + 0.1 0.5 ± 0.2 0.1 – 0.05 + 0.2 1.85 – 0.15 + 0.4 0.15 ± 0.12M LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL COPPER ALLOY SOLDER COMPOSITION Sn-Bi Bi:1-4wt% PLATING THICKNESS 5-18 µm SPEC. SCT Ass'y SONY CODE EIAJ CODE JEDEC CODE SOP-20P-L01 ∗SOP020-P-0300-A PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT COPPER ALLOY SOLDER PLATING EPOXY / PHENOL RESIN 0.3g 20PIN SOP (PLASTIC) 300mil 12.45 – 0.1 + 0.4 20 11 0.45 ± 0.1 1.27 101 5.3 – 0.1+ 0.3 7.9 ± 0.4 6.9 0.2 – 0.05 + 0.1 0.5 ± 0.2 0.1 – 0.05 + 0.2 1.85 – 0.15 + 0.4 0.15 ± 0.12M

– 15– CXA2550M/N Package Outline Unit: mm CXA2550N 20PIN SSOP (PLASTIC) SONY CODE EIAJ CODE JEDEC CODE PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.1g SSOP-20P-L01 SSOP020-P-0044 0.1 ± 0.1 0.5 ± 0.2 0˚ to 10˚ DETAIL A NOTE: Dimension "∗" does not include mold protrusion. 0.15 – 0.01 DETAIL B : PALLADIUM + 0.03 b=0.22 ± 0.03 ∗6.5 ± 0.1 ∗4.4 ± 0.1 0.65 20 11 101 A 0.1 1.25 – 0.1 + 0.2 6.4 ± 0.2 0.13 Mb Sony Corporation