A1468 ALLEGRO | Alldatasheet
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PACKAGE: 4-PIN SIP (SUFFIX K) The A1468 is an optimized Hall effect sensing IC that provides a user-friendly solution for digital ring-magnet sensing, or when coupled with a magnet, ferromagnetic target sensing, in three-wire applications. The small device package can be easily assembled into applications for use in conjunction with a wide variety of target shapes and sizes. The integrated circuit incorporates dual Hall effect elements with a 2.2 mm spacing and signal processing that switches in response to differential magnetic signals created by ring- magnet poles. The circuitry contains a sophisticated digital circuit to reduce system offsets, to calibrate the gain for air- gap–independent switchpoints, and to achieve true zero-speed operation. Signal optimization occurs at power-on through the combination of offset and gain adjust, and is maintained throughout the operating time with the use of a running-mode calibration. The running-mode calibration provides immunity to environmental effects such as micro-oscillations of the target or sudden air gap changes. The device is ideally suited to obtaining speed and duty cycle information in ring-magnet–based speed, position, and timing applications, such as in speedometers. The A1468 is available in a 4-pin SIP (suffix K). The package is lead (Pb) free, with 100% matte tin leadframe plating. A1468-DS, Rev. 3
- 4.0 to 26.5 V supply operating range
- Minimum differential field 20 Gpk-pk
- Running mode calibration for continuous optimization
- Single chip IC for high reliability
- Precise duty cycle signal throughout operating temperature range Large operating air gaps
- Automatic Gain Control (AGC) for air-gap–independent switchpoints Automatic Offset Adjustment (AOA) for signal processing optimization
- True zero-speed operation
- Undervoltage lockout
- Reverse battery protection
- Scan and IDDQ for increased test coverage Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration Functional Block Diagram Not to scale A1468 Tracking DAC AOA DAC TEST OUT GND VCC Internal Regulator Test Signals Automatic Offset Adjustment (AOA) Control Peak Hold Current Limit AGC DACAutomatic Gain Control (AGC) Hall AmplifierE1 Gain∑ FEATURES AND BENEFITS DESCRIPTION
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A. Package K, 4-Pin SIP Pin-out Diagram Absolute Maximum Ratings Characteristic Symbol Notes Rating Unit Forward Supply Voltage VCC Refer to Power Derating Curves chart 38 V Reverse Supply Voltage VRCC –18 V Output Current IOUT 30 mA Reverse Output Current IROUT –50 mA Reverse Output Voltage VROUT –0.5 V Output Off Voltage VOUT 28 V Operating Ambient Temperature TA L temperature range –40 to 150 ºC Maximum Junction Temperature TJ(max) 165 ºC Storage Temperature Tstg –65 to 170 ºC Terminal List Table Number Name Function
1 VCC Supply voltage
2 VOUT Output
3 TEST Test pin, float
4 GND Ground
Part Number Package Packing* Operating Ambient Temperature Range, TA (°C) A1468LK-T 4-pin through hole SIP Bulk, 500 pieces per bag -40 to 150 *Contact Allegro™ for additional packing options. 2 3 41 SPECIFICATIONS
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Characteristics Symbol Test Conditions Min. Typ. Max. Unit 1
Electrical Characteristics
Supply Voltage2 VCC Operating, TJ ≤ 165°C 4 – 26.5 V Undervoltage Lockout VCC(uv) VCC = 0 → VCC(min) + 1 V and VCC(min) + 1 V → 0 V – – V CC(min) V Supply Current ICC VCC > VCC(min) 3.0 5.0 7.5 mA Power-On Characteristics Power-On State POS V OUT, connected as in figure 6 – High – V Power-On Time3 tPO VCC > VCC(min) – – 2.3 ms Transient Protection Characteristics Supply Zener Clamp Voltage V Z(supply) ICC = ICC(max) + 3 mA, TA = 25 °C 38 – – V Supply Zener Current IZ(supply) Vsupply = 38 V – – ICC(max) + 3 mA Reverse Supply Current IRCC VRCC = –18 V, TJ < TJ(max) – – –1 mA Output Zener Clamp Voltage VZ(output) IOUT = 3 mA, TA = 25°C 28 – – V Output Zener Current IZ(output) VOUT = 28 V – – 3 mA Output Current Limit IOUT(lim) 30 – 85 mA Output Stage Characteristics Output Saturation Voltage V OUT(sat) IOUT(sink) = 20 mA – 220 400 mV Output Leakage Current IOFF VOUT = 24 V, output off – – 10 µA Output Fall Time tf RPU = 1 kΩ, VPU = 20 V, COUT = 10 pF – 2 – µs Performance Characteristics Operating Magnetic Signal Range B DIFF Peak-to-peak of differential signal; operation within specification 20 – 1200 G Operate Point4 BOP See figure 5 – 120 – mV 3 – 10 G Release Point4 BRP See figure 5 – 120 – mV 3 – 10 G Operating Frequency f OP 0 – 10 kHz Analog Signal Bandwidth BW Equivalent to f = –3 dB 20 – – kHz Initial Calibration Cycle5 ncal Output rising edges before calibration is completed, 0 offset, fOP ≤ 200 Hz – – 3 edge Output Duty Cycle Precision DOUT Using a pure sine magnetic signal, with fOP and BDIFF within specification – – ±15 % Output Period Precision TOUT Using pure sine magnetic signal with B DIFF = 50 Gpk-pk and fOP = 1 kHz – 0.3 – % Allowable User Induced Differential Offset B DIFFEXT Output switching only – – ±100 G 11 G (gauss) = 0.1 mT (millitesla). 2Maximum voltage operation must not exceed maximum junction temperature. Refer to Power Derating Curves chart. 3Time required to initialize device. Power-On Time includes the time required to complete the internal automatic offset adjust. The DAC is then ready for peak acquisition. 4Values in G are based on device in maximum gain setting. 5Non-uniform magnetic profiles may require additional output pulses before calibration is complete. OPERATING CHARACTERISTICS: valid throughout operating voltage and ambient temperature ranges, typical data ap- plies at VCC = 12 V and TA = 25°C; unless otherwise specified
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Thermal Characteristics may require derating at maximum conditions, see application information Characteristic Symbol Test Conditions* Value Unit Package Thermal Resistance RθJA On single-layer PCB with copper limited to solder pads 177 ºC/W *Additional thermal information available on the Allegro website. Ambient Temperature, T (ºC)A Power Derating Curves Power Dissipation versus Ambient Temperature Ambient Temperature, T (ºC)A Maximum Allowable V (V) CC Power Dissipation, P (mW) D V (max)CC V (min)CC 900 800 700 600 500 400 300 200 100 20 40 80 60 100 120 140 180160 177ºC/W 40 8060 100 120 140 180160 177 °C/W
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. CHARACTERISTIC PERFORMANCE -50 -25 0 25 50 75 100 125 150 Supply Current, Icc (mA) Ambient Temperature, T A( °C) Supply Current (Output On) versus Temperature 26.5 Vcc (V) 0 5 10 15 20 25 30 Supply Current, Icc (mA) Supply Voltage, Vcc (V) Supply Current (Output On) versus Supply Voltage -40 150 TA (°C) -50 -25 0 25 50 75 100 125 150 Supply Current, Icc (mA) Ambient Temperature, T A (°C) Supply Current (Output O ff) versus Temperature 26.5 Vcc (V) 0 5 10 15 20 25 30 Supply Current, Icc (mA) Supply Voltage, Vcc (V) Supply Current (Output O ff) versus Supply Voltage -40 150 TA (°C) 100 150 200 250 300 350 400 450 500 -50 -25 0 25 50 75 100 125 150 Output Saturation Voltage, V OUT(sat) (V) Ambient Temperature, T A (°C) Output Saturation Voltage versus Temperature IOUT(mA) 100 150 200 250 300 350 400 450 500 0 5 10 15 20 25 30 Output Saturation Voltage, V OUT(sat) (V) Output Current, IOUT(mA) Output Saturation Voltage versus Output Current -40 150 TA (°C)
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. 0.5 1.5 2.5 -50 -25 0 25 50 75 100 125 150 Output Fall Time, t f (µs) Ambient Temperature, T A (°C) Output Fall Time versus Temperature IOUT (mA) -50 -25 0 25 50 75 100 125 150 Output Duty Cycle Precision, D OUT (%) Ambient Temperature, T A (°C) Output Duty Cycle Precision versus Temperature at Air Gap* = 3mm 500 1000 2000 fOP (Hz) 0 500 1000 1500 2000 Output Duty Cycle Precision, D OUT (%) Operating Frequency, fOP (Hz) Output Duty Cycle Precision versus Frequency at Air Gap* = 3mm -40 150 TA (°C) 0 500 1000 1500 2000 Output Duty Cycle Precision, D OUT (%) Operating Frequency, fOP (Hz) Output Duty Cycle Precision versus Frequency at TA = 25°C 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Air Gap*(mm) 0 1 2 3 4 Output Duty Cycle Precision, D OUT (%) Air Gap (mm) Output Duty Cycle Precision versus Air Gap * at TA = 25°C 500 1000 2000 fOP (Hz) *Air gap defined as the distance between the front face of the A1468 package and the Allegro Reference Target 60-0 ring magnet
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. ∆TEAGIN (mm) ∆TEAGOUT (mm) Allowable Air Gap Movement from TEAGCAL* 2.0 1.5 1.0 0.5 -0.5 -1.0 The colored area in the chart above shows the region of allow- able air gap movement within which the device will continue output switching. The output duty cycle is wholly dependent on the target’s magnetic signature across the air gap range of move- ment, and may not always be within specification throughout the entire operating region (to AG (OPmax)). The axis parameters for the chart are defined in the drawings below. As an example, assume the case where the air gap is allowed to vary from the nominal installed air gap (TEAG CAL , panel a) within the range defined by an increase of ΔTEAGOUT = 0.35 mm (shown in panel b), and a decrease of ΔTEAGIN = 0.65 mm (shown in panel c). This case is plotted with an “x” in the chart above. Please note that after extreme cases of decrease in air gap, the device may not switch when the air gap resumes the nominal value. For example, if ΔTEAG IN = 2.75 mm, the chart shows ΔTEAGOUT = –0.5 mm, meaning that the device can now switch only in the air gap range of 0.5 to 2.75 mm inward from the nominal air gap. TEAGINA1468 A1468 TEAGOUT (a) A1468 TEAGCAL (b) (c) *Data based on study performed using Allegro Reference Target 60-0 ring magnet, and applicable to ring magnet targets with similar magnetic characteristics. CHARACTERISTIC ALLOWABLE AIR GAP MOVEMENT
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. FUNCTIONAL DESCRIPTION Sensing Technology The single-chip differential Hall effect sensor IC possesses two Hall elements, which sense the magnetic profile of the ring mag- net simultaneously, but at different points (spaced at a 2.2 mm pitch), generating a dif ferential internal analog voltage, VPROC , that is processed for precise switching of the digital output signal. The Hall IC is self-calibrating and also possesses a temperature compensated amplifier and offset compensation circuitry . Its voltage regulator provides supply noise rejection throughout the operating voltage range. Changes in temperature do not greatly affect this device due to the stable amplifier design and the offset compensation circuitry. The Hall transducers and signal process- ing electronics are integrated on the same silicon substrate, using a proprietary BiCMOS process. Target Profiling An operating device is capable of providing digital information that is representative of the magnetic features on a rotating target. The waveform diagram shown in Figure 3 presents the automatic translation of the magnetic profile to the digital output signal of the device. Output Polarity Figure 3 shows the output polarity for the orientation of target and device shown in Figure 2. The target direction of rotation shown is: perpendicular to the leads, across the face of the device, from the pin 1 side to the pin 4 side. This results in the device output switching from low to high as the leading edge of a north magnetic pole passes the device face. In this configuration, the device output voltage switches to its high polarity when a north pole is the target feature nearest to the device. If the direction of rotation is reversed, then the output polarity inverts. Target (Ring Magnet) N NSS (Pin 1 Side)(Pin 4 Side) Hall IC Element Pitch Hall Element 1Hall Element 2 Figure 1: Relative Motion of the Target The relative motion of the target is detected by the dual Hall elements mounted on the Hall IC. Figure 2: Target Rotation This left-to-right (pin 1 to pin 4) direction of target rotation results in a high output signal when a target north pole is nearest the face of the device (see Figure 3). A right-to-left (pin 4 to pin 1) rotation inverts the output signal polarity. N NN S NS S S Pin 1 Pin 4 Branded Face of K PackageRotating Target
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Figure 3: Output Profile of a Ring Magnet Target for the Polarity Indicated in Figure 2
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Automatic Gain Control (AGC) This feature allows the device to operate with an optimal internal electrical signal, regardless of the differential signal amplitude (within the B DIFF and BDIFFEXT specifications). During calibra- tion, the device determines the peak-to-peak amplitude of the signal generated by the target. The gain of the device is then auto- matically adjusted. Figure 4 illustrates the effect of this feature. During running mode, the AGC continues to monitor the system amplitude, reducing the gain if necessary; see the Device Opera- tion section for more details. Automatic Offset Adjust (AOA) The AOA is patented circuitry that automatically compensates for the effects of chip, magnet, and installation offsets. This circuitry is continuously active, including both during calibration mode and running mode, compensating for offset drift. Continuous operation also allows it to compensate for offsets induced by temperature variations over time. Digital Peak Detection A digital DAC tracks the internal analog voltage signal, VPROC, and is used for holding the peak value of the internal analog signal. In the example shown in Figure 5, the DAC would first track up with the signal and hold the upper peak’s value. When V PROC drops below this peak value by BOP , the device hyster- esis, the output would switch and the DAC would begin tracking the signal downward toward the negative V PROC peak. After the DAC acquires the negative peak, the output will again switch states when V PROC is greater than the peak by the value BRP . At this point, the DAC tracks up again and the cycle repeats. The digital tracking of the dif ferential analog signal allows the device to achieve true zero-speed operation. Figure 4: Automatic Gain Control (AGC) The AGC function corrects for variances in the air gap. Differences in the air gap affect the magnetic gradient, but AGC prevents that from affecting device performance, as shown in the lowest panel. N NS S Target Ring Magnet AG Small AGLarge AGSmall AGLarge Internal Differential Analog Signal Response, with AGC Internal Differential Analog Signal Response, without AGC Internal Differential Analog Signal, V PROC Device Output, V OUT VCC BOP BOP BRP BRP VOUT(sat) Figure 5: Differential Signal Peaks The peaks in the resulting differential signal are used to set the operate (BOP ) and release (BRP ) switchpoints.
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Power Supply Protection The device contains an on-chip regulator and can operate throughout a wide VCC range. For devices that must be operated from an unregulated power supply, transient protection must be added externally. For applications using a regulated line, EMI/ RFI protection may still be required. Contact Allegro for information on the circuitry required for compliance with various EMC specifications. Refer to figure 6 for an example of a basic application circuit. Undervoltage Lockout When the supply voltage falls below the undervoltage lockout voltage, V CC(uv) , the device enters Reset, where the output state returns to the Power-On State (POS) until sufficient VCC is supplied. Assembly Description This device is integrally molded into a plastic body that has been optimized for size, ease of assembly, and manufacturability. High operating temperature materials are used in all aspects of con- struction. Device Operation Each operating mode is described in detail below. POWER-ON When power (VCC > VCC(min)) is applied to the device, a short period of time is required to power the various portions of the IC. During this period, the A1468 powers-on in the high voltage state, V OUT(high), and the digital tracking DAC gets ready to track the VPROC signal. After power-on, there are conditions that could induce a change in the output state. Such an event could be caused by thermal transients, but would require a static applied magnetic field, proper signal polarity, and particular direction and magnitude of internal signal drift. INITIAL OFFSET ADJUST The device initially cancels the effects of chip, magnet, and installation offsets. After offsets have been cancelled, the device is ready to provide the first output switch. The period of time required for both Power-On and Initial Offset Adjust is defined as the Power-On Time. CALIBRATION MODE The calibration mode allows the device to automatically select the proper signal gain and continue to adjust for offsets. The AGC is active, and selects the optimal signal gain based on the amplitude of the V PROC signal. Following each adjustment to the AGC DAC, the Offset DAC is also adjusted to ensure the internal analog signal is properly centered. During this mode, the tracking DAC is active and output switch- ing occurs, but the duty cycle is not guaranteed to be within specification. RUNNING MODE After the Initial Calibration period, CI, establishes a signal gain, the device moves to running mode. During running mode, the device tracks the input signal and gives an output edge for every peak of the signal. AOA remains active to compensate for any offset drift over time. VCC Vsupply VOUTCBYP 0.1 µF COUT RPU 1 kΩ GND A1468 OUTTEST Figure 6: Typical Application Diagram
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. Device Electrical Output, VOUT Internal Differential Signal, VPROC BRP BOP BOP BRP 1 2 3 4 5 Figure 7: Operation of Running Mode Gain Adjust
- Position1. The device is initially powered-on. Self-calibration occurs.
- Position 2. Small amplitude oscillation of the target sends an erroneously small differential signal to the device. The amplitude of VPROC is greater than the switching hysteresis (BOP and BRP), and the device output switches.
- Position 3. The calibration period completes on the third rising output edge, and the device enters running mode.
- Position 4. True target rotation occurs and the correct magnetic signal is generated for the installation air gap. The established signal gain is too large for the target rotational magnetic signal at the given air gap.
- Position 5. Running mode calibration corrects the signal gain to an optimal level for the installation air gap. The A1468 incorporates an algorithm for adjusting the signal gain during running mode. This algorithm is designed to optimize the V PROC signal amplitude in instances where the magnetic signal “seen” during the calibration period is not representative of the amplitude of the magnetic signal for the installed device air gap (see Figure 7). Note that in this mode, the gain can be reduced but not increased, so this algorithm applies only to instances in which the magnetic signal amplitude during running is higher than that during calibration.
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. The device must be operated below the maximum junction tem- perature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the appli- cation. This section presents a procedure for correlating factors affecting operating T J. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RθJA, is a figure of merit sum- marizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R θJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN (1) Δ T = PD × RθJA (2) TJ = TA + ΔT (3) For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 5 mA, and RθJA = 177 °C/W, then: PD = VCC × ICC = 12 V × 5 mA = 60 mW Δ T = PD × RθJA = 60 mW × 177 °C/W = 10.6°C A worst-case estimate, PD(max), represents the maximum allow- able power level (VCC(max) , ICC(max)), without exceeding TJ(max), at a selected RθJA and TA. Example: Reliability for VCC at TA = 150°C, package K, using minimum-K PCB. Observe the worst-case ratings for the device, specifically: RθJA = 177°C/W, TJ(max) = 165°C, VCC(max) = 26.5 V , and ICC(max) = 7.5 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 177 °C/W = 85 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 85 m W ÷ 7.5 mA = 11.3 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. Power Derating
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A. For Reference Only - Not for Tooling Use (Reference DWG-9010) Dimensions in millimeters - NOT TO SCALE Dimensions exclusive of mold flash, gate burs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 24 31 1.502.20
0.84 REF
1.27 NOM
2.16 MAX
45° 45° D E EE B 1.32 A Mold Ejector Pin Indent Branded Face 5.21 +0.08 –0.05 0.38+0.06 –0.03 3.43 +0.08 –0.05 0.41 +0.07 –0.05 14.73 ±0.51 1.55 ±0.05 A B C D C NNNN YYWW E Dambar removal protrusion (8X) Gate and tie burr area Active Area Depth, 0.42 mm Hall elements (E1 and E2), not to scale = Device part number = Last two digits of year of manufacture = Week of manufacture N Y W Standard Branding Reference View Branding scale and appearance at supplier discretion Figure 8: Package K, 4-Pin SIP Package Outline Diagram
Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration A1468 Allegro MicroSystems, LLC Worcester, Massachusetts 01615-0036 U.S.A.
Revision History
Revision Date Description of Revision
1 April 14, 2014 Revised Power Derating Curve
2 July 11, 2014 Revised Device Operation description
3 July 11, 2016 Revised Forward Supply Voltage in Absolute Maximum Rating table
Copyright ©2011-2016, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com