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The A1425 AC-coupled Hall-effect sensor IC is a monolithic integrated circuit that switches in response to changing differential magnetic fields created by rotating ring magnets and, when coupled with a magnet, by ferrous targets. The device is a true zero-crossing detector: the output switches precisely when the difference in magnetic field strength between the two Hall elements is zero. A unique dual-comparator scheme provides for accurate switching at the zero crossing on both the positive and negative-going regions of the differential signal, while utilizing hysteresis to prevent false switching. The zero- crossing nature of this device provides excellent repeatability and accuracy for crankshaft applications. Changes in field strength at the device face, which are induced by a moving target, are sensed by the two integrated Hall transducers. The transducers generate signals that are differentially amplified by on-chip electronics. This differential design provides immunity to radial vibration within the operating air gap range of the A1425, by rejection of the common mode signal. Steady-state magnet and system offsets are eliminated using an on-chip differential band-pass filter. This filter also provides relative immunity to interference from electromagnetic sources. 1425-DSa, Rev.3 Features and Benefits ▪ Used in sensing motion of ring magnet or ferrous targets ▪ Integrated filter capacitor ▪ Wide operating temperature range ▪ Operation with magnetic input signal frequency from
20 Hz to 20 kHz
▪ Resistant to EMI ▪ Large effective air gaps ▪ 4.0 to 26.5 V supply operating range ▪ Output compatible with both TTL and CMOS logic families ▪ Reverse battery protection ▪ Resistant to mechanical and thermal stress ▪ Accurate true zero-crossing switchpoint High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output Signal Continued on the next page… Package: 4 pin SIP (suffix K) Functional Block Diagram A1425 Hall Amp Regulator Bandpass Filter Integrated Tracking Capacitor VOUT (Pin 2) VCC (Pin 1) GND (Pin 4) 0.1 uF VS+ Diagnostic Circuitry Gain Stage Dual Hall Transducers Comparator TEST (Pin 3) (Required) VREF
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 2Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A. The device utilizes advanced temperature compensation for the high-pass fi lter, sensitivity, and Schmitt trigger switchpoints, to guarantee optimal operation to low frequencies over a wide range of air gaps and temperatures. Each Hall effect digital integrated circuit includes a voltage regulator, two Hall effect elements, temperature compensating circuitry, a low-level amplifi er, band-pass fi lter, Schmitt trigger, and an output driver, which requires a pull-up resistor. The on- board regulator permits operation with supply voltages from 4.0 to 26.5 V . The output stage can easily switch 20 mA over the full frequency response range of the device, and is compatible with both TTL and CMOS logic circuits. The device is packaged in a 4-pin plastic SIP. It is lead (Pb) free, with 100% matte tin plated leadframe. 2 341 Terminal List Table Name Number VCC 1 VOUT 2 TEST 3 GND 4 Pin-out Diagram Selection Guide Part Number Packing * Switchpoints BRP(MIN) (G) BOP(MAX) (G) A1425LK-T Bulk, 500 pieces/bag –11 11 *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage V CC Refer to Power Derating section 28 V Reverse Supply Voltage V RCC –18 V Continuous Output Current I OUT 25 mA Continuous Reverse-Output Current I ROUT –50 mA Operating Ambient Temperature T A Range L –40 to 150 ºC Maximum Junction T J(max) 165 ºC Storage Temperature T stg –65 to 170 ºC Description (continued)
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 3Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. OPERATING CHARACTERISTICS Valid at TA = – 40ºC to 150ºC, TJ ≤ 165°C; over operational air gap range and VCC within operating range, unless otherwise noted. Typical operating parameters: VCC = 12 V and TA = 25°C. Characteristic Symbol Test Conditions Min. Typ. Max. Units
ELECTRICAL CHARACTERISTICS
CC Operating; TJ < TJ(max) 4.0 – 26.5 V Supply Current I CC – 4.2 7.0 mA Output Saturation Voltage V OUT(SAT) ISINK = 20 mA – 140 400 mV Output Leakage Current I OFF VOUT = 24 V, Bdiff = 0 – – 5 μA PROTECTION COMPONENT CHARACTERISTICS Reverse Supply Current I RCC VCC = –18 V – – –1 mA Supply Zener Current I ZSupply VS = 28 V – – 10 mA Supply Zener Clamp Voltage1 VZSupply ICC = 10 mA, TA = 25°C 28 33 37 V Output Zener Current I ZOutput VOUT = 28 V – – 3 mA Output Zener Clamp Voltage V ZOutput IOUT = 3 mA, TA = 25°C 28 – – V Output Short Circuit Current Limit2 IOUTS(lim) – – 50 mA RESPONSE CHARACTERISTICS Power-On State POS t < t Response – High – V Power-On Time3,7 tPO VCC > VCC(min) – 4.5 9 ms Settling Time4,7 tSettle fBdiff ≥ 100 Hz 0 – 50 ms Response Time7 tResponse Equal to tPO + tS; fBdiff ≥ 100 Hz 4.5 – 59 ms Upper Corner Frequency f cu –3 dB, single pole 20 – – kHz Lower Corner Frequency f cl –3 dB, single pole – – 20 Hz OUTPUT CHARACTERISTICS Output Rise Time 5 tr RPU = 1 kΩ, COUT2 = 10 pF – – 200 ns Output Fall Time t f RPU = 1 kΩ, ISINK = 20 mA, COUT2 = 10 pF – – 200 ns MAGNETIC CHARACTERISTICS Output Off Switchpoint6,7 BOP Bdiff increasing, fBdiff = 200 Hz, Bdiff = 50 Gp-p; digital output signal switches low to high –11 0 11 G Output On Switchpoint6,7 BRP Bdiff decreasing, fBdiff = 200 Hz, Bdiff = 50 Gp-p; digital output signal switches high to low –11 0 11 G Applied Magnetic Field7,8 Bdiff Differential p-p magnetic fi eld 50 – 1250 G 1ICC equivalent to ICC(max) + 3 mA. 2IOUT does not change state when IOUT > IOUTS(lim) , regardless of changes in the impinging magnetic fi eld. 3Time required to initialize device. 4Time required for the output switchpoints to be within specifi cation. 5Output Rise Time will be dominated by the RC time constant. 6For other sinusoidal signal frequencies and magnetic fi elds, –BOP = BRP = sinα(Bdiff ⁄ 2) ± 25%, where α is the phase shift shown in the Characteristic Data section. 7See Defi nitions of Terms section. 8Exceeding the maximum magnetic fi eld may result in compromised absolute accuracy.
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 4Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information Characteristic Symbol Test Conditions Rating Units Package Thermal Resistance RθJA Single-layer PCB, with copper limited to solder pads 177 ºC/W 20 40 60 80 100 120 140 160 180 Temperature (ºC) Maximum Allowable VCC (V) Power Derating Curve (RθJA = 177 ºC/W) VCC(min) VCC(max) Temperature (°C) Power Dissipation, PD (mW) 20 40 60 80 100 120 140 160 180 Maximum Power Dissipation, PD(max) θJA = 177 ºC/W) 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 850 900 Defi nitions of Terms The following provide additional information about some of the parameters cited in the Operating Characteristics table. For additional information, visit the Allegro Web site at www.allegromicro.com. Applied Magnetic Field, B diff – The differential magnetic fl ux density which is calculated as the arithmetic difference of the fl ux densities observed by each of the two Hall elements. Output Off Switchpoint (Operate Point), B OP – The value of increasing differential magnetic fl ux density at which the device output switches from low to high. This value may be greater than or less than 0 G. Output On Switchpoint (Release Point), B RP – The value of decreasing differential magnetic fl ux density at which the device output switches from high to low. This value may be greater than or less than 0 G. Power-On Time, tPO – The time needed by the device, after power is applied, to initialize all circuitry necessary for proper operation. Settling Time, t Settle – The time required by the device, after tPO, and after a valid magnetic signal has been applied, to provide proper output transitions. Settling time is a function of magnetic offset, offset polarity, signal phase, signal frequency, and signal amplitude. Response Time t Response – The total time required for generat- ing zero-crossing output transitions after power-up (the sum of power-on time and settling time).
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 5Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Empirical Results 4.5 20.0 12.0 VCC (V) 4.5 20.0 12.0 VCC (V) 150 –40 TA (ºC) VCC (V) VCC (V) 0 5 10 15 20 25 Supply Current by Ambient Temperature TA (ºC) ICC (mA) –50 0 50 100 150 200 Supply Current by Supply Voltage ICC (mA) 01 02 03 0 Output Voltage by Ambient Temperature TA (ºC) VOUT(SAT) (mV) 500 450 400 350 300 250 200 150 100 –50 0 50 100 150 200 I SINK = 20 mA Output Voltage by Supply Voltage VOUT(SAT) (mV) 500 450 400 350 300 250 200 150 100 I SINK = 20 mA 4.5 VCC (V) 150 –40 TA (ºC) Continued on next page.
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 6Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Empirical Results, continued Air Gap (mm) Repeatability (º of Rotation) 116 Air Gap (mm) Repeatability (º of Rotation) 116
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 7Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Simulation Results A1425 Minimum Switching Fields Over the Range of Ambient Operating Temperatures, TA fBdiff(low) = 15 Hz, fBdiff(high) ≈ 30 kHz Bdiff(min) (G) Frequency, fBdiff (kHz) 0.01 0.1 1 10 40 150 –40 A1425 Typical Phase Shift Over the Range of Applied Magnetic Fields, Bdiff fBdiff(low) = 15 Hz, fBdiff(high) = 30 kHz Phase Shift (º) Frequency, fBdiff (kHz) 0.01 0.1 1 10 40 –30 –50 –60 –40 –20 –10 100 500 1250 750 Bdiff in Gp-p Continued on next page.
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 8Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Simulation Results, continued 100 500 750 125 IOUT Delay (μs) IOUT Lagging IOUT Leading Frequency, fBdiff (kHz) 0.1 1 10 40 –20 –15 –10 A1425 Typical Delay Over the Range of Applied Magnetic Fields, Bdiff fBdiff(low) = 15 Hz, fBdiff(high) = 30 kHz Bdiff in Gp-p 100 500 750 1250 IOUT Delay (μs) IOUT Lagging I OUT Leading Frequency, fBdiff (Hz) 0 100 1000 –1000 –2000 –3000 –4000 –5000 –6000 A1425 Typical Delay Over the Range of Applied Magnetic Fields, Bdiff fBdiff(low) = 15 Hz, fBdiff(high) = 30 kHz Bdiff in Gp-p Positive values of delay indicate a lagging output, while negative values indicate a leading output. Positive values of delay indicate a lagging output, while negative values indicate a leading output.
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 9Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. A1425 Vs VCC TEST VOUTGND 24 RPU COUT2 (Required) Device Evaluation: EMC Characterization Test Name Reference Speci fi cation ESD – Human Body Model* AEC-Q100-002 ESD – Machine Model* AEC-Q100-003 Conducted Transients ISO 7637-1 Direct RF Injection ISO 11452-7 Bulk Current Injection ISO 11452-4 TEM Cell ISO 11452-3 ESD testing is performed with no external components. Please contact Allegro MicroSystems for EMC performance information. Component Value Units RPUa 1.2 k Ω R1b 100 Ω C1 0.1 μF COUTc 4.7 nF aPull-up resistor not required for protection but for normal operation. bFor improved CI performance cFor improved BCI performance Recommended EMC test circuit.
10Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. over the device operating temperature range. each comparator precludes false switching on noise or target jitter. PO, the output signal, VOUT, is high. time constant of a high-pass fi lter. input signal amplitude on the phase shift of the output. seen in hostile remote-sensing environments. Figure 1. Typical output characteristics with dual comparator operation. Characteristics shown without delay, see Characteristic Data section charts for delay and phase shift contributions.
11Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. may occur. These relationships are shown in fi gure 2.
4 VOUT
Figure 3. Basic application circuit. A pull-up resistor, RPU, is required Figure 2. Large Feature Effects. (a) Large target feature but no device offset, (advanced) output edge position.
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 12Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combina- tions of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating T J. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RJA, is a fi gure of merit sum- marizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R JC, is relatively small component of RJA. Ambient air temperature, TA, and air motion are signifi cant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate T J, at PD. PD = VIN × IIN (1) T J = TA + ΔT (3) For example, given common conditions such as: TA= 25°C, VCC = 5.0 V, ICC = 4.2 mA, and RJA = 177 °C/W, then: P D = VCC × ICC = 5.0 V × 4.2 mA = 21.0 mW A worst-case estimate, PD(max), represents the maximum allow- able power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RJA and TA. Example Reliability for VCC at TA = 150°C, using minimum-K PCB Observe the worst-case ratings for the device, specifi cally: RJA = 177°C/W, TJ(max) = 165°C, VCC(max) = 26.5 V , and ICC(max) = 7.0 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = Tmax ÷ RJA = 15°C ÷ 177 °C/W = 84 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 84 mW ÷ 7.0 mA = 12 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli- able operation between VCC(est) and VCC(max) requires enhanced RJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. For example, when a standard diode with a 0.7 V drop is used: VS(max) = 12 V + 0.7 V = 12.7 V
High Accuracy Analog Speed Sensor IC with Integrated Filter Capacitor and Dual Zero-Crossing Output SignalA1425 13Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Package K, 4-pin SIP 24 31 E1 E2 2.20 1.50
0.84 REF
1.27 NOM
2.16 MAX 45° 45° D Active Area Depth, .0.42 mm Hall elements (E1 and E2); not to scale D E E E E B 1.29 Gate and tie bar burr area A B C Dambar removal protrusion (8X) A D For Reference Only; not for tooling use (reference DWG-9010) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown Standard Branding Reference View N = Device part number Y = Last two digits of year of manufacture W = Week of manufacture Mold Ejector Pin Indent Branded Face YYWW NNNN 5.21 +0.08 –0.05 0.38 +0.06 –0.03 3.43 +0.08 –0.05 0.41 +0.07 –0.05 14.73 ±0.51 1.55 ±0.05 Branding scale and appearance at supplier discretion Copyright ©2005-2008, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com