8001401ZX

ELH0033G ELANTEC | Alldatasheet

Document overview

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Technical content

Features

# Slew rateÐ1500 V/ ms # Output driveÐ100 mA # Rise and fall timesÐ2.9 ns # Input resistanceÐ10 11X # Power bandwidthÐ100 MHz # MIL-STD-883 devices 100% manufactured in U.S.A. Advantages # Excellent phase linearity # Driver cables and other capacitive loads # Wide supply range, single or split

Ordering Information

Part No. Temp. Range Package Outline Ý ELH0033G/883B b55§Ct o a125§C TO-8 MDP0002 8001401ZX is the SMD version of this device. Connection Diagram 12-Pin TO-8 0033–1 Top View Note: Case is electrically isolated. General Description The ELH0033 is a high-speed, FET input voltage follower buff- er designed to provide high output currents from DC to over 100 MHz. The ELH0033 slews at 1500 V/ ms and will drive 100 X loads. Phase linearity is excellent to 20 MHz, allowing the buff- er to be included in op amp loops. The ELH0033 is intended to fulfill a wide range of buffer appli- cations such as high-speed line drivers, video impedance trans- formation, nuclear instrumentation amplifiers, op amp isolation buffers for driving reactive loads and high impedance input buffers for high-speed A to D’s and comparators. These devices are constructed using specially selected junction FETs and active laser trimming to achieve guaranteed perform- ance specifications. The ELH0033 is specified for operation from b55§Ct o a125§C. Elantec facilities comply with MIL-I-45208A and other applica- ble quality specifications. Elantec’s Military devices are 100% fabricated and assembled in our rigidly controlled, ultra-clean facilities in Milpitas, California. For additional information on Elantec’s Quality and Reliability Assurance policy and proce- dures request brochure QRA-1. Equivalent Schematic 0033–2

VS Supply Voltage (V ab Vb) 40V VIN Input Voltage 40V PD Power Dissipation (See Curves) 1.5W IOC Continuous Output Current g100 mA IOP Peak Output Current g250 mA TA Operating Temperature Range ELH0033 b55§Ct o a125§C TJ Operating Junction Temperature 175 §C TST Storage Temperature b65§Ct o a150§C Lead Temperature (Soldering, 10 seconds) 300 §C Important Note: All parameters having Min/Max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality inspection. Elantec performs most electrical tests using modern high-speed automatic test equipment, specifically the LTX77 Series system. Unless otherwise noted, all tests are pulsed tests, therefore T JeTCeTA. Test Level Test Procedure I 100% production tested and QA sample tested per QA test plan QCX0002. II 100% production tested at T A e 25§C and QA sample tested at T A e 25§C, TMAX and T MIN per QA test plan QCX0002. III QA sample tested per QA test plan QCX0002. IV Parameter is guaranteed (but not tested) by Design and Characterization Data. V Parameter is typical value at T A e 25§C for information purposes only. Parameter Description Test Conditions ELH0033 Units Min Typ Max Test Level VOS Output Offset R S s 100 k X, 51 0 I m VVoltage T J e 25§C (Note 1) RS s 100 k X 15 I mV DVOS/DT Average Temperature Coefficient of R S e 100X 50 V mV/§C Offset Voltage IB Input Bias Current T J e 25§C (Note 1) 250 I pA TA e 25§C (Note 2) 2.5 IV nA TJ e TA e TMAX 10 I nA AV Voltage Gain R S e 100X,R L e 1k X, 0.97 0.98 1.00 I V/VVIN e g10V RIN Input Impedance R L e 1k X 1010 1011 IV X TJ e 25§C (Note 1), 1010 1011 I XRL e 1k X RO Output Impedance R L e 1k X,V IN e g1V 6 10 I X VO Output Voltage V IN e g14V, g12 I VSwing R L e 1k X VIN e g10.5V, g9I VRL e 100X,T A e 25§C IS Supply Current 14.5 20 22 I mA Power Consumption 600 660 I mW Note 1: Specification is at 25 §C junction temperature due to requirements of high-speed automatic testing. Actual values at operating temperature will exceed the value at T J e 25§C. When supply voltages are g15V, no-load operating junction temperature may rise 40 §C–60 §C above ambient and more under load conditions. Accordingly, V OS may change one to several mV, and I B will change significantly during warm-up. Refer to I B vs temperature graph for expected values. Note 2: Measured in still air 7 minutes after application of power. TD is 3.4in

Parameter Description Test Conditions ELH0033 Units Min Typ Max Test Level SR Slew Rate V IN e g10V 1000 1500 III V/ ms BW Bandwidth V IN e 1V rms 100 V MHz Phase BW e 1 MHz to 20 MHz 2V §Non-Linearity tr Rise Time DVIN e 0.5V 2.9 V ns tp Propagation Delay DVIN e 0.5V 1.2 V ns HD Harmonic Distortion f l 1 kHz k0.1 V % AV Voltage Gain R S e 100X, VIN e 1V rms, 0.97 0.98 1.00 I V/V f e 1 kHz RO Output Impedance V IN e 1V rms, 61 0 I Xf e 1 kHz Typical Performance Curves Dissipation Maximum Power Supply Voltage Supply Current vs Supply Voltage Output Voltage vs Response Negative Pulse Response Positive Pulse Frequency Response 0033–3 TD is 2.3in

Typical Performance Curves Ð Contd. vs Temperature Rise and Fall Time vs Temperature Input Bias Current Current During Warm-up Normalized Input Bias vs Input Voltage Input Bias Current 0033–4 Typical Applications Offset Zero Adjust 0033–5 Using Resistor Current Limiting 0033–6 Current Limiting Using Current Sources 0033–7

Typical Applications Ð Contd. High Input Impedance AC Coupled Amplifier fH t 100 MHz 0033–8 Coaxial Cable Driver 0033–9 *Select C1 for optimum pulse response Instrumentation Shield/Line Driver 0033–10 Single Supply AC Amplifier 0033–11

4.5 MHz Notch Filter

0033–12 High-Speed Sample and Hold *Polycarbon or teflon 0033–13

Recommended Layout Precautions RF/video printed circuit board layout rules should be followed when using the ELH0033 since it will provide power gain to frequencies over 100 MHz. Ground planes are recommended and power supplies should be decoupled at each device with low inductance capacitors. In addi- tion, ground plane shielding may be extended to the metal case of the device since it is electrically isolated from internal circuitry. Alternatively, the case should be connected to the output to minimize input capacitance. Offset Voltage Adjustment The ELH0033’s offset voltages have been active- ly trimmed by laser to meet guaranteed specifica- tions when the offset preset pin is shorted to the offset adjust pin. The pre-calibration allows the devices to be used in most DC or AC applications without individually offset nulling each device. If offset null is desirable, it is simply obtained by leaving the offset preset pin open and connecting a trim pot of 100 X between the offset adjust pin and V Operation from Single or Asymmetrical Power Supplies This device type may be readily used in applica- tions where symmetrical supplies are unavailable or not desirable. A typical application might be an interface to a MOS shift register where V a e a5V and V b eb 12V. In this case, an apparent output offset occurs due to the device’s voltage gain of less than unity. This additional output offset error may be predicted by: DV Oj(1bAV) (VabVb) e0.005 (V abVb) where: A V e No load voltage gain, typically 0.99 Va e Positive supply voltage Vb e Negative supply voltage For the above example, DVO would be b35 mV. This may be adjusted to zero as described in Sec- tion 2. For AC coupled applications, no addition- al offset occurs if the DC input is properly biased as illustrated in the ‘‘typical applications’’ sec- tion. Short Circuit Protection In order to optimize transient response and out- put swing, output current limit has been omitted from the ELH0033. Short circuit protection may be added by inserting appropriate value resistors between V a and V Ca pins and V b and V Cb pins. Resistor values may be predicted by: RLIM j Va ISC e Vb ISC where: I SC s 100 mA for ELH0033 The inclusion of limiting resistors in the collec- tors of the output transistors reduces output volt- age swing. Decoupling V Ca and V Cb pins with capacitors to ground will retain full output swing for transient pulses. An alternate active current limit technique that retains full DC output swing uses current sources which are saturated during normal operation thus applying full supply volt- age to the V C pins. Under fault conditions, the voltage decreases as required by the overload. RLIM j VBE ISC e 0.6V 60 mA e 10X Capacitive Loading The ELH0033 is designed to drive capacitive loads such as coaxial cables in excess of several thousand picofarads without susceptibility to os- cillation. However, peak current resulting from c dv/dt) should be limited below absolute maximum peak current ratings for the devices. Thus: DVIN Dt c CL s IOUT s g250 mA In addition, power dissipation resulting from driving capacitive loads plus standby power should be kept below the total package power rating: P D pkg t PDC a PAC PD pkg t (Va b Vb) c IS a PAC PAC j (VP-P)2 c f c CL

where: V P-PePeak-to-peak output voltage swing f eFrequency CL eLoad Capacitance Operation within an Op Amp Loop Both devices may be used as a current booster or isolation buffer within a closed loop with op amps such as the ELH0032 and HA2500 and HA2600 series. An isolation resistor of 47 X should be used between the op amp output and the input of ELH0033. The wide bandwidth and high slew rates of the ELH0033 assure that the loop has the characteristics of the op amp and that additional rolloff is not required. Burn-In Circuit 0033–14 Hardware In order to utilize the full drive capabilities of the ELH0033, it should be mounted with a heatsink, particularly for extended temperature operation. The case is isolated from the circuit and may be connected to system chassis. IMPORTANT! Power supply bypassing is necessary to prevent oscillation with the ELH0033 in all circuits. Low inductance ceramic disc capacitors with the shortest practical lead lengths must be connected from each supply lead (within (/4 × to (/2× of the device package) to a ground plane. Capacitors should be one or two 0.1 mF in parallel; adding a 4.7 mF solid tantalum capacitor will help in trou- blesome instances.

• Connections: input * l Va * ll Vca * lll Vb * llll Vcb * lllll output * llllll .subckt M0033 5 12 1 10 9 11 * Models .model qn npn (is e5eb14 bf e150 vaf e100 re e1r b e5r e e1 ikf e200mA acjee5pF cjc e5pF mje e.42 mjc e.23 tf e.3nS tr e200nS br e5 vtf e0) .model qp pnp (is e5eb14 bf e150 vaf e100 rc e.2 rb e3r e e1 ikf e100mA acjee5.7pF cjc e4pF tf e.3nS mje e.32 mjc e.43 tr e170nS br e5 vtf e0) .model qf njf (vto eb3V beta e4.0eb3 cgd e4pF cgs e10pF lambda e671.0eb6) * Resistors r1 20 21 58.33 r2 27 10 58.33 r3 22 11 2 r4 11 23 2 * Transistors j 11 252 0q f j4 24 10 26 qf q2 21 21 25 qn q3 24 24 25 qp q 512 12 2q n q 692 42 3q p q7 26 26 27 qn .ends TAB WIDE TD is 3.8in

ELH0033 Macromodel Ð Contd. 0033–16

ELH0033G/883/8001401ZXJuly 1992 Rev H ELH0033G/883/8001401ZX Fast Buffer Amplifier General Disclaimer Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. Elantec, Inc.

1996 Tarob Court

Milpitas, CA 95035 Telephone: (408) 945-1323 (800) 333-6314 Fax: (408) 945-9305 European Office: 44-71-482-4596 WARNING Ð Life Support Policy Elantec, Inc. products are not authorized for and should not be used within Life Support Systems without the specific written consent of Elantec, Inc. Life Support systems are equipment in- tended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. products in Life Support Systems are requested to contact Elantec, Inc. factory headquarters to establish suitable terms & conditions for these applications. Elantec, Inc.’s warranty is limited to replace- ment of defective components and does not cover injury to per- sons or property or other consequential damages. Printed in U.S.A.12