79C2040 MAXWELL | Alldatasheet
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20 Megabit (512K x 40-Bit)
©2005 Maxwell Technologies All rights reserved. 04.20.05Rev 1 FEATURES: 512k x 40-bit EEPROM MCM
- R AD-PAK® radiation-hardened against natural space radiation Total dose hardness: - >100 krad (Si) - Dependent upon orbit Excellent Single event effects - SEL TH > 120 MeV/mg/cm2 - SEU > 90 MeV/mg/cm2 read mode - SEU = 18 MeV/mg/cm2 write mode High endurance - 10,000 cycles/byte (Page Programming Mode) - 10 year data retention Page Write Mode: 128 Dword Page High Speed: - 150 and 200 ns maximum access times Automatic programming - 10 ms automatic Page/Dword write Low power dissipation - 375 mW/MHz active current -3. 2 mW standby current DESCRIPTION: Maxwell Technologies’ 79C2040 multi-chip module (MCM) memory features a greater than 100 krad (Si) total dose toler- ance, dependent upon orbit. Using Maxwell Technologies’ pat- ented radiation-hardened R AD-PAK® MCM packaging technology, the 79C2040 is the first radiation-hardened 20 megabit MCM EEPROM for space application. The 79C2040 uses twenty 1 Megabit high speed CMOS die to yield a 20 megabit product. The 79C2040 is capable of in-system electri- cal byte and page programmability. It has a 128 word page programming function to make the erase and write operations faster. It also features Data Polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 79C2040, hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on power on and off. Software data protection is implemented using the JEDEC optional standard algorithm. Maxwell Technologies' patented R AD-PAK® packaging technol- ogy incorporates radiation shielding in the microcircuit pack- age. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, R AD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Maxwell Technologies self-defined Class K Logic Diagram
204.20.05 Rev 1 All data sheets are subject to change without notice
©2005 Maxwell Technologies All rights reserved
20 Megabit (512 x 40-Bit) EEPROM MCM 79C2040
51, 61, 71, 80, 90, 100 VSS - Ground 52, 62, 72, 79, 89, 99 VCC - Positive Supply 60 - 53, 41 - 48, 10 - 3, 91 - 98, 88 - 81 D0 to D39 Data I/O 13, 14, 15, 16 CS0\\ - CS3\\ Chip Enable 23 - 28, 31, 32, 78 -73, 70 - 68 A0 to A16 Address Inputs
33 RES\\ - Reset
34 - 38 WE\\0 - WE\\4 Write Enables 66 - 63 RBSY\\0 - RBSY\\3 Ready/Busy
67 OE\\ - Output Enable
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TABLE 1. 79C2040 ABSOLUTE MAXIMUM RATINGS
- V IN min = -3.0V for pulse width <50ns.
TABLE 2. 79C2040 RECOMMENDED DC OPERATING CONDITIONS
- V IL min = -1.0V for pulse width < 50 ns
TABLE 3. 79C2040 DELTA LIMITS1
- Parameters are measured and recorded per MIL-STD-883 for Class K devices
- Specified value in Table 5
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TABLE 4. 79C2040 CAPACITANCE TABLE 5. 79C2040 DC ELECTRICAL CHARACTERISTICS
- Only one CE active(Logic Low)
- RBSY is an open drain output. Only V OL applies to this pin.
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TABLE 6. 79C2040 AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1
- Test conditions: input pulse levels = 0.4V to 2.4V; input rise and fall times <
scope and fixture); reference levels for measuring timing = 0.8 V/1.8 V.
- t DF and tDFR are defined as the time at which the output becomes an open circuit and data is no longer driven.
TABLE 7. 79C2040 AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION
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TABLE 7. 79C2040 AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION
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- Use this device in a longer cycle than this value.
internal write operation within this value.
- Next read or write operation can be initiated after t DW if polling techniques or RDY/BUSY are used.
TABLE 8. 79C2040 MODE SELECTION 1
- Refer to the recommended DC operating conditions.
- For CE 0-3 only one CE can be used (active) at a time.
TABLE 7. 79C2040 AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION
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FIGURE 1. READ TIMING WAVEFORM FIGURE 2. BYTE WRITE TIMING WAVEFORM (1) (WE CONTROLLED)
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FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) FIGURE 4. PAGE WRITE TIMING WAVEFORM (1) (WE CONTROLLED) 1) A7-A16 are Page Addresses and must be the same within a Page Write Operation.
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FIGURE 5. PAGE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) FIGURE 6. DATA POLLING TIMING WAVEFORM 1) A7-A16 are Page Addresses and must be the same within a Page Write Operation.
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FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM (1) (IN PROTECTION MODE) FIGURE 8. SOFTWARE DATA PROTECTION WAVEFORM (2) (IN NON-PROTECTION MODE) techniques to preserve data integrity.
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©2005 Maxwell Technologies All rights reserved Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is per- forming a write operation. RDY/Busy Signal RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal goes low (VOL) after the first write signal. At the end of the write cycle, the RDY/Busy returns to a high state. RES Signal When RES is LOW (V L), the EEPROM cannot be read or programmed. The EEPROM data must be protected by keeping RES low when VCC is power on and off. RES should be high (VH) during read and programming operations. Data Protection To protect the data during operation and power on/off, the EEPROM has the internal functions described below. 1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation. During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20ns or less in programming mode. Be careful not to allow noise of a width more than 20ns on the control pins 20ns
1304.20.05 Rev 1 All data sheets are subject to change without notice
©2005 Maxwell Technologies All rights reserved
- Data Protection at VCC on/off When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable state during V CC on/off by using a CPU reset signal to RES pin. 3. RES Signal RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms after the last data is input 4. Software Data Protection Enable The 79C2040 contains a software controlled write protection feature that allows the user to inhibit all write operations to the device. This is useful in protecting the device from unwanted write cycles due to uncontrollable circuit noise or inadvertent writes caused by minor bus contentions. Software data protection is enabled by writing the following data sequence to the EEPROM and allowing the write cycle period (t WC) of 10ms to elapse: Software Data Protection Enable Sequence 10ms Address 5555 AAAA or 2AAA 5555 Data AA AA AA AA AA 55 55 55 55 55 A0 A0 A0 A0 A0
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©2005 Maxwell Technologies All rights reserved
- Writing to the Memory with Software Data Protection Enabled To write to the device once Software protection is enabled, the enable sequence must precede the data to be written. This sequence allows the write to occur while at the same time keeping the software protection enabled Sequence for Writing Data with Software Protection Enabled. 6. Disabling Software Protection Software data protection mode can be disabled by inputting the following 6 bytes sequence. Once the software protection sequence has been written, no data can be written to the memory until the write cycle (T WC) has elapsed. Software Protection Disable Sequence Devices are shipped in the “unprotected” state, meaning that the contents of the memory can be changed as required by the user. After the software data protection is enabled, the device enters the Protect Mode where no further write commands have any effect on the memory contents. Address 5555 AAAA or 2AAA 5555 Data AA AA AA AA AA 55 55 55 55 55 A0 A0 A0 A0 A0 Write Address(s) Normal Data Input Address 5555 AAAA or 2AAA 5555 Data AAAA or 2AAA 55 55 55 55 55 20 20 20 20 20
5555 AA AA AA AA AA
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©2005 Maxwell Technologies All rights reserved Note: All dimensions in inches
100 PIN STACKED FLAT PACKAGE
A .400 .448 .500 b .006 .008 .010 c .006 .008 .010 D 1.346 1.366 1.388 E .882 .897 .912 E1 -- -- .950 E2 .702 .708 -- E3 1.825 1.900 -- e 0.025BSC L .330 .340 .350 Q .013 .018 .023 S1 .005 .075 -- N 100
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©2005 Maxwell Technologies All rights reserved Important Notice: These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Tech- nologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
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©2005 Maxwell Technologies All rights reserved Feature Option Details79C0832 XX F X -XX Access Time Screening Flow Package Radiation Feature Base Product Nomenclature 15 = 150 ns 20 = 200 ns Multi Chip Module (MCM)1 K = Maxwell Class K H = Maxwell Class H I = Industrial (testing @ -55°C, +25°C, +125°C) E = Engineering (testing @ +25°C) F = Flat Pack RP = R AD-PAK® package 1)Products are manufactured and screened to Maxwell Technologies self-defined Class H and Class K flows.