54LVTH162373 MAXWELL | Alldatasheet
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All data sheets are subject to change without notice (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com PRELIMINARY 3.3V 16-Bit Transparent 54LVTH162373 ©2001 Maxwell Technologies All rights reserved. D-Type Latches
12.19.01 Rev 11000596
FEATURES:
- 3.3V low voltage advanced BiCMOS technology (LVT) 16- bit transparent D-type latches with 3-state outputs
- Total dose hardness: - > 100 krad (Si), depending upon space mission
- Excellent Single Event Effect: - SELTH: No LU > 119 MeV/mg/cm2
- Package: 48 pin R AD-PAK® flat package
- Operating temperature range: - 55 to 125°C
- Distributed V CC and GND pin configuration minimizes high- speed switching noise
- Supports mixed-mode signal operation - 5V input and output voltages with 3.3V VCC
- Supports unregulated battery operation down to 2.7V
- Supports live insertion
- Bus-hold data inputs eliminate the need for external pullup resistors DESCRIPTION: Maxwell Technologies’ 54LVTH162373 16-bit transparent D- type latches with 3-state output features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 54LVTH162373 is designed for low voltage (3.3V) V CC operation, but with the capability to provide a TTL interface to a 5V system environment. It is suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working reg- isters. The 54LVTH162373 can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is low, the Q output are latched at the levels set up at the data (D) inputs. When LE is high, the Q outputs follow the D inputs. A buffered output-enable (OE ) input can be used to place the eight out- puts in either a normal logic state or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus lines significantly. The high impedance state and the increased drive provide the capabili ty to drive bus lines with- out the need for interface or pullup components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high impedance state. Maxwell Technologies' patented R AD-PAK® packaging technol- ogy incorporates radiation shie lding in the microcircuit pack- age. It eliminates the need for box shielding while providing the required radiation shielding fo r a lifetime in orbit or space mission. In a GEO orbit, R AD-PAK provides greater than 100 krad (Si) radiation dose toleranc e. This product is available with screening up to Class S. 14 8 24 25 1LE 1D1 1D2 GND 1D3 1D4 VCC 1D5 1D6 GND 1D7 1D8 2D1 2D2 GND 2D3 2D4 VCC 2D5 2D6 GND 2D7 2D8 2LE2OE 2Q8 2Q7 GND 2Q6 2Q5 VCC 2Q4 2Q3 GND 2Q2 2Q1 1Q8 1Q7 GND 1Q6 1Q5 VCC 1Q4 1Q3 GND 1Q2 1Q1 1OE 1OE/2OE 1LE/2LE 1D1/2D1 2/13 1Q1/2Q1 To Seven Other Channels Logic Diagram (PositiveLogic) 54LVTH162373 Logic Diagram
TABLE 1. PINOUT DESCRIPTION TABLE 2. 54LVTH162373 ABSOLUTE MAXIMUM RATINGS
- The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
- This current flows only when the output is in the high state and V O > VCC.
- The maximum package power di ssipation is calculated using a junction temperature of 150 °C and a board trace length of 750
TABLE 3. DELTA LIMITS
TABLE 4. 54LVTH162373 RECOMMENDED OPERATING CONDITIONS 1
- Unused control inputs must be held high or low to prevent them from floating.
TABLE 5. 54LVTH162373 DC ELECTRICAL CHARACTERISTICS
- This is the increase in supply current for each input t hat is at the specified TTL voltage level rather than VCC or GND.
TABLE 6. 54LVTH162373 AC ELECTRICAL CHARACTERISTICS TABLE 5. 54LVTH162373 DC ELECTRICAL CHARACTERISTICS
FIGURE 1. LOAD CIRCUIT
- CL includes probe and jig capacitance.
FIGURE 2. PULSE DURATION TABLE 7. FUNCTION TABLE
FIGURE 3. SETUP AND HOLD TIMES FIGURE 4. PROPAGATION DELAY TIMES INVERTING AND NON-INVERTING OUTPUTS FIGURE 5. ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING
7All data sheets are subject to change without notice ©2001 Maxwell Technologies All rights reserved. 3.3V 16-Bit Transparent D-Type 54LVTH162373 Figure Notes: 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR < 10 MHz, ZO = 5Ω , tr < 2.5 ns, tf < 2.5 ns. 4. The outputs are measured one at a time with one transition per measurement.
8All data sheets are subject to change without notice ©2001 Maxwell Technologies All rights reserved. 3.3V 16-Bit Transparent D-Type 54LVTH162373 Note: All dimensions in inches
48 PIN RAD-PAK® FLAT PACKAGE
A 0.144 0.160 0.176 b 0.008 0.010 0.014 c 0.004 0.006 0.007 D -- 0.620 0.640 E 0.370 0.380 0.390 E1 -- -- 0.410 E2 0.200 0.210 0.220 E3 0.075 0.085 -- e 0.025 BSC L 0.275 0.285 0.295 Q 0.013 0.019 0.045 S1 0.005 0.018 -- N4 8
9All data sheets are subject to change without notice ©2001 Maxwell Technologies All rights reserved. 3.3V 16-Bit Transparent D-Type 54LVTH162373 Important Notice: These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in li fe support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Tech- nologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
10All data sheets are subject to change without notice ©2001 Maxwell Technologies All rights reserved. 3.3V 16-Bit Transparent D-Type 54LVTH162373 Feature Option Details54LVTH162373 RP F X Screening Flow Package Radiation Feature Base Product Nomenclature Monolithic S = Maxwell Class S B = Maxwell Class B E = Engineering (testing @ +25°C I = Industrial (testing @ -55°C, +25°C, +125°C) F = Flat Pack RP = R AD-PAK® package 3.3V 16-Bit Transparent D-Type Latches