74VHC123AFT

Toshiba Semiconductor

CMOS Digital Integrated Circuits Silicon Monolithic

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74VHC123AFT,74VHC221AFT CMOS Digital Integrated Circuits Silicon Monolithic 74VHC123AFT,74VHC221AFT74VHC123AFT,74VHC221AFT74VHC123AFT,74VHC221AFT74VHC123AFT,74VHC221AFT Start of commercial production 2013-05 1. 1. 1. 1. Functional DescriptionFunctional DescriptionFunctional DescriptionFunctional Description

Dual Monostable Multivibrator 74VHC123AFT: Retriggerable 74VHC221AFT: Non-Retriggerable 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74VHC123A/221AFT are high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon gate C2MOS technology. There are two trigger inputs, A input (negative edge), and B input (positive edge). These inputs are valid for a slow rise/fall time signal (t r = tf = 1 s) as they are schmitt trigger inputs. This device may also be triggered by using CLR input (positive edge). After triggering, the output stays in a MONOSTABLE state for a time period determined by the external resistor and capacitor (RX, CX). A low level at the CLR input breaks this state. Limits for CX and RX are: External capacitor, CX: No limit External resistor, RX: VCC = 2.0 V more than 5 kΩ VCC ≥ 3.0 V more than 1 kΩ An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. 3. 3. 3. 3. Features (Note)Features (Note)Features (Note)Features (Note) (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: Topr = -40 to 125  (3) High speed: Propagation delay time = 8.1 ns (typ.) at VCC = 5 V (4) Low power dissipation: Standby state: 4.0 µA (max) at Ta = 25  Active state: 750 µA (max) at Ta = 25  (5) High noise immunity: VNIH = VNIL = 28 % VCC (min) (6) Power-down protection is provided on all inputs. (7) Balanced propagation delays: tPLH ≈ tPHL (8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V (9) Pin and function compatible with 74HC123,74HC221 type. Note: In the case of using only one circuit,CLR should be tied to GND, RX/CX CX Q Q should be tied to OPEN, the other inputs should be tied to VCC or GND. Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT 4. 4. 4. 4. PackagingPackagingPackagingPackaging TSSOP16B 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. MarkingMarkingMarkingMarking 74VHC123AFT 74VHC221AFT 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT 7. 7. 7. 7. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol 74VHC123AFT 74VHC221AFT 8. 8. 8. 8. Truth TableTruth TableTruth TableTruth Table X: Don't care 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT 9. 9. 9. 9. Block DiagramBlock DiagramBlock DiagramBlock Diagram (1) CX, RX, DX are external Capacitor, resistor, and diode, respectively. (2) External clamping diode, DX; The external capacitor is charged to VCC level in the wait state, i.e. when no trigger is applied. If the supply voltage is turned off, CX is discharges mainly through the internal (parasitic) diode. If CX is sufficiently large and VCC drops rapidly, there will be some possibility of damaging the IC through in rush current or latch-up. If the capacitance of the supply voltage filter is large enough and VCC drops slowly, the in rush current is automatically limited and damage to the IC is avoided. The maximum value of forward current through the parasitic diode is ±20 mA. In the case of a large CX, the limit of fall time of the supply voltage is determined as follows: tf ≥ (VCC - 0.7) CX/20 mA (tf is the time between the supply voltage turn off and the supply voltage reaching 0.4 VCC.) In the even a system does not satisfy the above condition, an external clamping diode (DX) is needed to protect the IC from rush current. 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT 12. 12. 12. 12. Functional DescriptionFunctional DescriptionFunctional DescriptionFunctional Description (1) Standby state The external capacitor (CX) is fully charged to VCC in the stand-by state. That means, before triggering, the QP and QN transistors which are connected to the RX/CX node are in the off state. Two comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off. The total supply current is only leakage current. (2) Trigger operation Trigger operation is effective in any of the following three cases. First, the condition where the A input is low, and the B input has a rising signal; second, where the B input is high, and the A input has a falling signal; and third, where the A input is low and the B input is high, and the CLR input has a rising signal. After a trigger becomes effective, comparators C1 and C2 start operating, and QN is turned on. The external capacitor discharges through QN. The voltage level at the RX/CX node drops. If the RX/CX voltage level falls to the internal reference voltage VrefL, the output of C1 becomes low. The flip-flop is then reset and QN turns off. At that moment C1 stops but C2 continues operating. After QN turns off, the voltage at the RX/CX node starts rising at a rate determined by the time constant of external capacitor CX and resistor RX. Upon triggering, output Q becomes high, following some delay time of the internal F/F and gates. It stays high even if the voltage of RX/CX changes from falling to rising. When RX/CX reaches the internal reference voltage VrefH, the output of C2 becomes low, the output Q goes low and C2 stops its operation. That means, after triggering, when the voltage level of the RX/CX node reaches VrefH, the IC returns to its MONOSTABLE state. With large values of CX and RX, and ignoring the discharge time of the capacitor and internal delays of the IC, the width of the output pulse, twOUT, is as follows: twOUT = 1.0 × CX × RX (3) Retrigger operation When a new trigger is applied to either input A or B while in the MONOSTABLE state, it is effective only if the IC is charging CX. The voltage level of the RX/CX node then falls to VrefL level again. Therefore the Q output stays high if the next trigger comes in before the time period set by CX and RX. If the new trigger is very close to previous trigger, such as an occurrence during the discharge cycle, it will have no effect. The minimum time for a trigger to be effective 2 nd trigger, trr (min), depends on VCC and CX.(74VHC123AFT) (4) Reset operation In normal operation, the CLR input is held high. If CLR is low, a trigger has no effect because the Q output is held low and the trigger control F/F is reset. Also, QP turns on and CX is charged rapidly to VCC. This means if CLR is set low, the IC goes into a wait state. 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT 13. 13. 13. 13. Absolute Maximum Ratings (Note)Absolute Maximum Ratings (Note)Absolute Maximum Ratings (Note)Absolute Maximum Ratings (Note) Characteristics Supply voltage Input voltage Output voltage Input diode current Output diode current Output current VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Note (Note 1) Rating -0.5 to 7.0 -0.5 to 7.0 -0.5 to VCC + 0.5 -20 ±20 ±25 ±50 180 -65 to 150 Unit V V V mA mA mA mA mW Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: 180 mW in the range of T a = -40 to 85  . From Ta = 85 to 125  a derating factor of -3.25 mW/  shall be applied until 50 mW. 14. 14. 14. 14. Operating Ranges (Note)Operating Ranges (Note)Operating Ranges (Note)Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall times External capacitor External resistor Symbol VCC VIN VOUT Topr dt/dv CX RX Note (Note 1) (Note 1) Test Condition VCC = 3.3 ± 0.3 V VCC = 5 ± 0.5 V VCC = 2.0 V VCC ≥ 3.0 V Rating 2.0 to 5.5 0 to 5.5 0 to VCC -40 to 125 0 to 100 0 to 20 No limitation ≥ 5 k ≥ 1 k Unit V V V ns/V F Ω Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 1: The maximum allowable values of C X and R X are a function of leakage of capacitor C X, the leakage of 74VHC123A/221AFT, and leakage due to board layout and surface resistance. Susceptibility to externally induced noise signals may occur for RX > 1 MΩ. 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT 15. 15. 15. 15. Electrical CharacteristicsElectrical CharacteristicsElectrical CharacteristicsElectrical Characteristics Characteristics High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Input leakage current RX/CX terminal OFF-state current Quiescent supply current Active-state supply current (per circuit) Symbol VIH VIL VOH VOL IIN IIN ICC ICC(opr) Test Condition VIN = VIH or VIL VIN = VIH or VIL VIN = 5.5 V or GND VIN = VCC or GND VIN = VCC or GND VIN = VCC or GND RX/CX = 0.5 VCC IOH = -50 µA IOH = -4 mA IOH = -8 mA IOL = 50 µA IOL = 4 mA IOL = 8 mA VCC (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 5.5 3.0 4.5 5.5 Min 1.50 VCC × 0.7 1.9 2.9 4.4 2.58 3.94 Typ. 2.0 3.0 4.5 0.0 0.0 0.0 160 380 560 Max 0.50 VCC × 0.3 0.1 0.1 0.1 0.36 0.36 ±0.1 ±0.25 4.0 250 500 750 Unit V V V V µA µA µA µA Characteristics High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Input leakage current RX/CX terminal OFF-state current Quiescent supply current Active-state supply current (per circuit) Symbol VIH VIL VOH VOL IIN IIN ICC ICC(opr) Test Condition VIN = VIH or VIL VIN = VIH or VIL VIN = 5.5 V or GND VIN = VCC or GND VIN = VCC or GND VIN = VCC or GND RX/CX = 0.5 VCC IOH = -50 µA IOH = -4 mA IOH = -8 mA IOL = 50 µA IOL = 4 mA IOL = 8 mA VCC (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 5.5 3.0 4.5 5.5 Min 1.50 VCC × 0.7 1.9 2.9 4.4 2.48 3.80 Max 0.50 VCC × 0.3 0.1 0.1 0.1 0.44 0.44 ±1.0 ±2.5 40.0 280 650 975 Unit V V V V µA µA µA µA 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT Characteristics High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Input leakage current RX/CX terminal OFF-state current Quiescent supply current Active-state supply current (per circuit) Symbol VIH VIL VOH VOL IIN IIN ICC ICC(opr) Test Condition VIN = VIH or VIL VIN = VIH or VIL VIN = 5.5 V or GND VIN = VCC or GND VIN = VCC or GND VIN = VCC or GND RX/CX = 0.5 VCC IOH = -50 µA IOH = -4 mA IOH = -8 mA IOL = 50 µA IOL = 4 mA IOL = 8 mA VCC (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 5.5 3.0 4.5 5.5 Min 1.50 VCC × 0.7 1.9 2.9 4.4 2.40 3.70 Max 0.50 VCC × 0.3 0.1 0.1 0.1 0.55 0.55 ±2.0 ±10.0 80.0 280 650 975 Unit V V V V µA µA µA µA Characteristics Minimum pulse width Minimum pulse width (CLR) Minimum retrigger time Part Number 74VHC123AFT Symbol tw(L),tw(H) tw(L) trr Test Condition RX = 1 kΩ, CX = 100 pF RX = 1 kΩ, CX = 0.01 µF VCC (V) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 Typ. 1.5 1.2 Limit 5.0 5.0 5.0 5.0 Unit ns ns ns µs (Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, Taaaa = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85  , Input: t, Input: t, Input: t, Input: trrrr = t = t = t = tffff = 3 ns) = 3 ns) = 3 ns) = 3 ns) Characteristics Minimum pulse width Minimum pulse width (CLR) Symbol tw(L),tw(H) tw(L) Test Condition VCC (V) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 Limit 5.0 5.0 5.0 5.0 Unit ns ns 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT (Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, Taaaa = -40 to 125 = -40 to 125 = -40 to 125 = -40 to 125  , Input: t, Input: t, Input: t, Input: trrrr = t = t = t = tffff = 3 ns) = 3 ns) = 3 ns) = 3 ns) Characteristics Minimum pulse width Minimum pulse width (CLR) Symbol tw(L),tw(H) tw(L) Test Condition VCC (V) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 Limit 5.0 5.0 5.0 5.0 Unit ns ns Characteristics Propagation delay time (A, B-Q, Q) Propagation delay time (CLR trigger-Q, Q) Propagation delay time (CLR-Q, Q) Output pulse width Output pulse width error between circuits (in same package) Input capacitance Power dissipation capacitance Symbol tPLH,tPHL tPLH,tPHL tPLH,tPHL twOUT ∆twOUT CIN CPD Note (Note 1) Test Condition CX = 28 pF, RX = 2 kΩ CX = 0.01 µF, RX = 10 kΩ CX = 0.1 µF, RX = 10 kΩ VCC (V) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 CL (pF) Min 0.9 0.9 Typ. 13.4 15.9 8.1 9.6 14.5 17.0 8.7 10.2 10.3 12.8 6.3 7.8 160 133 100 100 1.0 1.0 Max 20.6 24.1 12.0 14.0 22.4 25.9 12.9 14.9 15.8 19.3 9.4 11.4 240 200 110 110 1.1 1.1 Unit ns ns ns ns µs ms pF pF Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation. ICC(opr) = CPD × VCC × fIN + ICC' × Duty/100 + ICC/2 (per circuit), (ICC': Active supply current), (Duty: %) 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT (Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, Taaaa = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85  , Input: t, Input: t, Input: t, Input: trrrr = t = t = t = tffff = 3 ns) = 3 ns) = 3 ns) = 3 ns) Characteristics Propagation delay time (A, B-Q, Q) Propagation delay time (CLR trigger-Q, Q) Propagation delay time (CLR-Q, Q) Output pulse width Input capacitance Symbol tPLH,tPHL tPLH,tPHL tPLH,tPHL twOUT CIN Test Condition CX = 28 pF, RX = 2 kΩ CX = 0.01 µF, RX = 10 kΩ CX = 0.1 µF, RX = 10 kΩ VCC (V) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 CL (pF) Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 0.9 0.9 Max 24.0 27.5 14.0 16.0 26.0 29.5 15.0 17.0 18.5 22.0 11.0 13.0 300 240 110 110 1.1 1.1 Unit ns ns ns ns µs ms pF (Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, T(Unless otherwise specified, Taaaa = -40 to 125 = -40 to 125 = -40 to 125 = -40 to 125  , Input: t, Input: t, Input: t, Input: trrrr = t = t = t = tffff = 3 ns) = 3 ns) = 3 ns) = 3 ns) Characteristics Propagation delay time (A, B-Q, Q) Propagation delay time (CLR trigger-Q, Q) Propagation delay time (CLR-Q, Q) Output pulse width Input capacitance Symbol tPLH,tPHL tPLH,tPHL tPLH,tPHL twOUT CIN Test Condition CX = 28 pF, RX = 2 kΩ CX = 0.01 µF, RX = 10 kΩ CX = 0.1 µF, RX = 10 kΩ VCC (V) 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 CL (pF) Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 0.85 0.85 Max 27.0 30.5 15.5 17.5 29.0 32.5 17.0 19.0 21.0 24.5 12.5 14.5 300 240 115 115 1.15 1.15 Unit ns ns ns ns µs ms pF 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT 16. 16. 16. 16. Characteristics Curves (Note)Characteristics Curves (Note)Characteristics Curves (Note)Characteristics Curves (Note) (74VHC123AFT)(74VHC123AFT)(74VHC123AFT)(74VHC123AFT) Voltage (typ.)Voltage (typ.)Voltage (typ.)Voltage (typ.) Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

74VHC123AFT,74VHC221AFT Package DimensionsPackage DimensionsPackage DimensionsPackage Dimensions Unit: mm Weight: 0.055 g (typ.) Package Name(s) Nickname: TSSOP16B 2017-03-08 Rev.7.0 ©2016 Toshiba Corporation

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Product Information

74VHC123AFT specifications and overview.

Summary

CMOS Digital Integrated Circuits Silicon Monolithic

Description

CMOS Digital Integrated Circuits Silicon Monolithic

Source title 74VHC123AFT Datasheet(PDF) - Toshiba Semiconductor

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