74LS155-6 SOLIDSTATE | Alldatasheet
Document overview
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Technical content
The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enable inputs. If the Enable functions are satisfied, one output of each decoder will be LOW as selected by the address inputs. The LS156 has open collector outputs for wired-OR (DOT-AND) decoding and function generator applications. The LS155 and LS156 are fabricated with the Schottky barrier diode process for high speed and are completely compatible with all Motorola TTL families.
- Schottky Process for High Speed
- Multifunction Capability
- Common Address Inputs
- True or Complement Data Demultiplexing
- Input Clamp Diodes Limit High Speed Termination Effects
- ESD > 3500 Volts CONNECTION DIAGRAM DIP (TOP VIEW) NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 14 13 12 11 10 9 12345 6 7 16 15 VCC Ea Eb Eb A0 O 3b O 1bO 2b O 0b Ea A1 O 3a O 2a O 1a O 0a GND PIN NAMES LOADING (Note a) HIGH LOW A0, A1 Ea, Eb Ea O 0–O 3 Address Inputs Enable (Active LOW) Inputs Enable (Active HIGH) Input Active LOW Outputs (Note b) 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. Temperature Ranges. The HIGH level drive for the LS156 must be established by an external resistor. 74LS155 74LS156 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER LS156-OPEN-COLLECTOR LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 620-09 N SUFFIX PLASTIC CASE 648-08
ORDERING INFORMATION
VCC = PIN 16 GND = PIN 8 1 2 13 3 14 15 EE A0 A0 A1 A1 012 3 0 123 DECODER a DECODER b 7 6 5 4 9 10 11 12 www.sycelectronica.com.ar
SN54/74LS155 • SN54/74LS156 LOGIC DIAGRAM Ea Ea A0 A1 EbEb O 0a O 1a O 2a O 3a O 0b O 1b O 2b O 3b 1412 45 9 11 1210 13 15 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS FUNCTIONAL DESCRIPTION The LS155 and LS156 are Dual 1-of-4 Decoder/Demulti- plexers with common Address inputs and separate gated Enable inputs. When enabled, each decoder section accepts the binary weighted Address inputs (A0, A1) and provides four mutually exclusive active LOW outputs (O 0–O 3). If the Enable requirements of each decoder are not met, all outputs of that decoder are HIGH. Each decoder section has a 2-input enable gate. The enable gate for Decoder “a” requires one active HIGH input and one active LOW input (Ea•E a). In demultiplexing applica- tions, Decoder “a” can accept either true or complemented data by using the E a or Ea inputs respectively. The enable gate for Decoder “b” requires two active LOW inputs (Eb•Eb). The LS155 or LS156 can be used as a 1-of-8 Decoder/Demulti- plexer by tying Ea to E b and relabeling the common connection as (A2). The other Eb and Ea are connected together to form the common enable. The LS155 and LS156 can be used to generate all four minterms of two variables. These four minterms are useful in some applications replacing multiple gate functions as shown in Fig. a. The LS156 has the further advantage of being able to AND the minterm functions by tying outputs together. Any number of terms can be wired-AND as shown below. (E + A0 + A1) where E = Ea + Ea; E = Eb + Eb Figure a E E E E O 0 O 1 O 2 O 3 E E E E O 0 O 1 O 2 O 3 TRUTH TABLE ADDRESS ENABLE “a” OUTPUT “a” ENABLE “b” OUTPUT “b” A 0 A 1 Ea Ea O 0 O 1 O 2 O 3 Eb Eb O 0 O 1 O 2 O 3 X X L X H H H H H X H H H H X XX HH HH HX HH HHH L LH LL HH HL LL HHH H LH LH LH HL LH LHH L HH LH HL HL LH HLH H H H L H H H L L L H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care www.sycelectronica.com.ar
GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 54 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 –55 125 IOH Output Current — High 54, 74 –0.4 mA IOL Output Current — Low 54 4.0 8.0 mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Sb l P Limits Ui T C di iSymbol Parameter Min Typ Max Unit Test Conditions VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage for All Inputs VIL Input LOW Voltage 54 0.7 V Guaranteed Input LOW Voltage forVIL Input LOW Voltage 74 0.8 V pg All Inputs VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA VOH Output HIGH Voltage 54 2.5 3.5 V VCC = MIN, IOH = MAX, VIN = VIHVOH O utput HIGH Voltage 74 2.7 3.5 V CC , OH , IN IH or VIL per Truth Table VOL Output LOW Voltage 54, 74 0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN, VIN =V ILor VIHVOL O utput LOW Voltage 74 0.35 0.5 V IOL = 8.0 mA VIN = VIL or VIH per Truth Table IIH Input HIGH Current 20 µA VCC = MAX, VIN = 2.7 V IIH Input HIGH C urrent 0.1 mA VCC = MAX, VIN = 7.0 V IIL Input LOW Current –0.4 mA VCC = MAX, VIN = 0.4 V IOS Short Circuit Current (Note 1) –20 –100 mA VCC = MAX ICC Power Supply Current 10 mA VCC = MAX Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C) Sb l P Limits Ui T C di iSymbol Parameter Min Typ Max Unit Test Conditions tPLH tPHL Propagation Delay Address, Ea or Eb to Output ns Figure 1 V5 0 VtPLH tPHL Propagation Delay Address to Output ns Figure 2 VCC = 5.0 V C L = 15 pF tPLH tPHL Propagation Delay Ea to Output ns Figure 1 AC WAVEFORMS Figure 1 Figure 2 VIN VOUT 1.3 V tPHL 1.3 V 1.3 V 1.3 V tPLH VIN VOUT 1.3 V tPHL 1.3 V 1.3 V tPLH 1.3 V www.sycelectronica.com.ar
GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 54 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 –55 125 VOH Output Voltage — High 54, 74 5.5 V IOL Output Current — Low 54 4.0 8.0 mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Sb l P Limits Ui T C di iSymbol Parameter Min Typ Max Unit Test Conditions VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage for All Inputs VIL Input LOW Voltage 54 0.7 V Guaranteed Input LOW Voltage forVIL Input LOW Voltage 74 0.8 V pg All Inputs VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA IOH Output HIGH Current 54, 74 100 µA VCC = MIN, VOH = MAX VOL Output LOW Voltage 54, 74 0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN, VIN =V ILor VIHVOL O utput LOW Voltage 74 0.35 0.5 V IOL = 8.0 mA VIN = VIL or VIH per Truth Table IIH Input HIGH Current 20 µA VCC = MAX, VIN = 2.7 V IIH Input HIGH C urrent 0.1 mA VCC = MAX, VIN = 7.0 V IIL Input LOW Current –0.4 mA VCC = MAX, VIN = 0.4 V ICC Power Supply Current 10 mA VCC = MAX AC CHARACTERISTICS (TA = 25°C) Sb l P Limits Ui T C di iSymbol Parameter Min Typ Max Unit Test Conditions tPLH tPHL Propagation Delay Address, Ea or Eb to Output ns Figure 1 V5 0 VtPLH tPHL Propagation Delay Address to Output ns Figure 2 VCC = 5.0 V C L = 15 pF R L = 2.0 kΩ tPLH tPHL Propagation Delay Ea to Output ns Figure 1 R L = 2.0 kΩ AC WAVEFORMS Figure 1 Figure 2 VIN VOUT 1.3 V tPHL 1.3 V 1.3 V 1.3 V tPLH VIN VOUT 1.3 V tPHL 1.3 V 1.3 V tPLH 1.3 V www.sycelectronica.com.ar