74HC02 NEXPERIA | Alldatasheet

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use of current limiting resistors to interface inputs to voltages in excess of VCC.

  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Input levels:
  • For 74HC02: CMOS level
  • For 74HCT02: TTL level
  • Complies with JEDEC standards:
  • JESD8C (2.7 V to 3.6 V)
  • JESD7A (2.0 V to 6.0 V)
  • ESD protection:
  • HBM JESD22-A114F exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information

Table 1. Ordering information

Nexperia 74HC02; 74HCT02 Quad 2-input NOR gate 4. Functional diagram mna216 2 1 5 4 8 10 11 13 Fig. 1. Logic symbol 001aah084 4≥16 10≥19 13≥112 Fig. 2. IEC logic symbol mna215 A B Y Fig. 3. Logic diagram (one gate) 5. Pinning information 5.1. Pinning D package SOT108-1 (SO14) aaa-035251 7 8 VCC GND 3A PW package SOT402-1 (TSSOP14) 1Y VCC 1A 4Y 1B 4B 2Y 4A 2A 3Y 2B 3B GND 3A aaa-035252 7 8 aaa-035253 Transparent top view 2B 3B 2A 3Y 2Y 4A 1B 4B 1A 4Y GND VCC 6 9 5 10 4 11 3 12 2 13 terminal 1 index area BQ package SOT762-1 (DHVQFN14) GND(1) aaa-035556 Transparent top view 1A 2 GND 7 VCC14 terminal 1 index area 3A 8 1Y1 1B 4B3 12 2Y 4 2A 5 2B 6 4Y13 4A11 3Y10 3B9 BZ package SOT8014-1 (DHXQFN14) GND(1) (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. 74HC_HCT02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 8 — 9 February 2023 2 / 14

Table 2. Pin description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C. For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C. For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C.

  1. Recommended operating conditions

Table 5. Recommended operating conditions Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Table 7. Dynamic characteristics GND = 0 V; CL = 50 pF; for test circuit see Fig. 5.

[1] tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. ∑ (CL x VCC 2 x fo) = sum of outputs. Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Table 8. Measurement points

Test data is given in Table 9. RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Table 9. Test data

Nexperia 74HC02; 74HCT02 Quad 2-input NOR gate 11. Package outline UNIT A max. A 1 A 2 A 3 b p c D (1) E (1) (1) e H E L L p Q Z y w v θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 SOT108-1 X w M θ A A 1 A 2 b p D H E L p Q detail X E Z e c L v M A (A ) 3 A y 076E06 MS-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 Fig. 6. Package outline SOT108-1 (SO14) 74HC_HCT02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 8 — 9 February 2023 8 / 14

Nexperia 74HC02; 74HCT02 Quad 2-input NOR gate UNIT A 1 A 2 A 3 b p c D (1) E (2) (1) e H E L L p Q Z y w v θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.72 0.38 o o 0.13 0.1 0.2 1 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT402-1 MO-153 99-12-27 03-02-18 w M b p D Z e 0.25 1 7 14 8 θ A A 1 A 2 L p Q detail X L (A ) 3 H E E c v M A X A y 0 2.5 5 mm scale TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 A max. 1.1 pin 1 index Fig. 7. Package outline SOT402-1 (TSSOP14) 74HC_HCT02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 8 — 9 February 2023 9 / 14

Nexperia 74HC02; 74HCT02 Quad 2-input NOR gate ReferencesOutline version European projection Issue date IEC JEDEC JEITA SOT762-1 MO-241 sot762-1_po 15-04-10 15-05-05 Unit mm max nom min 1 0.05 3.1 1.65 2.6 0.5 2 0.4 A(1) Dimensions (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm SOT762-1 A1 b 0.30 c D(1) Dh E(1) Eh 1.00 e e1 k k L v 0.1 w y 0.51.15 0 4 mm2 scale terminal 1 index area A c L Eh Dh k b 2 6 13 9 D E terminal 1 index area e e C yCy1 AC Bv Cw detail X AB X Fig. 8. Package outline SOT762-1 (DHVQFN14) 74HC_HCT02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 8 — 9 February 2023 10 / 14

Nexperia 74HC02; 74HCT02 Quad 2-input NOR gate ReferencesOutline version European projection Issue date IEC JEDEC JEITA SOT8014-1 sot8014-1_po 20-09-18 20-09-22 Unit mm max nom min 0.48 0.45 0.42 0.23 0.18 0.13 2.0 1.00 0.95 0.90 0.4 0.35 0.30 0.250.2 A 0.05 0.02 0.00 A1 A3 Dimensions (mm are the original dimensions) DHXQFN14: plastic, leadless dual in-line compatible thermal enhanced extreme thin quad flat package; no leads; 14 terminals; 0.4 mm pitch; body 2 mm x 2 mm x 0.48 mm SOT8014-1 b D D1 0.1 w 0.05 v 0.1 u 0.15 (typ) keE 2.0 1.00 0.95 0.90 L A C Cy1 C detail X seating plane A B 0.05 y 0.05 z 0.05 X pin 1 index area pin 1 index area y pin1 I.D. 2 mm0 scale C C e (10x) L (14x) 13 9 2 6 AC Bw M AC Bu M Cv M z z D E b (14x) Fig. 9. Package outline SOT8014-1 (DHXQFN14) 74HC_HCT02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 8 — 9 February 2023 11 / 14

Table 10. Abbreviations Table 11. Revision history Modifications: • Added type numbers 74HC02BZ and 74HCT02BZ (SOT8014-1/DHXQFN14). Modifications: • Section 2 updated.

  • Type numbers 74HC02DB and 74HCT02DB (SOT337-1/SSOP14) removed. 74HC_HCT02 v.6 20200407 Product data sheet - 74HC_HCT02 v.5 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia.
  • Legal texts have been adapted to the new company name where appropriate.
  • Table 4: Derating values for Ptot total power dissipation have been updated. 74HC_HCT02 v.5 20151126 Product data sheet - 74HC_HCT02 v.4 Modifications: • Type numbers 74HC02N and 74HCT02N (SOT27-1) removed. 74HC_HCT02 v.4 20120904 Product data sheet - 74HC_HCT02 v.3 Modifications: • Conditions for VOH, II and ICC updated to the family specification (errata). 74HC_HCT02 v.3 20080918 Product data sheet - 74HC_HCT02_CNV v.2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors.
  • Legal texts have been adapted to the new company name where appropriate.
  • Added type numbers 74HC02BQ and 74HCT02BQ (DHVQFN14 package) 74HC_HCT02_CNV v.2 19970827 Product specification - - 74HC_HCT02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 8 — 9 February 2023 12 / 14

Nexperia 74HC02; 74HCT02 Quad 2-input NOR gate 14. Legal information Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 74HC_HCT02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 8 — 9 February 2023 13 / 14