74F51 NEXPERIA | Alldatasheet
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Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. use http://www.nexperia.com salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e -mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia
/C0109 /C0110 /C0114 74F51 Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate Product specification IC15 Data Handbook
1989 Mar 03
Philips Semiconductors Product specification 74F51Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate 2March 3, 1989 853–0054 95962 TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F51 3.0ns 3.5mA
ORDERING INFORMATION
DESCRIPTION
VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 14-pin plastic DIP N74F51N SOT27-1 14-pin plastic SO N74F51D SOT108-1 PIN CONFIGURATION GND VCC D0e D0d Q 0 D0f D0c D0b D0a D1a Q 1 D1b D1c D1d SF00085 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Dna, Dnb, Dnc, Dnd, Dne, DnfData inputs 1.0/1.0 20µA/0.6mA Q 0, Q1 Data outputs 50/33 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL D1aD0fD0b D0c D0d D1b D1cD0e Q0 Q1 12 13 9 10 11 2 3 4 VCC = Pin 14 GND = Pin 7 SF00086 D0a D1d IEC/IEEE SYMBOL SF00087 LOGIC DIAGRAM VCC = Pin 14 GND = Pin 7 SF00088 D0a D0b D0c D1a D1b Q 0 D0d D0e D0f D1c D1d Q 1 FUNCTION TABLE FOR 3-INPUT GATES INPUTS OUTPUT D0a D0b D0c D0d D0e D0f Q 0 H H H X X X L X X X H H H L All other combinations H NOTES: H = High voltage level L = Low voltage level X = Don’t care FUNCTION TABLE FOR 2-INPUT GATES INPUTS OUTPUT D1a D1b D1c D1d Q 1 H H X X L X X H H L All other combinations H NOTES: H = High voltage level L = Low voltage level X = Don’t care
Philips Semiconductors Product specification 74F51Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate March 3, 1989 3 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 40 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNITSYMBOL PARAMETER MIN NOM MAX UNIT VCC Supply voltage 4.5 5.0 5.5 V VIH High-level input voltage 2.0 V VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –1 mA IOL Low-level output current 20 mA Tamb Operating free-air temperature range 0 +70 °C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS 1 LIMITS UNITSYMBOL PARAMETER TEST CONDITIONS 1 MIN TYP 2 MAX UNIT VO High level output voltage VCC = MIN, VIL = MAX ±10%V CC 2.5 V VOH High-level output voltage VIH = MIN, IOH = MAX ±5%V CC 2.7 3.4 V VO Low level output voltage VCC = MIN, VIL = MAX ±10%V CC 0.30 0.50 V VOL Low-level output voltage VIH = MIN, IOL = MAX ±5%V CC 0.30 0.50 V VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V II Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –0.6 mA IOS Short-circuit output current3 VCC = MAX –60 –150 mA ICC Supply current (total) ICCH VCC = MAX VIN = GND 1.8 3.0 mA ICC Supply current (total) ICCL VCC = MAX VIN = 4.5V 5.5 7.5 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS , the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
Philips Semiconductors Product specification 74F51Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate March 3, 1989 4 AC ELECTRICAL CHARACTERISTICS LIMITS TEST VCC = +5.0V VCC = +5.0V ± 10% SYMBOL PARAMETER TEST CONDITION Tamb = +25°C Tamb = 0°C to +70°C UNITCONDITION C L = 50pF, RL = 500Ω C L = 50pF, RL = 500Ω MIN TYP MAX MIN MAX tPLH tPHL Propagation delay Dna, Dnb, Dnc, Dnd, Dne, Dnf to Qn Waveform 1 2.0 1.0 3.5 2.5 5.5 4.0 1.5 1.0 6.5 4.5 ns AC WAVEFORMS VMVM VMVM Q n Dna, Dnb, Dnc, Dnd, Dne, Dnf tPHL tPLH SF00089 Waveform 1. Propagation Delay for Inverting Outputs NOTE: For all waveforms, VM = 1.5V. TEST CIRCUIT AND WAVEFORM tw 90% VM 10% 90% VM 10% 90% VM 10% 90% VM 10% NEGATIVE PULSE POSITIVE PULSE tw AMP (V) tTHL (tf ) INPUT PULSE REQUIREMENTS rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns Input Pulse Definition VCC family 74F D.U.T.PULSE GENERATOR R LC LR T VIN VOUT Test Circuit for Totem-Pole Outputs DEFINITIONS: R L = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. C L = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. R T = Termination resistance should be equal to ZOUT of pulse generators. tTHL (tf ) tTLH (tr ) tTLH (tr ) AMP (V) amplitude 3.0V 1.5V VM SF00006
Philips Semiconductors Product specification 74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate
1989 Mar 03 5
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
Philips Semiconductors Product specification 74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate
1989 Mar 03 6
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Philips Semiconductors Product specification 74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate
1989 Mar 03 7
Philips Semiconductors Product specification 74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate yyyy mmm dd 8 Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors
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P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Date of release: 10-98 Document order number: 9397-750-05065 /C0109 /C0110 /C0114 Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Production Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Data sheet status [1] Please consult the most recently issued datasheet before initiating or completing a design.