74AXP1T14 NEXPERIA | Alldatasheet
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Technical content
Dual supply Schmitt trigger inverter Rev. 2 — 9 May 2017 Product data sheet
1 General description
The 74AXP1T14 is a dual supply Schmitt trigger inverter. It features one input (A), an output (Y) and dual supply pins (VCCI and VCCO). The input is referenced to VCCI and the output is referenced to VCCO. Input A can be connected directly to VCCI or GND. VCCI can be supplied at any voltage between 0.7 V and 2.75 V and VCCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature allows voltage level translation. This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
2 Features and benefits
- Wide supply voltage range: – VCCI: 0.7 V to 2.75 V – VCCO: 1.2 V to 5.5 V
- Low input capacitance; CI = 0.6 pF (typical)
- Low output capacitance; CO = 1.8 pF (typical)
- Low dynamic power consumption; CPD = 0.5 pF at VCCI = 1.2 V (typical)
- Low dynamic power consumption; CPD = 7.1 pF at VCCO = 3.3 V (typical)
- Low static power consumption; ICCI = 0.5 μA (85 °C maximum)
- Low static power consumption; ICCO = 1.8 μA (85 °C maximum)
- High noise immunity
- Complies with JEDEC standard: – JESD8-12A.01 (1.1 V to 1.3 V; A input) – JESD8-11A.01 (1.4 V to 1.6 V) – JESD8-7A (1.65 V to 1.95 V) – JESD8-5A.01 (2.3 V to 2.7 V) – JESD8-C (2.7 V to 3.6 V; Y output) – JESD12-6 (4.5 V to 5.5 V; Y output)
- ESD protection: – HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV – CDM JESD22-C101E exceeds 1000 V
- Latch-up performance exceeds 100 mA per JESD78D Class II
- Inputs accept voltages up to 2.75 V
- Low noise overshoot and undershoot < 10% of VCCO
- IOFF circuitry provides partial power-down mode operation
- Specified from -40 °C to +85 °C
3 Ordering information
Table 1. Ordering information
4 Marking
Table 2. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5 Functional diagram
Figure 1. Logic symbol Figure 2. Logic diagram
6 Pinning information
6.1 Pinning
Figure 3. Pin configuration SOT353-1 (TSSOP5) Figure 4. Pin configuration SOT1226 (X2SON5)
6.2 Pin description
Table 3. Pin description
7 Functional description
Table 4. Function table [1] [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
8 Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] VCCO + 0.5 V should not exceed 6.0 V.
9 Recommended operating conditions
Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V).
10 Static characteristics
Table 7. Static characteristics At recommended operating conditions, unless otherwise specified; voltages are referenced to GND (ground = 0 V).
Table 8. Static characteristics supply current At recommended operating conditions, unless otherwise specified; voltages are referenced to GND (ground = 0 V). [1] Typical values are measured at VCCI = VCCO = 1.2 V unless otherwise specified. [2] Typical values are measured at VCCI = VCCO = 2.5 V. [3] Typical values are measured at VCCI = 1.2 V and VCCO = 5.0 V. Table 9. Typical output supply current (ICCO)
0 V 0 1 5 20 100 200 400 nA
0.8 V 1 10 150 200 300 500 800 nA
1.2 V 1 1 5 200 300 500 800 nA
1.5 V 1 1 5 100 300 500 800 nA
1.8 V 1 1 5 100 300 500 800 nA
2.5 V 1 1 5 100 100 500 800 nA
11 Dynamic characteristics
Table 10. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11 ; for wave form see Figure 7. [1] Typical values are measured at nominal supply voltages and Tamb = +25 °C. [2] tpd is the same as tPLH and tPHL. [3] tt is the same as tTHL and tTLH.
Table 11. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11 ; for wave form see Figure 7. [1] Typical values are measured at nominal supply voltages and tamb = +25 °C. [2] tpd is the same as tPLH and tPHL. [3] tt is the same as tTHL and tTLH.
Table 12. Typical dynamic characteristics at Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11; for wave form see Figure 7. [1] CPD is used to determine the dynamic power dissipation (PD in μW). CPD = power dissipation capacitance of the input supply. CPD = power dissipation capacitance of the output supply.
11.1 Waveforms and graphs
Measurement points are given in Table 13 . VOL and VOH are typical output voltage drops that occur with the output load. Figure 7. Input A to output Y propagation delay times and output transition times Table 13. Measurement points
Tamb = -40 °C to +85 °C unless otherwise specified. Figure 10. Additional propagation delay versus load capacitance
Test data is given in Table 14. RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Figure 11. Test circuit for measuring switching times Table 14. Test data
- Plastic or metal protrusions of 0.15 mm maximum per side are not included.
Figure 12. Package outline SOT353-1 (TSSOP5)
- Dimension A is including plating thickness.
- Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Figure 13. Package outline SOT1226 (X2SON5)
13 Abbreviations
Table 15. Abbreviations Table 16. Revision history Modifications: • Added type number 74AXP1T14GX (SOT1226/X2SON5).
Dual supply Schmitt trigger inverter Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © Nexperia B.V. 2017. All rights reserved. For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 9 May 2017 Document identifier: 74AXP1T14