TC40H192P TOSHIBA | Alldatasheet
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TOSHIBA INTEGRATED CIRCUT TECHNICAL 01h dcr CMOS DIGITAL INTEGRATED CIRCUIT TC40H193P/F SILICON MONOLITHIC TC40H192 SYNCHRONOUS BCD UP/DOWN COUNTER (DUAL CLOCK WITH CLEA?) TC40H193 SYNCHRONOUS 4-BIT BINARY UP/DOWN COUNTER (DUAL CLOCK WITH CLEAR) The TC40H192 and the TC40H193 are synchro~ nous type 4~bit up/down counters. CLEAR input is active at "H" level, and PRE- ws! SET input at "L" level, respectively. Both of them perform asynchronous operation. 1 The UP COUNT input and DOWN COUNT input of DIP16(sD16A-P) CLOCK are independent, and perform COUNT operation at the rising edge of pulse, respectively. The TC4CH192 and the TC40H193 are compatible 16 in tunction and pin assignment with the TTL74192/ 74193. ? MPPL6(Pisac-F) MAXIMUM RATINGS PIN CONNECTION Supply Voltage Vgs-0.5 vVssti0 | v_| wp eB RB ee [ieput Gureent [tw | =0 | at | Power Dissipation | Pp |300(DIP)/180(MFP)| mw | fre. . 2 Storage Temperature ~65 v150 a 3 3 22353 3 2 Lead Temp. /Time 260°C + 10 sec 3 le 54587 8 TRUTH TABLE Fouoion Piss Toaomioa TosoHios count|count [couwr[@a Tas] ao Tan] [cour [aa] as] ac [en] pape fe fe [eos ve) Pee ee Pa ee pe [ae [xo count | [2 Te Pa Tee] pep fe Te feoowr cow) [os Tata fete) [sa tate] a a ee es pe fete ti yu} [os Tete teal Le Tete fete} [os ate ye te] {oa fe fw [eT cc poe Te fe Tata) po fae Tate} [2 [uta tata} Lor je tafete)
- TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA TC40H192P/F TC40H193P/F LOGIC DIAGRAM (TC40H192) De —_> pe oxeRY tt > po soRKOW Je count uP GTI SS | oan ONT BOR “ay Hit ah * ® Do 2a De OUTPUT Q, “TaD De t—= ay cit -4 es pies = > ‘i, —2 | [| ¢ ae DATA INPUT D—Do = FP ok a ILL = A tE=S'b: en Do ourrur ap WITH PROTECTION CIRCUIT. | t— ____ TIMING CHART (TC40H192) ee . ee ee input ] © Hl > ot count uP TO LE RHAAKAAAHI vor em Bass oo — | | eat RH TTT eH mee PPT {| | See ee CARRE Pe BoRRoW TOosHiBA A 1510
TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA TC40H192P/F TC40H193P/F LOGIC DIAGRAM (TC40H193) Do a2) => Do OxRRY ott E> — ttt (5) 0 a De output @a ees iiim«»6«s eT) ee pata rupur clo "es vara tarot p&p ope an Ct sto. & Do. ourrur ap —e P ‘. ° TIMING CHART (TC40H193) LF ttt tt vow TU “sit ; Lit, DATA B +lT] DON'T CARE UNTIL LOAD cogs “L' a count uP Se TT LL AHHAHHAHhI vor eae TT pene 3 sco tt FA 4 “SR TARRY {eH BORROW 7 ts TOSHIBA
TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA RECOMMENDED OPERATING CONDITIONS (Vss=0v) CHARACTERISTIC TEST CONDITION | MIN. | TYP. | MAX. | UNIT Sappiy Toitege [wf -~ 2] -~«]v] Taput Voltage [vw [Oo Tv ELECTRICAL CHARACTERISTICS (Vss=0v) [arc [asec [asec] CHARACTERISTIC [sacdsr CONDITION unt] High Level Hour! <1ua v our’ 4.95) 4.95 4.95 Output Voltage | “OH | vin=Ves,Vpp Low Level y, Hour! <1ua d Output Voltage} OL | vix=Vss,Vpp High Level Vou=4.6V Low Level VoL=0.4v output Current | TOL | viy=Vss.Vpp 14 ia = parle [fea] eet =P > [ap =] Voltagd"L™ Vour=0. 5V v voortsy [5] - rol - | - | rol - [io] Knput [foyer | tr [Viye8-ov fe [= [os] = [ao] oa] = Prot curren varoov fe | - [0.3] - [-10-3[-o.3] = [10] Quiescent SEE Eaae| we [mete [>] fs] = pools] | o[ * All valid input combinations. SWITCHING CHARACTERISTICS (Ta=25°C, Vggs0.0V, Vpp=5-0V, Cr=15pF) CHARACTERISTIC svemou [test cowprtron [urw. [vp] wax. [unr7] [Dither ive Te tor] L- [ata] [output Fart time | toe | = | 16 [30] | coua | [ = | eo | 135] Propagation Delay Time CLocK -Q [respi aay tne Efe Fae ae) “| cock - amy BorKOW | = | 45 | 83] TOAD - CARRY BoRKOW | - | 90 | 150 Propagation Delay Time [fpuitpau| Loap—@ |= 75 [335] Cutar ~Carry poRRoW | - | 90 | 150 | Data Hold Time ‘WORD bata | - | of 10] ns] Data Setup Time Toad - DATA | = [| 8[ 20] as] win, Clear “owoval Tine CLEAR ~ cock a as] 0 ne Min. Load Removal Time [ trem | tom = coc T= 53 [a0] ns | TOosHiBA $152. $a
TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA SWITCHING CHARACTERISTICS [-cuaracrerrstrc —|sywmo | __ test conprrion | wan, | ryp.| max.[usrr] RT [nin cleat wach of Pulse [typ eure Ss oo] Rise Time tre Max. Clock Pall Time t 1.0 50 [ies lack reguency [twat [ispat apacitanee [ty [se] SWITCHING TIME TEST CIRCUIT WAVEFORM TEST CIRCUIT 9¥ pp _ [ie [ovens] eae | ew || Yop —— ee MH | = a beech pee] Fsin si set Hh : ot: , Derteele ba td [me | H “ camLL Ls | i He see 738 cy lopP WAVEFORM 1 WAVEFORM 2 ‘COUNT UP vi) Yop K / Nee @e Vou \\ pata Yoo ‘CARRY You You on DROW vou bw som So vou ad WAVEFORM 3 cunar To - oR BORROW vo, ‘ Vso vaveront 4 mr Vou TEST Nols You tea Y | wore Yop Som You = a Gi Vou $8 on BORROW Vou B Sos [Seal —$. 153 TOSHIBA
TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA SWITCHING TIME TEST CIRCUIT & WAVEFORM Minimum Clear Removal Time Test Circuit —— TS ooey cua os we ae OTN --- - oxo Yes tr=lone qioad a 7 Minimum Load Removal Time Test Circuit gy Vpp=sv eon? Yop tet. * on 7
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TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA TC40H192P/F TC40H193P/F tod - Yop tpd - CL Coo got} {tt eae @COeooe eee ce ae eer Ee a bees | a Zguo 4 En ° Cee oer
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ee i — eee 3 0 a 2 PCOPrEEFErS |! “ae Tpp - fIN tpd - Ypp . GS fe. Mtoe i; Ca con) 88 fp Eee SS ®* TTPELTLTTLT TTT jou us m= oO 2 ‘ 6 8 tin (He) Ypp__(¥) Tot - You Tor - (Vpp ~ Vou) | a] Leet Yop = You (*) . si 7 Tenzst VA gS Ve en [set HEH: 5, roa 4a [ | J [roorev | TAT |e 5 s BSF ooay | terra See Zen Be ee ee Low LEVEL OUTPUT VOLTAGE COLL é ‘on CHOP TTT rr? *