AT27C080 ATMEL | Alldatasheet

Document overview

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Technical content

Features

  • Fast Read Access Time - 90 ns
  • Low Power CMOS Operation - 100 µA max. Standby - 40 mA max. Active at 5 MHz
  • JEDEC Standard Packages - 32 Lead PLCC - 32-Lead 600-mil PDIP and Cerdip - 32-Lead 450-mil SOIC (SOP) - 32-Lead TSOP
  • 5V ± 10% Supply
  • High-Reliability CMOS Technology - 2,000V ESD Protection - 200 mA Latchup Immunity
  • Rapid™ Programming Algorithm - 50 µs/byte (typical)
  • CMOS and TTL Compatible Inputs and Outputs
  • Integrated Product Identification Code
  • Industrial and Commercial Temperature Ranges

Description

The AT27C080 chip is a low-power, high-performance 8,388,608-bit ultraviolet eras- able programmable read only memory (EPROM) organized as 1M by 8 bits. The AT27C080 requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 90 ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems. Atmel’s scaled CMOS technology provides low active power consumption and fast programming. Power consumption is typically 10 mA in active mode and less than 10 µA in standby mode. (continued) Pin Configurations Pin Name Function A0 - A19 Addresses O0 - O7 Outputs CE Chip Enable OE Output Enable PLCC Top View A14 A13 A11 OE/VPP A10 CE GND A12 A15 A16 A19 VCC A18 A17 CDIP , PDIP , SOIC Top View A19 A16 A15 A12 GND VCC A18 A17 A14 A13 A11 OE/VPP A10 CE TSOP Top View Type 1 A11 A13 A14 A17 A18 VCC A19 A16 A15 A12 OE/VPP A10 CE GND A3A4

The AT27C080 is available in a choice of packages, includ- ing; one-time programmable (OTP) plastic PLCC, PDIP, SOIC (SOP), and TSOP, as well as windowed ceramic Cerdip. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention. With high density 1M byte storage capability, the AT27C080 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s 27C080 has additional features to ensure high quality and efficient production use. The Rapid ™ Program- ming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. Erasure Characteristics The entire memory array of the AT27C080 is erased (all outputs read as V OH ) after exposure to ultraviolet light at a wavelength of 2,537Å. Complete erasure is assured after a minimum of 20 minutes of exposure using 12,000 µW/cm 2 intensity lamps spaced one inch away from the chip. Mini- mum erase time for lamps at other intensity ratings can be calculated from the minimum integrated erasure dose of 15 W .sec/cm 2. To prevent unintentional erasure, an opaque label is recommended to cover the clear window on any UV erasable EPROM that will be subjected to continuous flourescent indoor lighting or sunlight. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these tran- sients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be uti- lized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.

Absolute Maximum Ratings* Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to abso- lute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is V CC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns. Voltage on Any Pin with Voltage on A9 with (1) VPP Supply Voltage with Operating Modes Notes: 1. X can be VIL or VIH. 2. Refer to Programming Characteristics. 4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte. Mode/Pin CE OE /VPP Ai Outputs Read V IL VIL Ai D OUT Output Disable X V IH X(1) High Z Standby V IH XX H i g h Z Rapid Program(2) VIL VPP Ai D IN PGM Verify V IL VIL Ai D OUT PGM Inhibit V IH VPP XH i g h Z Product Identification(4) VIL VIL A9 = VH (3) A0 = VIH or VIL A1 - A19 = VIL Identification Code Block Diagram

DC and AC Operating Conditions for Read Operation AT27C080 -90 -10 -12 -15 Operating Temperature (Case) VCC Power Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% DC and Operating Characteristics for Read Operation Note: 1. V CC must be applied simultaneously or before OE/ VPP , and removed simultaneously or after OE/VPP . Symbol Parameter Condition Min Max Units ILI Input Load Current V IN = 0V to VCC (Com., Ind.) ±1.0 µA ILO Output Leakage Current V OUT = 0V to VCC (Com., Ind.) ±5.0 µA ISB VCC (1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1.0 mA ICC VCC Active Current f = 5 MHz, I OUT = 0 mA, CE = VIL 40 mA VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 V CC + 0.5 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA2 . 4 V AC Characteristics for Read Operation Note: 2, 3, 4, 5. See AC Waveforms for Read Operation. Symbol Parameter Condition AT27C080 Units -90 -10 -12 -15 Min Max Min Max Min Max Min Max tACC (4) Address to Output Delay CE =O E/VPP = VIL 90 100 120 150 ns tCE (3) CE to Output Delay OE = VIL 90 100 120 150 ns tOE (3)(4) OE to Output Delay CE = VIL 20 20 30 35 ns tDF (2)(5) OE or CE High to Output Float, whichever occurred first 30 30 35 40 ns tOH Output Hold from Address, CE or OE /VPP,whichever occurred first 0 000n s

AC Waveforms for Read Operation(1) 2. tDF is specified form OE/VPP or CE, whichever occurs first. Output float is defined as the point when data is no longer driven. 3. OE /VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 4. OE /VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC . 5. This parameter is only sampled and is not 100% tested. Input Test Waveform and Measurement Levels tR , tF < 20 ns (10% to 90%) Output Test Load Note: 1. CL = 100 pF including jig capacitance. Pin Capacitance f = 1 MHz, T = 25°C (1) Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Typ Max Units Conditions C IN 48 p F V IN = 0V C OUT 81 2 p F V OUT = 0V

Notes: 1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. DC Programming Characteristics Symbol Parameter Test Conditions Limits UnitsMin Max ILI Input Load Current V IN = VIL, VIH ±10 µA VIL Input Low Level -0.6 0.8 V VIH Input High Level 2.0 V CC + 1.0 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA2 . 4 V ICC2 VCC Supply Current (Program and Verify) 40 mA IPP2 OE /VPP Supply Current CE = VIL 25 mA VID A9 Product Identification Voltage 11.5 12.5 V

AC Programming Characteristics Notes: 1. VCC must be applied simultaneously or before OE /VPP and removed simultaneously or after OE /VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven— see timing diagram. 3. Program Pulse width tolerance is 50 µs ± 5%. Symbol Parameter Test Conditions (1) Limits UnitsMin Max tAS Address Setup Time Input Rise and Fall Times: Input Pulse Levels: 0.45V to 2.4V Input Timing Reference Level: 0.8V to 2.0V Output Timing Reference Level: 0.8V to 2.0V 2.0 µs tOES OE /VPP Setup Time 2.0 µs tOEH OE /VPP Hold Time 2.0 µs tDS Data SetupTime 2.0 µs tAH Address Hold Time 0.0 µs tDH Data Hold Time 2.0 µs tDFP CE High to Output Float Delay(2) 0.0 130 ns tVCS VCC Setup Time 2.0 µs tPW CE Program Pulse Width(3) 47.5 52.5 µs tDV Data Valid from CE 1.0 µs tVR OE /VPP Recovery Time 2.0 ns tPRT OE /VPP Pulse Rise Time During Programming 50 ns Atmel’s 27C080 Integrated Product Identification Code Pins Codes A0 O7 O6 O5 O4 O3 O2 O1 O0 Hex Data Manufacturer 000011110 1 E D e v i c e T y p e 110001010 8 A

Rapid Programming Algorithm A 50 µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and OE/VPP is raised to 13.0V. Each address is first programmed with one µs CE pulse without verification. Then a verification reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 50 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. OE /VPP is then lowered to VIL and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails.

Ordering Information

(ns) ICC (mA) Ordering Code Package Operation RangeActive Standby 90 40 0.1 AT27C080-90DC AT27C080-90JC AT27C080-90PC AT27C080-90RC A T27C080-90TC 32DW6 32J 32P6 32R 32T Commercial (0°C to 70°C) 40 0.1 AT27C080-90DI AT27C080-90JI AT27C080-90PI A T27C080-90RI AT27C080-90TI 32DW6 32J 32P6 32R 32T Industrial (-40°C to 85°C) 100 40 0.1 AT27C080-10DC AT27C080-10JC AT27C080-10PC AT27C080-10RC A T27C080-10TC 32DW6 32J 32P6 32R 32T Commercial (0°C to 70°C) 40 0.1 AT27C080-10DI AT27C080-10JI AT27C080-10PI A T27C080-10RI AT27C080-10TI 32DW6 32J 32P6 32R 32T Industrial (-40°C to 85°C) (continued) Package Type 32DW6 32-Lead, 0.600" Windowed, Ceramic Dual Inline Package (Cerdip) 32J 32-Lead,Plastic J-Leaded Chip Carrier (PLCC) 32P6 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 32R 32-Lead, 0.450" Wide, Plastic Gull Wing Small Outline (SOIC) 32T 32-Lead, Plastic Thin Small Outline Package (TSOP)

120 40 0.1 AT27C080-12DC AT27C080-12JC AT27C080-12PC AT27C080-12RC AT27C080-12TC 32DW6 32J 32P6 32R 32T Commercial (0°C to 70°C) 40 0.1 AT27C080-12DI AT27C080-12JI AT27C080-12PI A T27C080-12RI AT27C080-12TI 32DW6 32J 32P6 32R 32T Industrial (-40°C to 85°C) 150 40 0.1 AT27C080-15DC AT27C080-15JC AT27C080-15PC AT27C080-15RC AT27C080-15TC 32DW6 32J 32P6 32R 32T Commercial (0°C to 70°C) 40 0.1 AT27C080-15DI AT27C080-15JI AT27C080-15PI A T27C080-15RI AT27C080-15TI 32DW6 32J 32P6 32R 32T Industrial (-40°C to 85°C) t ACC (ns) ICC (mA) Ordering Code Package Operation RangeActive Standby Package Type 32DW6 32-Lead, 0.600" Windowed, Ceramic Dual Inline Package (Cerdip) 32J 32-Lead,Plastic J-Leaded Chip Carrier (PLCC) 32P6 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 32R 32-Lead, 0.450" Wide, Plastic Gull Wing Small Outline (SOIC) 32T 32-Lead, Plastic Thin Small Outline Package (TSOP) Ordering Information (Continued)