AT27C010 ATMEL | Alldatasheet

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Technical content

Features

  • Fast Read Access Time - 45 ns
  • Low Power CMOS Operation 100 µA max. Standby 25 mA max. Active at 5 MHz (AT27C010L) 35 mA max. Active at 5 MHz (AT27C010)
  • JEDEC Standard Packages 32-Lead 600-mil PDIP 32-Lead PLCC 32-Lead TSOP
  • 5V ± 10% Supply
  • High Reliability CMOS Technology 2000V ESD Protection 200 mA Latchup Immunity
  • Rapid Programming Algorithm - 100 µs/byte (typical)
  • CMOS and TTL Compatible Inputs and Outputs
  • Integrated Product Identification Code
  • Commercial and Industrial Temperature Ranges TSOP Top View Type 1 0321I AT27C010/L 3-153

The AT27C010/L in available in a choice of industry stand- ard JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. All devices fea- ture two line control ( CE, OE) to give designers the flexibil- ity to prevent bus contention. With 128K byte storage capability, the AT27C010/L allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s 27C010/L have additional features to ensure high quality and efficient production use. The Rapid  Program- ming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper program- ming algorithms and voltages. Description (Continued) Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excur- sions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in de- vice non-conformance. At a minimum, a 0.1 µF high fre- quency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V CC and Ground terminals. This capacitor should be posi- tioned as close as possible to the point where the power supply is connected to the array. 3-154 AT27C010/L

(1) VPP Supply Voltage with *NOTICE: Stresses beyond those listed under “Absolute Maxi- mum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indi- cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum out- put pin voltage is V CC + 0.75V dc which may over- shoot to +7.0V for pulses of less than 20 ns. Absolute Maximum Ratings* Operating Modes Mode \\ Pin CE OE PGM Ai V PP Outputs Read V IL VIL X (1) Ai X D OUT Output Disable X V IH X X X High Z Standby V IH X X X X High Z Rapid Program (2) VIL VIH VIL Ai V PP D IN PGM Verify V IL VIL VIH Ai V PP D OUT PGM Inhibit V IH XX X V PP High Z Product Identification (4) VIL VIL X A9 = VH (3) A0 = VIH or VIL A1 - A16 = VIL X Identification Code Notes: 1. X can be VIL or VIH. 2. Refer to Programming characteristics. 4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identi- fication byte and high (VIH) to select the Device Code byte. AT27C010/L 3-155

AC Characteristics for Read Operation AT27C010 / AT27C010L Symbol Parameter Condition Min Max Min Max Min Max Min Max Min Max Min Max Units tACC (3) Address to Output Delay CE = OE = VIL 45 55 70 90 120 150 ns tCE (2) CE to Output DelayOE = VIL 45 55 70 90 120 150 ns tOE (2, 3)OE to Output DelayCE = VIL 20 25 30 35 35 40 ns tDF (4, 5)OE or CE High to Output Float, whichever occurred first20 20 25 25 30 35 ns tOH Output Hold from Address, CE or OE, whichever occurred first 777000 n s Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation. DC and AC Operating Conditions for Read Operation AT27C010 / AT27C010L Operating Temp. (Case) VCC Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% DC and Operating Characteristics for Read Operation Symbol Parameter Condition Min Max Units ILI Input Load Current V IN = 0V to VCC ±1 µA ILO Output Leakage Current V OUT = 0V to VCC ±5 µA IPP1 (2) VPP (1) Read/Standby Current VPP = VCC 10 µA ISB VCC (1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1m A ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL AT27C010L 25 mA AT27C010 35 mA VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 V CC + 0.5 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA 2.4 V Notes: 1. VCC must be applied simultaneously or before VPP , and removed simultaneously or after VPP . 2. VPP may be connected directly to VCC , except during program- ming. The supply current would then be the sum of ICC and IPP . 3-156 AT27C010/L

Pin Capacitance (f = 1 MHz, T = 25°C) (1) Typ Max Units Conditions C IN 48 p F V IN = 0V C OUT 81 2 p F V OUT = 0V Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. AC Waveforms for Read Operation (1) Notes: 1. Timing measurement reference level is 1.5V for -45 and -55 devices. Input AC drive levels are VIL = 0.0V and VIH = 3.0V. Timing measurement refer- ence levels for all other speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL = 0.45V and VIH = 2.4V. 2.OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE . 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC . 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels tR , tF < 5 ns (10% to 90%) For -45 and -55 devices only: and -20 devices: Output Test Load Note: CL = 100 pF including jig capacitance, except for the -45 and -55 devices, where CL= 30 pF. tR , tF < 20 ns (10% to 90%) AT27C010/L 3-157

(1) Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C010/L, a 0.1 µF capacitor is required across VPP and ground to suppress spurious volt- age transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Symbol Parameter Test Conditions Limits UnitsMin Max ILI Input Load Current V IN = VIL, VIH ±10 µA VIL Input Low Level -0.6 0.8 V VIH Input High Level 2.0 V CC + 1 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA2 . 4 V ICC2 VCC Supply Current (Program and Verify) 40 mA IPP2 VPP Supply Current CE = PGM = V IL 20 mA VID A9 Product Identification Voltage 11.5 12.5 V 3-158 AT27C010/L

AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25 V, VPP = 13.0 ± 0.25V Sym- bol Parameter Test Conditions* (1) Limits UnitsMin Max tAS Address Setup Time 2 µs tCES CE Setup Time 2 µs tOES OE Setup Time 2 µs tDS Data Setup Time 2 µs tAH Address Hold Time 0 µs tDH Data Hold Time 2 µs tDFP OE High to Output Float Delay (2) 01 3 0 n s tVPS VPP Setup Time 2 µs tVCS VCC Setup Time 2 µs tPW PGM Program Pulse Width (3) 95 105 µs tOE Data Valid from OE 150 ns tPRT VPP Pulse Rise TIme During Programming 50 ns *AC Conditions of Test: Notes: 1. V CC must be applied simultaneously or before VPP and removed simultaneously or after VPP . 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven — see timing diagram. 3. Program Pulse width tolerance is 100 µsec ± 5%. Atmel’s 27C010/L Integrated Product Identification Code Codes Pins Hex DataA0 O7 O6 O5 O4 O3 O2 O1 O0 M a n u f a c t u r e r000011110 1 E D e v i c e T y p e 100000101 0 5 Rapid Programming Algorithm A 100 µs PGM pulse width is used to program. The ad- dress is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs PGM pulse without verification. Then a verification / reprogramming loop is executed for each ad- dress. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verifica- tion after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is se- lected until all have been checked. V PP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and com- pared with the original data to determine if the device passes or fails. AT27C010/L 3-159

(ns) ICC (mA) Ordering Code Package Operation Range Active Standby 45 35 0.1 AT27C010-45JC 32J Commercial AT27C010-45PC 32P6 (0 °C to 70°C) AT27C010-45TC 32T 35 0.1 AT27C010-45JI 32J Industrial AT27C010-45PI 32P6 (-40 °C to 85°C) AT27C010-45TI 32T 55 35 0.1 AT27C010-55JC 32J Commercial AT27C010-55PC 32P6 (0 °C to 70°C) AT27C010-55TC 32T 35 0.1 AT27C010-55JI 32J Industrial AT27C010-55PI 32P6 (-40 °C to 85°C) AT27C010-55TI 32T 70 35 0.1 AT27C010-70JC 32J Commercial AT27C010-70PC 32P6 (0 °C to 70°C) AT27C010-70TC 32T 35 0.1 AT27C010-70JI 32J Industrial AT27C010-70PI 32P6 (-40 °C to 85°C) AT27C010-70TI 32T 90 35 0.1 AT27C010-90JC 32J Commercial AT27C010-90PC 32P6 (0 °C to 70°C) AT27C010-90TC 32T 35 0.1 AT27C010-90JI 32J Industrial AT27C010-90PI 32P6 (-40 °C to 85°C) AT27C010-90TI 32T 120 35 0.1 AT27C010-12JC 32J Commercial AT27C010-12PC 32P6 (0 °C to 70°C) AT27C010-12TC 32T 35 0.1 AT27C010-12JI 32J Industrial AT27C010-12PI 32P6 (-40 °C to 85°C) AT27C010-12TI 32T 150 35 0.1 AT27C010-15JC 32J Commercial AT27C010-15PC 32P6 (0 °C to 70°C) AT27C010-15TC 32T 35 0.1 AT27C010-15JI 32J Industrial AT27C010-15PI 32P6 (-40 °C to 85°C) AT27C010-15TI 32T

Ordering Information

(ns) ICC (mA) Ordering Code Package Operation Range Active Standby 45 25 0.1 AT27C010L-45JC 32J Commercial AT27C010L-45PC 32P6 (0 °C to 70°C) AT27C010L-45TC 32T 25 0.1 AT27C010L-45JI 32J Industrial AT27C010L-45PI 32P6 (-40 °C to 85°C) AT27C010L-45TI 32T 55 25 0.1 AT27C010L-55JC 32J Commercial AT27C010L-55PC 32P6 (0 °C to 70°C) AT27C010L-55TC 32T 25 0.1 AT27C010L-55JI 32J Industrial AT27C010L-55PI 32P6 (-40 °C to 85°C) AT27C010L-55TI 32T 70 25 0.1 AT27C010L-70JC 32J Commercial AT27C010L-70PC 32P6 (0 °C to 70°C) AT27C010L-70TC 32T 25 0.1 AT27C010L-70JI 32J Industrial AT27C010L-70PI 32P6 (-40 °C to 85°C) AT27C010L-70TI 32T 90 25 0.1 AT27C010L-90JC 32J Commercial AT27C010L-90PC 32P6 (0 °C to 70°C) AT27C010L-90TC 32T 25 0.1 AT27C010L-90JI 32J Industrial AT27C010L-90PI 32P6 (-40 °C to 85°C) AT27C010L-90TI 32T 120 25 0.1 AT27C010L-12JC 32J Commercia AT27C010L-12PC 32P6 (0 °C to 70°C) AT27C010L-12TC 32T 25 0.1 AT27C010L-12JI 32J Industrial AT27C010L-12PI 32P6 (-40 °C to 85°C) AT27C010L-12TI 32T 150 25 0.1 AT27C010L-15JC 32J Commercial AT27C010L-15PC 32P6 (0 °C to 70°C) AT27C010L-15TC 32T 25 0.1 AT27C010L-15JI 32J Industrial AT27C010L-15PI 32P6 (-40 °C to 85°C) AT27C010L-15TI 32T 32J 32 Lead, Plastic J-Leaded Chip Carrier (PLCC) 32P6 32 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 32T 32 Lead, Plastic Thin Small Outline Package (TSOP) AT27C010/L 3-161