N-channel 200V - 0.6 - 5A DPAK MESH OVERLAY™ MOSFET

Document overview

  • Manufacturer or author: STMICROELECTRONICS
  • PDF pages: 8

Technical content

N-CHANNEL 200V - 0.6Ω - 5A DPAK MESH OVERLAY™ MOSFET ■ TYPICAL R DS (on) = 0.6 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ ADD SUFFIX “T4” FOR OREDERING IN TAPE & REEL

DESCRIPTION

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstanding performance. The new patented STrip layout cou- pled with the Company’s proprietary edge termina- tion structure, makes it suitable in coverters for lighting applications.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STD5N20 200 V < 0.8 Ω 5 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 200 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 200 V VGS Gate- source Voltage ±20 V ID Drain Current (continuous) at TC = 25°C 5A ID Drain Current (continuous) at TC = 100°C 3.5 A IDM (/c108 ) Drain Current (pulsed) 20 A PTOT Total Dissipation at TC = 25°C 45 W Derating Factor 0.36 W/°C dv/dt (1) Peak Diode Recovery voltage slope 5 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1)ISD ≤5A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX. (**) Limited only by Maximum Temperature Allowed INTERNAL SCHEMATIC DIAGRAM TO-252 DPAK Obsolete Product(s) - Obsolete Product(s)

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Rthj-case Thermal Resistance Junction-case Max 2.77 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Rthc-sink Thermal Resistance Case-sink Typ 1.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 275 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 5A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 130 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 200 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 50 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±20V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.5 A 0.7 0.8 Ω ID(on) On State Drain Current V DS > ID(on) x RDS(on)max, VGS =1 0 V 5A Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID = 2.5A 1.5 4 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 350 pF C oss Output Capacitance 70 pF C rss Reverse Transfer Capacitance 35 pF Obsolete Product(s) - Obsolete Product(s)

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 100 V, ID = 3 A R G = 4.7Ω VGS = 10 V (see test circuit, Figure 3) 18 ns tr Rise Time 30 ns Q g Total Gate Charge VDD = 160V, ID = 6 A, VGS = 10V 19 27 nC Q gs Gate-Source Charge 4.5 nC Q gd Gate-Drain Charge 7.5 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 160V, ID = 6 A, R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 5) 40 ns tf Fall Time 10 ns tc Cross-over Time 65 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 6 A ISDM (2) Source-drain Current (pulsed) 24 A VSD (1) Forward On Voltage ISD = 6 A, VGS = 0 1.5 V trr Reverse Recovery Time ISD =6 A, di/dt = 100A/µs VDD = 100V, Tj = 150°C (see test circuit, Figure 5) 155 ns Q rr Reverse Recovery Charge 700 nC IRRM Reverse Recovery Current 9 A Thermal ImpedanceSafe Operating Area Obsolete Product(s) - Obsolete Product(s)

Gate Charge vs Gate-source Voltage Tranconductance Output Characteristics Capacitance Variations Tranfer Characteristics Static Drain-Source On Resistance Obsolete Product(s) - Obsolete Product(s)

Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp. Source-drain Diode Forward Characteristics Obsolete Product(s) - Obsolete Product(s)

Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load Obsolete Product(s) - Obsolete Product(s)

DIM. mm inch A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0 o 8o 0o 0o P032P_B TO-252 (DPAK) MECHANICAL DATA Obsolete Product(s) - Obsolete Product(s)

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