SAA5191 PHILIPS

Document overview

  • Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 9

Technical content

Preliminary specification File under Integrated Circuits, IC02 March 1991 INTEGRATED CIRCUITS SAA5191 Teletext video processor

Philips Semiconductors Preliminary specification Teletext video processor SAA5191

FEATURES

  • Adaptive data slicer
  • Crystal-controlled data clock regeneration with a bit rate of 6.9375 MHz
  • Adaptive sync separator, horizontal phase detector and

13.5 MHz VCO to provide display phase locked loop

(PLL)

  • TV synchronization at teletext mode GENERAL DESCRIPTION The SAA5191 is a bipolar integrated circuit that extracts teletext data from the video signal (CVBS), regenerates the teletext clock (TTC) and synchronizes the text display to the television signals (VCS). This device operates in conjunction with the Digital Video Teletext (back-end) Decoder (DVTB - SAA9042A) or any other compatible device. QUICK REFERENCE DATA ORDERING AND PACKAGE INFORMATION Note 1. SOT117-1;1996 November 14 SYMBOL PARAMETER MIN. TYP. MAX. UNIT V P supply voltage (pin 16) − 12 − V IP supply current − 70 − mA Vi CVBS CVBS input signal on pin 27 (peak-to-peak value) at pin 2 LOW − 1 − V at pin 2 open-circuit − 2.5 − V Vo outputs signals TTC and TTD (peak-to-peak value, pins 14, 15) 2.5 3.5 4.5 V VF13 13.5 MHz clock output signal (peak-to-peak value pin 17) 12 3 V VSYNC video sync output signal (peak-to-peak value, pin 1)−− 1V SYNC output signalTCS 200 450 650 mV VCS video composite sync level on output pin 25 LOW −− 0.4 V HIGH 2.4 − 5.5 V Tamb operating ambient temperature 0 −+ 70 °C EXTENDED TYPE NUMBER PACKAGE PINS PIN POSITION MATERIAL CODE SAA5191 28 DIL plastic SOT117 (1)

Philips Semiconductors Preliminary specification Teletext video processor SAA5191 handbook, full pagewidth MEH149 SENSE "NO INPUT" VCS 25 24 23 22 10 21 20 18 16 1311978651432 PL CBB VP VP ADAPTIVE SYNC SEPARATOR DUAL POLARITY BUFFER ADAPTIVE DATA SLICER HORIZONTAL PHASE DETECTOR PULSE GENERATOR SENSE EXTERNAL DATA OSCILLATOR DIVIDER BY 2 PHASE SHIFTER LATCHES VCO SAA5191 F13 (13.5 MHz clock) (data) TTD (clock) TTC GND XTAL

13.875 MHzdata

"NO LOAD" HF LOSS COMPENSATOR set sync polarity set video input level composite video input GAIN SWITCH TCS +12 V VP VP sync output Fig.1 Block diagram.

Philips Semiconductors Preliminary specification Teletext video processor SAA5191 PINNING Notes 1. Sliced teletext data from external: active HIGH level (current), low impedance input. 2. While the loop is locking up. SYMBOL PIN DESCRIPTION STTV 1 sync output signal to TV (positive or negative going) VILS 2 level select input of video input (LOW equals 1 V) C filt 3 video filtering capacitor of HF loss compensation C store 4 HF storage capacitor C ampl 5 amplitude capacitor C zero 6 zero level capacitor EXD 7 external data current input (note 1) C time 8 data timing capacitor for the adaptive data slicer C CLK 9 clock phase detector capacitor CBB 10 blanking insertion input XTAL 11 13.875 MHz crystal (double of data rate) CLF 12 6.9375 MHz clock frequency filter GND 13 ground (0 V) TTC 14 teletext clock output (for computer controlled teletext) TTD 15 teletext data output (for computer controlled teletext) V P 16 +12 V supply voltage F13 17 13.5 MHz VCO output (for sandcastle generation) OSCO 18 oscillator output to series LC-circuit or crystal C VCR 19 short time constant capacitor at video recorder mode (note 2) OSCI 20 oscillator input from series LC-circuit or crystal C hor 21 horizontal phase capacitor / VCR mode PL 22 sandcastle input (generated in CCT) R T 23 timing resistor for pulse generator C T 24 timing capacitor for pulse generator VCS 25 video composite sync output to CCT C BL 26 black level capacitor CVBS 27 composite video input signal from TV TCS 28 text-composite/scan-composite sync input ( TSC/SCS) PIN CONFIGURATION Fig.2 Pin configuration. fpage STTV VILS C filt C store C ampl C zero EXD C time C CLK CCB XTAL CLF GND TTC TCS CVBS C BL VCS R T PL C T C hor OSCI C VCR OSCO F13 VP TTD 1514 SAA5191 MEH150

Philips Semiconductors Preliminary specification Teletext video processor SAA5191 LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). CHARACTERISTICS VP = 12 V; Tamb =2 5°C and measurements taken in Fig.3, unless otherwise specified. SYMBOL PARAMETER MIN. MAX. UNIT VP supply voltage (pin 16) 0 13.2 V V5 voltage on pin 5 0 5.5 V Tstg storage temperature range −20 125 °C Tamb operating ambient temperature range 0 +70 °C SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP supply voltage range (pin 16) 10.8 12.0 13.2 V IP supply current 50 70 105 mA Video input, sync separator and data slicer ZS ≤ 250 Ω Vi CVBS input signal sync to white (peak-to-peak value, pin 27) V2 = LOW 0.7 1 1.4 V V2 = HIGH 1.75 2.5 3.5 V sync amplitude (peak-to-peak value) 0.1 − 1V data slicing level V 2 = LOW 0.3 0.46 0.7 V V2 = HIGH 0.75 1.15 1.75 V V2 input voltage LOW (pin 2) 0 − 0.8 V input voltage HIGH open-circuit equals HIGH 2.0 − 5.5 V I2 input current LOW 0 −− 150 µA input current HIGH V 2 < 5.5 V 0 − 1m A Teletext data output (TTD) V22 phase lock pulse (PL) input voltage (peak-to-peak value, pin 22) phase locked 0 − 3V phase unlocked 3.9 − 5.5 V Vo TTD data output signal on pin 15 (peak-to-peak value) 2.5 3.5 4.5 V V15 DC output voltage mean level 3 4 5 V C L load capacitance on pin 15 −− 40 pF t r, t f rise and fall time 20 30 45 ns Teletext clock output (TTC) Vo TTC clock output signal on pin 14 (peak-to-peak value) 2.5 3.5 4.5 V V14 DC output voltage mean level 3 4 5 V C L load capacitance on pin 14 −− 40 pF t r, t f rise and fall time 20 30 45 ns t d delay time of falling edge relative to other edges of TTD −− ± 20 ns

Philips Semiconductors Preliminary specification Teletext video processor SAA5191 Text/ scan composite sync input (TCS/SCS) V28 input voltage LOW forTCS (pin 28) 0 − 0.8 V input voltage HIGH forTCS 2.0 − 7.0 V input voltage LOW forSCS 0 − 1.5 V input voltage HIGH forSCS 3.5 − 7.0 V I28 input current V 28 = 0 to 7 V −40 −70 −100 µA V28 = 10 to VP −− ± 5 µA SYNC output buffer Vo CVBS sync output signal on pin 1 (peak-to-peak value) R L 1 = 1.2 kΩ to VP −− 1V TCS output signal R L 1 = 1.2 kΩ to GND 200 450 650 mV V1 DC output voltage at positive sync signal RL 1 = 1.2 kΩ to GND 1.0 1.4 2.0 V DC output voltage at negative sync signal RL 1 = 1.2 kΩ to VP 9.0 10.1 11.0 V I1 output current −− ± 3m A Video composite sync output (VCS) V25 output voltage LOW (pin 25) 0 − 0.4 V output voltage HIGH 2.4 − 5.5 V I25 output current LOW 0 − 0.5 mA output current HIGH 0 −− 1.5 mA td sync separator delay time 250 350 400 ns Horizontal phase detector and 13.5 MHz VCO V10 input voltage LOW (CBB), pin 10 blanking inserted 0 − 0.5 V blanking insertion HIGH no blanking 1.0 − 5.5 V I10 input current −− − 5 µA Vo 13.5 MHz clock output signal (peak-to-peak value, pin 17) 12 3 V V17 DC output voltage maximum swing 4 − 8.5 V C L load capacitance on pin 17 −− 40 pF t r, t f rise and fall time 10 − 30 ns SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Philips Semiconductors Preliminary specification Teletext video processor SAA5191 handbook, full pagewidth MEH156 video input level select 27 26 25 24 23 22 21 20 19 18 17 16 15 12345678 SAA5191 9 1 01 11 21 31 4 1 nF 10 nF TTD F13 VCS PL TCS (2) additional drawing for crystal application XTAL 19 18 nF nF pF 13.5 MHz 1.2 kΩ 1.2 kΩ pF nF 470 pF nF 270 pF 100 pF pF XTAL (3) 13.875 MHz TTC CBB sync CVBS +12 V data input 2.2 µF 470 Ω kΩ µH68 nF 220 pF 6.8 pF (1) (2) 82 Ω 15 µF 47 µF 22 nF VP = 12 V47 nF 47 nF 47 nF 3.3 kΩ µH (4) pF SAA5191 Fig.3 Test circuit and application circuit using LC-circuit or a crystal for VCO (clock F13). as shown in additional drawing (2) Crystal: f = 13.5 MHz (e.g. Philips catalogue number 4322 143 04101); adjustment tolerance±40 × 10−6; load capacitance CL = 22 pF; resonance resistance Rr = 22 pF; typical motional capacitance C1 = 23 fF; static parallel capacitance C0 = 5.5 pF; frequency tolerance±30 × 10−6 in temperature range T =−20 to+70°. Adjust free-running frequency to 13.5± 0.5 MHz. (3) Crystal: f = 13.875 MHz; adjustment tolerance±40 × 10−6; load capacitance CL = 15 pF; typical resonance resistance Rr = 15Ω (maximum 60 Ω ); typical motional capacitance C1 = 19 fF; static parallel capacitance Co = 5 pF; frequency tolerance±30 × 10−6 in temperature range T =−20 to+70°. (4) Coil: Fixed inductance 15µH ±20%, quality factor Q> 20.

Philips Semiconductors Preliminary specification Teletext video processor SAA5191 PACKAGE OUTLINE UNIT A max. 1 2 b1 (1)(1) (1)cD E w eM HL REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm inches DIMENSIONS (inch dimensions are derived from the original mm dimensions) SOT117-1 92-11-17 95-01-14 A min. A max. b Z max.M Ee1 1.7 1.3 0.53 0.38 0.32 0.23 36.0 35.0 14.1 13.7 3.9 15.24 17.15 0.066 0.051 0.020 0.014 0.013 0.009 1.41 1.34 0.56 0.54 0.15 0.60 0.68 051G05 MO-015AH M H c (e )1 M E A L seating plane w M e D A 2 Z b E pin 1 index 0 5 10 mm scale Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. handbook, full pagewidthDIP28: plastic dual in-line package; 28 leads (600 mil) SOT117-1

Philips Semiconductors Preliminary specification Teletext video processor SAA5191 SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260°C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300°C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400°C, contact may be up to 5 seconds. DEFINITIONS LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.