ZXLB1600_03 ZETEX | Alldatasheet

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Technical content

DESCRIPTION

The ZXLB1600 inductive switching boost converter accepts an input voltage of between 1.6V and 5.5V and provides an adjustable output voltage of up to 28V for LCD and OLED bias. The device contains an output switch and a second switch to isolate the coil from the input to provide true isolation in shutdown mode. The output can be adjusted by means of an externally applied dc voltage, a PWM control signal, or external feedback resistors and can supply typically 10mA of output current at maximum output voltage. Higher current is available at lower output voltages. The input voltage range accepts a number of battery solutions, including dual dry cell and single Li-Ion cells and PFM operation mode allows the output to be regulated with high efficiency under light or no load conditions. The switching frequency range permits the use of miniature surface mount inductors. A low battery comparator is provided to indicate when the input voltage has fallen to within ±2% of a preset threshold. This threshold is set internally , but can be adjusted externally to any voltage within the supply voltage range.

FEATURES

  • Wide input voltage range: 1.6 to 5.5V
  • Adjustable output voltage up to 28V, using PWM or analog control voltage
  • Internal PWM filter
  • True shutdown (output isolated from input)
  • Internal output switch and current sense
  • Low quiescent current: (75/H9262A max)
  • 5/H9262A (max) shutdown current (including low battery comparator)
  • Up to 500kHz switching frequency
  • High efficiency
  • Small MSOP10 package
  • Low external component count

APPLICATIONS

  • PDAs
  • Mobile phones - OLED sub displays
  • Digital cameras
  • Portable internet appliances
  • Palmtop computers
  • GPS terminals ZXLB1600 ISSUE 3 - SEPTEMBER 2003 SEMICONDUCTORS1 LCD AND OLED BIAS BOOST CONVERTER - STN, CSTN SCREENS TYPICAL APPLICATION CIRCUIT

(Voltages to GND unless otherwise stated) Output voltage 30V Input voltage 7V Switch output current 500mA Power dissipation 800mW Operating temperature 0 to 70 /H11034C Storage temperature -55 to 125 /H11034C Junction temperature 150 /H11034C ZXLB1600 ISSUE 3 - SEPTEMBER 2003 SEMICONDUCTORS 2 Symbol Parameter Conditions Min Typ Max Units General VIN Input voltage (1) 1.6 5.5 V IIN Supply current Shutdown (2) VEN = 0V 3.5 5 /H9262A Quiescent V EN =V IN,I OUT = 0V, Not switching 30 75 /H9262A Isolating switch RISO ‘On’ resistance V EN =V IN 0.7 2 /H9024 IISO Leakage current V EN =0 V 1 /H9262A VSW(max) Maximum voltage on SW pin during normal operation VIN+0.5 V LX Switch ILX Switch peak current limit (3) 0.15 0.35 A RLX ‘On’ resistance 0.5 2 /H9024 ILX(leak) Switch leakage current 1 /H9262A VLX Operating voltage on LX pin -0.5 30 V Controller output VOUT Output voltage range V IN 28 V IOUT Output current Lx = 22 /H9262H, V OUT = 28V 5 10 mA /H9004VLNR Line regulation I OUT = 1mA, 2V < V IN <5.5V 0.1 %/V /H9004VLDR Load regulation V OUT = 28V, 100 /H9262A<I OUT < 5mA 0.15 %/mA fLX Operating frequency 500 kHz TON Output ‘ON’ time LX output low 10 /H9262s TOFF Output ‘OFF’ time LX output off 0.9 µs /H9257 Efficiency (4) L x=2 2 /H9262H, V OUT = 20V 80 %

ELECTRICAL CHARACTERISTICS

Test conditions unless otherwise stated: VIN = 3.0V, TAMB = 25°C Note: 1) Minimum supply voltage should be maintained above 2V for operation at minimum temperature. 2) Shutdown current includes the operating current for the low battery comparator, which remains active in shutdown mode. 3) This is the dc value. The dynamic value may exceed 350mA during normal operation, due to switching delays, coil inductance an d supply voltage. 4) Efficiency is dependent upon the choice of external components, input/output voltages and load current.(see typical operating curves).

3 SEMICONDUCTORS

Symbol Parameter Conditions Min Typ Max Units Output voltage control by dc voltage applied to ‘ADJ’ pin VADJ (nom) Internal reference voltage ‘ADJ’ pin floating, ‘EN’= V IN 1.23 V Temperature coefficient of V ADJ 40 ppm/ /H11034C VADJ External overdrive voltage range on ‘ADJ’ pin for output voltage control 0.5 V ADJ (NOM) V IADJ Input current into V ADJ pin 0.5<V ADJ <V ADJ (NOM) -10 /H9262A VSENSE Default Output voltage ‘ADJ’ pin floating, ‘EN’= V IN 27 29 V Output voltage control by PWM signal applied to ‘EN’ input ∆T/T PWM duty cycle range at ‘EN’ input 10kHz (5) < f < 100kHz, V ENH =VIN 40 100 % fLPF Internal low pass filter cut-off frequency 4 kHz ALPF Filter attenuation f=30kHz 52.5 dB Internal voltage setting resistors for output voltage R1 Ref. Block diagram 317 k/H9024 R2 6.93 M /H9024 Enable input VENL Low level Input voltage Device in shutdown 0.4 V VENH High level Input voltage Device active 1.4 Vin V IENL Low level input current V EN =0V -100 nA IENH High level input current V EN =VIN 100 nA TEN(hold) Enable active hold time (6) VEN switched from high to low 120 /H9262s Low-battery detection circuit VLBT Detection threshold V IN falling 1.94 2.02 V Temperature coefficient of V BLT 20 ppm/ /H11034C VBLHYS Hysteresis V IN rising 20 mV Ref (LBD) Internal reference voltage 1.21 V VLBT (max) Maximum voltage on LBT pin V in-0.5 V IBLOL Low level output current Output ‘on’ 1 mA VBLOL Low level output voltage I BLOL = 0.5mA 0.4 V IBLOH High level output current Output ‘off’ , V BLOH = 29V 2 /H9262A VBLOH High level output voltage Output ‘off’ 29 V Internal voltage setting resistors for low-battery detection circuit R3 Ref. block diagram 1.56 M /H9024 R4 2.44 M/H9024 ELECTRICAL CHARACTERISTICS (Cont.) Test conditions unless otherwise stated: VIN = 3.0V, TAMB = 25°C Note: 5) This is the minimum PWM frequency to maintain a continuous output. Lower frequencies can be used, but will result in gated op eration of the device i.e. device enters shutdown when EN is low (see Note 6). 6) This is the time for which the device remains active after the EN pin has been driven low. This delay allows a continuous out put to be maintained during PWM mode operation at frequencies higher than 10kHz.

DEVICE DEVICE DESCRIPTION TEMPERATURE RANGE PART MARK ZXLB1600X10TA Boost converter for LCD bias in MSOP10 0 /H11034C to 70 /H11034C ZXLB1600 ZXLB1600X10TC Boost converter for LCD bias in MSOP10 0 /H11034C to 70 /H11034C ZXLB1600

ORDERING INFORMATION

TA reels 1k, TC reels 4k devices. Pin # Name Description 1 ADJ Internal (or external) reference voltage. Can be overdriven to adjust output voltage

2 EN Enable input (active high)

Also used to adjust output voltage by PWM signal

3 VIN Input voltage

4 SW Output of high side PMOS isolation switch

5 SENSE Output voltage sense

6 LX Output of NMOS switch

7 LBF Low battery flag output: open drain

(active low for low battery voltage) Active when EN is high or low

8 GND Ground

9 FB Voltage feedback pin for output (threshold 1.23V)

10 LBT Low battery flag threshold adjust input

(threshold 1.21V) PIN DESCRIPTION

The device is a flyback boost converter, working in discontinuous mode. With reference to the chip block diagram and typical application circuit, the operation of the device is as follows: Control loop When 'EN' is high, the control circuits become active. The high side of the coil is connected to the input via a large PMOS isolating switch (MP) and the low side to ground via NDMOS transistor (MN). The current in the coil is allowed to build up to an internally defined level (nominally 200 to 300mA) before MN is turned off. The energy stored in the coil is then transferred to the output capacitor (C2) via diode (D1). The output voltage is sensed at pin 'SENSE' by internal resistors R1 and R2 (which may be shunted externally at pin 'FB') and compared to a reference voltage (1.23V nominal). A comparator senses when the output voltage is above that set by the reference and its output is used to control the 'off' time of the output switch. The control loop is self-oscillating, producing pulses of 10/H9262s maximum duration (switch 'on'), at a frequency that varies in proportion to the output load current. The minimum 'off' time of the output switch is fixed at 1.25/H9262s nominal, to allow time for the coil's energy to be dissipated before the switch is turned on again. This maintains stable and efficient operation. Setting output voltage With external voltage The output voltage is equal to the voltage present on the 'ADJ' pin of the device multiplied by the internal resistor network factor (R1+R2)/R1. The ADJ pin is connected to the internal reference voltage of value V ADJ(nom) and by default will give a nominal output of 28V. However, if required, the ADJ pin may be overdriven with an external dc voltage V ADJ, in order to adjust the output voltage to a value lower than the default value. ZXLB1600 ISSUE 3 - SEPTEMBER 2003

5 SEMICONDUCTORS

The input of an internal low pass filter is switched to VREF when the EN pin is high and switched to ground when the EN pin is low. The output of this filter drives the comparator within the control loop. A continuous high state on EN therefore provides a filtered voltage of value Vref to the comparator and the control loop regulates the output to a nominal value of 28V. However, by varying the duty cycle (D) of the EN signal at a suitably high frequency (f>10kHz), the control loop will see a voltage, that has an average value equal to the duty cycle multiplied by V REF. This provides a means of adjusting the output voltage to a lower value. It also allows the device to be both turned on and adjusted with a single signal at the 'EN' pin. The output during this mode of operation will be a dc voltage equal to D x 28V Gated PWM operation The internal circuitry of the ZXLB1600 is turned off when no signal is present on the 'EN' pin for more than 120/H9262s (nominal). A low frequency signal applied to the EN pin will therefore gate the device 'on' and 'off' at the gating frequency and the duty cycle of this signal can be varied to provide a 'chopped' output voltage equal to D x 28V. For best accuracy, the gating frequency should be made as low as possible (e.g. below 1kHz), such that the turn off delay of the chip is only a small proportion of the gating period. Further details of setting output current are given in the application notes. Low battery detection A comparator driving an open drain NMOS output transistor performs the low battery flag function. The detection threshold (battery voltage falling) is set to 1.98V nominal with internal resistors R3 and R4, but this can be changed by shunting the internal potential divider with two external resistors at pin 'LBT'. Operation is such that the output transistor will be turned on when the battery voltage falls below the detection threshold. V BLT = 1.21 x (R3+R4)/R4 A small amount (nominal 20mV) of hysteresis is provided to aid clean switching. The low battery detection circuit remains active when 'EN' is low. ZXLB1600 ISSUE 3 - SEPTEMBER 2003 SEMICONDUCTORS 6

TYPICAL OPERATING CHARACTERISTICS (For typical applications circuit at Vin = 3V and TA = 25/H11034C unless otherwise stated) ZXLB1600 ISSUE 3 - SEPTEMBER 2003

7 SEMICONDUCTORS

Plot 1 Start-up response at max output voltage 1mA load Bottom: Enable input (1V/div), Top: Output voltage (10V/div) Plot 3 Operating waveforms at max output voltage 1mA load Bottom: LX Output (10V/div), Top: Output voltage (50mV/div ac) Plot 5 Line rejection at 1mA load Bottom: Input voltage (1V/div), Top: Output voltage (0.2V/div ac) Plot 4 Operating waveforms at max output voltage 10mA load Bottom: LX Output (10V/div), Top: Output voltage (50mV/div ac) Plot 2 Start-up response at max output voltage 5mA load Bottom: Enable input (1V/div), Top: Output voltage (10V/div) Plot 6 Load rejection Bottom: Load current (1mA/div), Top: Output voltage (0.1V/div ac)

TYPICAL OPERATING CHARACTERISTICS (Continued) VIN = 3V and TA = 25/H11034C ZXLB1600 ISSUE 3 - SEPTEMBER 2003

TYPICAL OPERATING CHARACTERISTICS (Continued) VIN = 3V and TA = 25/H11034C ZXLB1600 ISSUE 3 - SEPTEMBER 2003

TYPICAL OPERATING CHARACTERISTICS (Continued) VIN = 3V and TA = 25/H11034C ZXLB1600 ISSUE 3 - SEPTEMBER 2003

When connected as shown in the typical application circuit, the ZXLB1600 will produce a nominal output voltage of 28V. This can be adjusted by one of the three methods described below. 1) Output voltage adjustment by external resistors The internal reference and resistor divider network R1 and R2 set a nominal output of 28V. However, this network is accessible at the FB pin and can be shunted by means of external resistors to set different nominal output voltages. The potential divider defines output voltage according to the relationship: V OUT(dc) = (R1+R2)/R1 x 1.23V When using external resistors, these should be chosen with lower values than the internal resistors to minimize errors caused by the ±25% absolute value variation of the internal resistors. The internal resistors have high values in order to minimize these errors. The following table gives suggested E24/E96 resistor values for various output voltages. Required output voltage External resistor across R2 External resistor across R1 5V 280k /H9024 91k/H9024 12V 715k /H9024 82k/H9024 18V 1 M /H9024 75k/H9024 20V 1.15 M /H9024 75k/H9024 22V 1.15M /H9024 68.1k/H9024 25V 1.2 M /H9024 62k/H9024 2) Output adjustment by external voltage The internal voltage reference (Pin ADJ) may be overdriven by an external control voltage to set the output voltage. The relationship between applied voltage (V ADJ) and output voltage (VOUT) is: VOUT = 22.86 x VADJ Note that the output can be set to any value between the input voltage and the maximum operating voltage in this way. However, some non-linearity in the above expression may occur at values of VADJ below approximately 0.5V. Also note that when driving the ADJ pin, the control voltage must have sufficiently low impedance to sink the bias current of the internal reference.(10/H9262A max). 3) PWM output adjustment A Pulse Width Modulated (PWM) signal can be applied to the EN pin in order to adjust the output voltage to a value below the value set in in 1) or 2). This method of adjustment permits the device to be turned on and the output voltage set by a single logic signal applied to the EN pin. No external resistors or capacitors are required and the amplitude of the control signal is not critical, providing it conforms to the limits defined in the electrical characteristics. Two modes of adjustment are possible as described below: Filtered 'DC' mode If a PWM signal of 10kHz or higher is applied to the EN pin, the device will remain active when the EN pin is low. However, the input to the internal low pass filter will be switched alternately from V REF to ground, with a duty cycle (D) corresponding to that of the PWM signal. This will present a filtered dc voltage equal to the duty cycle multiplied by V REF to the control loop and will produce a dc output voltage lower than the maximum set value. This voltage is given by: V OUT = 28 x D A square wave signal applied to the EN pin, for example, will turn the device on and produce a nominal regulated output of 14V. ZXLB1600 ISSUE 3 - SEPTEMBER 2003 SEMICONDUCTORS11

The ZXLB1600 contains a timing circuit that switches the device on a few microseconds after the application of a rising edge to EN and turns it back off again nominally 120/H9262s after the falling edge of EN. So, if a lower frequency of 1kHz or less is applied to the EN pin, the device will be gated on and off at a duty cycle (D) corresponding to that of the input signal. The average output voltage is then given by: V OUT(avg) ~ 28 x D Output voltage can be adjusted all the way down to the input voltage by means of PWM control, but for best results, the duty cycle range should be kept within the specified range of 0.4 to 1. Lower duty cycles may result in increased output ripple and non-linearity in the relationship between duty cycle and output voltage. If a greater control range, or reduced ripple is required, the nominal output can be adjusted by one of the other methods before the PWM signal is applied. Negative output The ZXLB1600 can be used to provide a negative output voltage (in addition to the normal positive output) as shown in the application circuit below. In this circuit, the external resistors R3 an R4 are used to set the output voltage to 22V as described in the previous section. These resistors and output capacitor C2 have relatively low values in this circuit in order to give a short time constant. This improves the regulation of the negative voltage. Capacitor selection A low ESR ceramic capacitor grounded close to the GND pin of the package is recommended at the output of the device. Surface mount types offer the best performance due to their lower inductance. A minimum value of 1 /H9262F is advised, although higher values will lower switching frequency and improve efficiency especially at lower load currents. A higher value will also minimize ripple when using the device to provide an adjustable dc output voltage. A good quality, low ESR capacitor should also be used for input decoupling, as the ESR of this capacitor is effectively in series with the source impedance and lowers overall efficiency. This capacitor has to supply the relatively high peak current to the coil and smooth the current ripple on the input supply. A minimum value of 3.3/H9262F is acceptable if the input source is close to the device, but higher values are recommended at lower input voltages, when the source impedance is high. The input capacitor should be mounted as close as possible to the IC. For maximum stability over temperature, capacitors with X7R dielectric are recommended, as these have a much smaller temperature coefficient than other types. ZXLB1600 ISSUE 3 - SEPTEMBER 2003 12SEMICONDUCTORS

The choice of inductor will depend on available board space as well as required performance. Small value inductors have the advantage of smaller physical size and may offer lower series resistance and higher saturation current compared to larger values. A disadvantage of smaller inductors is that they result in higher frequency switching, which in turn causes reduced efficiency due to switch losses. Higher inductor values can provide better performance at lower supply voltages. However, if the inductance is too high, the output power will be limited by the internal oscillator, which will prevent the coil current from reaching its peak value. This condition will arise whenever the ramp time I LX(peak) x L/VIN exceeds the preset 10µs maximum ‘on’ time limit for the LX output. The ZXLB1600 has been optimized for use with inductor values in the range 10/H9262Ht o1 0 0/H9262H. The typical characteristics show how efficiency and available output current vary with input voltage and inductance. The inductor should be mounted as close to the device as possible with low resistance connections to the LX and SW pins. Suitable coils for use with the ZXLB1600 are those in the LP02506 and DO1608 series, made by Coilcraft. Diode selection The rectifier diode (D1) should be a fast low capacitance switching type with low reverse leakage at the working voltage. It should also have a peak current rating above the peak coil current and a continuous current rating higher than the maximum output load current. Small schottky diodes such as the BAT54 are suitable for use with the ZXLB1600 and this diode will give good all round performance over the output voltage and current range. At lower output voltages, a larger schottky diode such as the ZHCS500 or MBR0540 will provide a smaller forward drop and higher efficiency. At higher output voltages, where forward drop is less important, a silicon switching diode such as the 1N4148 can be used, however this will give lower efficiency. The BAT54S device specified in the application circuit contains a second diode (D2) as one half of a series connected pair. This second diode is used here to clamp possible negative excursions (due to coil ringing) from driving the drain of the output transistor below -0.5V. This prevents internal coupling effects, which might otherwise affect output regulation. The table below gives some typical characteristics for various diodes. ZXLB1600 ISSUE 3 - SEPTEMBER 2003

13 SEMICONDUCTORS

Diode For ward voltage at 100mA (V) Peak current (mA) Continuous current (mA) Reverse leakage (µA) BAT54 530 300 200 2 ZHCS500 300 1000 500 15 MBR0540 390 1000 500 1 1N4148 950 450 200 0.025

If isolation of the coil from the supply is not needed, the high side of this can be connected directly to VIN to improve efficiency. This prevents power loss in the internal PMOS switch and typical efficiency gains of 5% can be achieved. (See efficiency vs. load curves). Some applications may require the coil to be fed from a separate supply with a different voltage to V IN. In this case, the SW pin should be left floating. Layout considerations PCB tracks should be kept as short as possible to minimize ground bounce and the ground pin of the device should be soldered directly to the ground plane. It is particularly important to mount the coil and the input/output capacitors close to the device to minimize parasitic resistance and inductance, which will degrade efficiency and increase output ripple. The FB and LBT pins are high impedance inputs, so PCB track lengths to these should also be kept as short as possible to reduce noise pickup. Output ripple is typically only 50mV p-p, but a small feed-forward capacitor (~100pF) connected from the FB pin to the output may help to reduce this further. Capacitance from the FB pin to ground should be avoided, but a capacitor can be connected from the LBT pin to ground to reduce noise pickup into the low battery comparator if required. Low battery detection circuit The device contains an independent Low Battery Detection Circuit that remains powered when the device is shutdown. The detection threshold is set internally to a default value of 1.98V, but can be adjusted by means of external resistors as described below. Low battery threshold adjustment, LBT The internal potential divider network R3/R4 sets the detection threshold. This is accessible at the LBT pin and can be shunted by means of external resistors to set different nominal threshold voltages. The potential divider defines threshold voltage according to the relationship: V LBT = (R3+R4)/R4 x 1.21V When using external resistors, these should be chosen with lower values than the internal resistors to minimize errors caused by the /H1100625% absolute value variation of the internal resistors. The internal resistors have high values in order to minimize these errors. It is suggested to use values less than half those shown for R3, R4 at the bottom of page 3. Low battery flag output, LBF This is an open drain output that switches low when the battery voltage falls below the detection threshold. An external pull-up resistor can be connected to this pin to allow it to interface to any voltage up to a maximum of 29V. Current in the pull-up resistor should be limited to a value below I BLOL. ZXLB1600 ISSUE 3 - SEPTEMBER 2003 14SEMICONDUCTORS

Notes: ZXLB1600 ISSUE 3 - SEPTEMBER 2003

15 SEMICONDUCTORS

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