XPT2046

XPT2046 ETC2 | Alldatasheet

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• 15 CLOCKS-PER-CONVERSION

XPT2046 Touch Screen Controller XXPPTT22004466 DDaattaa SShheeeett 2007.5

XPT2046 Touch Screen Controller General Description The XPT2046 is a 4-wire resistive touch screen controller that incorporates a 12-bit 125 kHz sampling SAR type A/D converter. The XPT2046 operates down to 2.2V supply voltage and supports digital I/O interface voltage from 1.5V to VCC in order to conne ct low voltage uP. The XPT2046 can detect the pressed screen location by performing two A/D conversions. In addition to location, the XPT2046 also measures touch screen pressure.On-ch ip VREF can be utilized for analog auxiliary input, temperature measurement and battery monitoring withthe abi lity to measure voltage from 0V to 5V. The XPT2046 also has an on-chip temperature sensor The XPT2046 is available in 16pin QFN thin package(0.75mm in height) and has the operating temperature range of -40°C t o +85°C

Features

12 bit SAR type A/D converter with S/H circuit Low voltage operation (VCC = 2.2V ∼ 3.6V) Low voltage digital I/F (1.5V ∼ VCC) 4-wire I/F Sampling frequency: 125 kHz (max) On-Chip voltage reference (2.5V) Pen pressure measurement On-chip thermo sensor Direct battery masurement Low power consumption (260μA) Package 16pin QFN

Applications

Personal digital assistants Portable instruments Point -of-sale terminals Pagers Touch screen monitors Cellular phones

Figure 1. Block Diagram Table 1. Absolute Maximum Ratings device at these or any other conditions beyond those specified is not implied.

XPT2046 Touch Screen Controller Electrical Characteristics: VS = +2.7V to +5.5V At TA = −40°C to +85°C, +VCC = +2.7V, VREF = 2.5V internal voltage, fSAMPLE = 125kHz, fCLK = 16 • fSAMPLE = 2MHz, 12-bit mode, digital inputs = GND or IOVDD, and +VCC must be • IOVDD. XPT2046 PARAMETER CONDITION MIN TYP MAX UNITS ANALOG INPUT Full-Scale Input Span Absolute Input Range Capacitance Leakage Current Positive Input−Negative Inpu t Positive Input Negative Input -0.2 -0.2 0.1 V REF +VCC+0.2 +0.2 V V V pF µA SYSTEM PERFORMANCE Resolution No Missing Codes Integral Linearity Error Offset Error Gain Error Noise Power-Supply Rejection External VREF Including Internal VREF Bits Bits LSB LSB LSB µV rms dB SAMPLING DYNAMICS Conversion Time Acquisition Time Throughput Rate Multiplexer Settling Time Aperture Delay Aperture Jitter Channel-to-Channel Isolation V IN＝2.5Vpp，fs＝50KHz 500 100 100 125 CLK Cycl es CLK Cycl es KHz ns ns ps dB SWITCH DRIVERS On-Resistance YP、XP YN、XN Drive Current(2) Duration 100ms Ω Ω mA REFERENCE OUTPUT Internal Reference Voltage Internal Reference Drift Quiescent Current 2.45 2.50 500 2.55 V ppm/℃ µA

XPT2046 Touch Screen Controller REFERENCE INPUT Range Input Impedance SER/ Internal Reference Off Internal Reference On 1.0 250 VCC V GΩ Ω BATTERY MONITOR Input Voltage Range Input Impedance Sampling Battery Battery Monitor Off Accuracy V BAT=0.5V~5.5V , ExternalVREF=2.5V VBAT=0.5V~5.5V , Internal Reference 0.5 6.0 V KΩ GΩ TEMPERATURE ASUREMENT Temperature Range Resolution Accuracy Differential Method (3) TEMP0(4) Differential Method(3) TEMP0(4) -40 1.6 0.3 +85 DIGITAL INPUT/OUTPUT Logic Family Capacitance V IH V IL VOH VOL Data Format All Digital Control Input Pins | I IH |≤+5µA | IIL |≤+5µA IOH=-250µA IOL=250µA IOVDD*0.7 -0.3 IOVDD*0.8 CMOS Straight Binary IOVDD+0.3 0.3*IOVDD 0.4 pF V V V V POWER-SUPPLYREQUIREMENTS +VCC (5) IOVDD (6) Quiescent Current (7) Power Dissipation Specified Performance Operating Range Internal Reference Off Internal Reference On fSAMPLE = 12.5kHz Power-Down Mode with (CS=DCLK=DIN=IOVDD) VCC=+2.7V 2.7 2.2 1.5 280 780 220 3.6 5.25 VCC 650 1.8 V V V µA µA µA µA mW

Table 2. Electrical Characteristics (1) LSB means Least Significant Bit. With VREF = + 2.5V, one LSB is 610 V. (2) Assured by design, but not tested. Exceeding 50mA source curr ent may result in device degradation. (3) Difference between TEMP0 and TEMP1 measurement, no calibration necessary. (4) Temperature drift is −2.1m V/ C. (5) XPT2046 operates down to 2.2V.

Figure 2. Pin Layout

XPT2046 Touch Screen Controller Pin Description QFN PIN # TSSOP PIN# VFBGA PIN # NAME

DESCRIPTION

Busy Output. This output is high im pedance when CS is high. 2 14 A4 DIN Serial Data Input. If CS is low, data is latche d on the rising edge of DCLK. 3 15 A3 C S Chip Select Input. Controls conversion timing and enables the serial input/output 4 16 A2 DCLK External Clock Input. This clock runs the SAR con version process and synchronizes 5 1 B1和C1 VCC Power Supply 6 2 D1 XP XP Position Input 7 3 E1 YP YP Position Input 8 4 G2 XN XN Position Input 9 5 G3 YN YN Position Input 10 6 G4和G5 GND Ground 11 7 G6 VBAT Battery Monitor Input 12 8 E7 AUX Auxiliary Input to ADC 13 9 D7 VREF Voltage Reference Input/Output 14 10 C7 IOVDD Digital I/O Power Supply 15 11 B7 PENIRQ Pen Interrupt 16 12 A6 DOUT Serial Data Output. Data is shifted on the falling edge of DCLK. This output is high Table 3. Pin Description

XPT2046 Touch Screen Controller Typical Characteristics At TA = +25 C, +VCC = +2.7V, IOVDD = +1.8V, VREF = External +2.5V, 12 -bit mode, PD0 = 0, fSAMPLE = 125kHz, and fCLK = 16 fSAMPLE = 2MHz,

XPT2046 Touch Screen Controller

Figure 3. Typical Characteristics

between 1V and +VCC. The value of the reference voltage directly sets the input range of the converter. on-resistance (if this is a source of error fo r theparticular measurement). Figure 4. Basic Operation

insure the reference is off (see the Typical Characteristics for power- up time of the reference from power-down). Figure 6. Simplified Diagram of the Internal Reference

aking measurements while the switch drivers are ON. resistance of the touch screen, providing an additional source of error. Figure 7. Simplified Diagram of Single-Ended Ref erence (SER/DFR high,

drivers on until commanded to stop by the processor (see Figure 16). the user. The result is an equivalent temper ature measurement resolution of 0.3 C/LSB (in 12 -bit mode). Figure 9. Functional Block Diagram of Temperature Measurement

XPT2046 Touch Screen Controller △V ＝ ) ln(Nq where: N is the current ratio = 91. k = Boltzmann’s constant (1.38054 • 10−23 electro n volts/ degrees Kelvin). q = the electron charge (1.602189 • 10–19 C). T = the temperature in degrees Kelvin. This method can provide improved absolute temperature m easurement over the first mode at the cost of less resolution (1.6°C/LSB). The equation for solving for °K is: )) ln( (N k Vq K • where: ΔV = V (I91) – V (I1) (in mV) = 2.573 °K/mV • ΔV NOTE: The bias current f or each diode temperature measurem ent is only on for 3 clock cycles (during the acquisition mode) and, therefore, does not add any noticeable increa se in power, espe cially if the temperature measurement only occurs occasionally. Battery Measurement An added feature of the XPT2046 is the ability to monitor the battery voltage on the other side of the voltage regulator(DC/DC converter), as shown in Figure 10. The battery voltage can vary from 0V to 6V, while maintaining the voltage to the XPT2046 at 2.7V, 3.3V, etc. The input voltage (VBAT)is divided down by 4 so that a 5.5V battery voltage is represented as 1.375V to the AD C. This simplifies the multiplexer and control logic. In order to minimize the power consumption, the divider is only on during the sampling period when A2 = 0, A1 = 1, and A0 = 0 (see Table 1 for the relationship between the control bits and configuration of the XPT2046).

Figure 10. Battery Measurement Functional Block Diagram

Figure 11. Pressure Measurement Block Diagrams 24 clock cycles on the DCLK input. the order and description of these control bits within the control byte. XPT2046 ignores inputs on the DIN pin until the start bit is detected. Table 1, Table 2, and Figure 5), touch screen drivers, and the reference inputs. esolution,whereas with this bit high, the next conversion has eight bits of resolution.

and Figure 5 through Figure 8, for further information). Table 6. Order of the Control Bits in the Control Byte conversion mode (see Figure 16). ersion: 12-bits(low) or 8-bits (high). inputs (see Table 1 and Table 2). 1-0 PD1-PD0 Power-Down Mode Select bits. Refer to Table 5 fordetails. Table 7. Descriptions of the Control Bits within the Control Byte

Figure 12. Conversion Timing, 24 Clocks-per-Conversion, 8-Bit Bus Interface. NOTE: The differen tial mode can only be used for X-Position, Y-Position, and Pressure-Touch measurements. All other measurements require the single-ended mode.

XPT2046 Touch Screen Controller wake-up time if the internal reference is powered down. The ADC requires no wake-up time and can be instantaneously used. Also note that the status of the internal reference power-down is latched into the part (internally) with BUSY going high. In order to turn the reference off, an additional write to the XPT2046 is required after the channel has been converted. PD1 PD0 ——PEN——IRQ Power-Down Between Conversions. When each co nversion is finished, the converter enters a low-power mode. At the start of the next conversion, the device instantly powers u p to full power. There is no need for additional delays to ensure full operation, and the very first conversion is valid. The Y− switch is on when in power-down. 0 1 Disabled Reference is off and ADC is on. 1 0 Enabled Reference is on and ADC is off. 1 1 Disabled Device is always powered. Reference is on and ADC is on. Table 8. Power-Down and Internal Reference Selection

Figure 13. PENIRQ Functional Block Diagram time of the PENIRQ to a screen touch, so user software should take this into account. resistor through the touch screen, thus causing no errors. Furthermore, the PENIRQ output is disabled and low during the measurement cycle for X-, Y-, and Z-Position. is clocked out of the XPT2046. the cases discussed in this section.

16 Clocks-per-Conversion

other serial communications are taking place during a conversion. Figure 14. Conversion Timing, 16 Cloc ks-per-Conversion, 8-B it Bus Interface. Figure 12, Figure 15 and Table 6 provide detailed timing for the digital interface of the XPT2046. Figure 15. Detailed Timing Diagram

XPT2046 Touch Screen Controller +VCC· 2.7V, +VCC· IOVDD·1.5V, CLOAD = 50pF SYMBOL 1.5 μs tDS DIN Valid Prior to DCLK Rising 100 ns tDH DIN Hold After DCLK High 50 ns tDO DCLK Falling to DOUT Valid 200 ns tDV ——CS Falling to DOUT Enabled 200 ns tTR ——CS Rising to DOUT Disabled 200 ns tCSS ——CS CS Falling to First DCLK Rising 100 ns tCSH ——CS Rising to DCLK Ignored 10 ns tCH DCLK High 200 ns tCL DCLK Low 200 ns tBD DCLK Falling to BUSY Rising /Falling 200 ns tBDV ——CS Falling to BUSY Enabled 200 ns tBTR ——CS Rising to BUSY Disabled 200 ns Table 9. Timing Specifications,

15 Clocks-per-Conversion

of the converter beyond the values given in the specification tables, which assume 16 clock cycles per conversion. Figure 16. Maximum Conversion Rate, 15 Clocks-per-Conversion code for the given input voltage and does not include the ffects of offset, gain, or noise. Figure 17. Ideal Input Voltages and Output Codes

up with CS = 0 and DCLK = IOVDD. Figure 19. Demo