XPC564A FREESCALE | Alldatasheet
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P&E Microcomputer Systems, Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. P&E Microcomputer Systems, Inc. does not assume any liability arising out of the application or use of any product or circuit described herein. This software and accompanying documentation are protected by United States Copyright law and also by International Treaty provisions. Any use of this software in violation of copyright law or the terms of this agreement will be prosecuted. All the software described in this document is copyrighted by P&E Microcomputer Systems, Inc. Copyright notices have been included in the software. P&E Microcomputer Systems authorizes you to make archival copies of the software and documentation for the sole purpose of back-up and protecting your investment from loss. Under no circumstances may you copy this software or documentation for the purpose of distribution to others. Under no conditions may you remove the copyright notices from this software or documentation. This software may be used by one person on as many computers as that person uses, provided that the software is never used on two computers at the same time. P&E expects that group programming projects making use of this software will purchase a copy of the software and documentation for each user in the group. Contact P&E for volume discounts and site licensing agreements. P&E Microcomputer Systems does not assume any liability for the use of this software beyond the original purchase price of the software. In no event will P&E Microcomputer Systems be liable for additional damages, including any lost profits, lost savings or other incidental or consequential damages arising out of the use or inability to use these programs, even if P&E Microcomputer Systems has been advised of the possibility of such damage. By using this software, you accept the terms of this agreement. © 2010 P&E Microcomputer Systems, Inc. “MS-DOS” and “Windows” are registered trademarks of Microsoft Corporation. “Freescale” and “ColdFire” are registered trademarks of Freescale, Inc. The Power Architecture and Power.org wordmarks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. P&E Microcomputer Systems, Inc. 98 Galen St. Watertown, MA 02472 617-923-0053 http://www.pemicro.com Manual version 1.00, Septermber 2010
SPC564A EVB User Manual ii 5 xPC564AADPT208S / xPC564AADPT176S HARDWARE & JUMPER SET-
iii SPC564A EVB User Manual
The xPC564A EVB is an evaluation system supporting Freescale MPC564xA microprocessors. The complete system consists of an xPC56XXMB Motherboard and an xPC564AADPT Mini-Module which plugs into the motherboard. Different Mini-Modules are available for evaluating devices with different footprints in the MPC564xA family of microprocessors. The evaluation system allows full access to the CPU, all of the CPU’s I/O signals, and the motherboard peripherals (such as CAN, SCI, LIN). The Mini-Module may be used as a stand-alone unit, which allows access to the CPU, but no access to the I/O pins or any motherboard peripherals. Figure 1-1: Overview of the xPC564A EVB
1.1 Package Contents
An xPC564A Evaluation Kit includes the following items:
- One xPC56XXMB Motherboard
- One xPC564AADPT176S or xPC564AADPT208S or xPC564AADPT324S Mini-Module
- One xPC56XX Resources CD-ROM
- One P&E USB-ML-PPCNEXUS Ha rdware Interface Cable
- One USB A-to-B Cable
- Freescale Warranty Card An xPC564A Adapter Package includes the following items:
- One xPC564AADPT176S or xPC564AADPT208S or xPC564AADPT324S Mini-Module
- One xPC56XX Resources CD-ROM
- Freescale Warranty Card
1.2 Supported Devices
The xPC564AADPT176S Mini-Module supports the following devices:
- MPC564xA (176 LQFP package) The xPC564AADPT208S Mini-Module supports the following devices:
- MPC564xA (208 BGA package) The xPC564AADPT324S Mini-Module supports the following devices:
- MPC564xA (324 BGA package)
1.3 Recommended Materials
- Freescale MPC5646A reference manual and datasheet
- xPC56XXMB schematic
- xPC564AADPT176S schematic
- xPC564AADPT208S schematic
- xPC564AADPT324S schematic
1.4 Handling Precautions
Please take care to handle the package contents in a manner such as to prevent electrostatic discharge.
2 HARDWARE FEATURES
The xPC564A EVB is an evaluation system for Freescale’s MPC564xA microprocessors. A 38-pin Mictor Nexus port and/or a 14-pin JTAG port are provided on the Mini-Module to allow usage of an external PowerPC Nexus interface such as P&E USB-ML-PPCNEXUS cable and Cyclone MAX automated programmer. 2.1 xPC56XXMB Board Features
- ON/OFF Power Switch w/ LED indicators
- A 12VDC power supply input barrel connector
- Onboard STMicroelectronics L9758 regulator provides three different power voltages simultaneously: 5V, 3.3V, and 1.2V
- Onboard peripherals can be configured to operate at 5V or 3.3V logic levels
- Two CAN channels with jumper enables
- One CAN channel with High-Speed transceiver and DB9 male connector
- One CAN channel with Low-Speed Fault Tolerant and High- Speed transceiver (selectable with jumpers) and DB9 male connector
- Two LIN channels with jumper enables
- One channel with transceiver and pin header connector populated
- One channel with footprints only
- One SCI channel with jumper enables
- Transceiver with DB9 female connector
- Two FlexRay channels with jumper enables
- One channel with transceiver and DB9 male connector
- One channel with footprint only
- Four user push buttons with jumper enables and polarity selection
- Four user LED’s with jumper enables
- One potentiometer for analog voltage input
- Pin array for accessing all I/O signals
- Expansion connectors for accessing all I/O signals
- Development zone with 0.1” spacing and SOIC footprint prototyping
- Specifications:
- Board Size 5.5” x 9.0”
- 12VDC Center Positive power supply with 2.5/5.5mm barrel connector Figure 2-1: xPC56XXMB Top Component Placement
2.2 xPC564AADPT Mini-Module Board Features
- Can be used as a stand-alone board by providing external 5V power supply input
- ON/OFF Power Switch w/ LED indicator
- Reset button with filter and LED indicator
- xPC564AADPT176S has socket for MPC564xA in 176LQFP footprint
- xPC564AADPT208S has socket for MPC564xA in 208BGA footprint
- xPC564AADPT324S has socket for MPC564xA in 324BGA footprint
- Debug ports: 38-pin Mictor Nexus port and/or 14-pin JTAG port
- Direct clock input through SMA connector (footprint only)
- Jumpers for boot configuration Figure 2-2: xPC564AADPT176S Top Component Placement
Figure 2-3: xPC564AADPT208S Top Component Placement Figure 2-4: xPC564AADPT324S Top Component Placement
2.3 Pin Numbering for Jumpers
Jumpers for both the xPC56XXMB motherboard and the xPC564A Mini- Modules have a rounded corner to indicate the position of pin 1. See
examples below for the numbering convention used in this manual for jumper settings. Figure 2-5: Pin Numbering 3 xPC56XXMB HARDWARE & JUMPER SETTINGS Please note that this section of the manual is written for revision B of the xPC56XXMB motherboard. Revision B motherboards are indicated by the “Rev. B” silkscreen text in the center of the motherboard. Revision A motherboards have different jumper numbers. These differences can be found in the table below: Revision A Revision BJ u m p e r Description J3 J6, pins 1+2 VSA Tracking Regulator Configuration J4 J7 VPROG Regulators Control J5 (pins 1+2) J5 IGN Control J5 (pins 3+4, 5+6, 7+8) J6, pins 3+4, 5+6, 7+8 Regulators Enable & Standby J36 J4 VIO Peripherals Logic Level
J37 J3 VBat low voltage detection J7 J8 LEDs Enable J8 J9 Buttons Enable J9 J10 Buttons Driving Configuration J40 J11 Buttons Idle Configuration J22 J13 LIN1 enable J24 J14 LIN1 VBUS configuration J6 J15 LIN1 VSUP configuration J23 J16 LIN1 master selection J28 J22 LIN1/SCI RxD selection J27 J25 LIN1/SCI TxD selection J19 J17 LIN2 enable J21 J18 LIN2 VBUS configuration J31 J20 LIN2 VSUP configuration J20 J21 LIN2 master selection J30 J12 LIN2/SCI RxD selection J29 J19 LIN2/SCI TxD selection J17 J23 SCI RxD Enable J16 J24 SCI TxD Enable J27 J25 LIN1/SCI TxD selection
3.1 Power Supplies
The xPC56XXMB obtains its power from the 12VDC Center Positive input barrel connector. The following jumpers are used to configure the power supply output: J28 J22 LIN1/SCI RxD selection J14 J28 CAN (H) Transmit Enable J15 J27 CAN (H) TxD/RxD Enable J13 J31 CAN (L) CTE J12 J30 CAN (L) Enable J11 J29 CAN (L) TxD/RxD Enable J25 J32 FlexRay Bus Driver 1 Enable J26 J35 FlexRay Bus Driver 1 Configuration J34 J34 FlexRay 1 Terminal Resistor Connection J35 J33 FlexRay 1 Terminal Resistor Connection J32 J36 FlexRay Bus Driver 2 Enable J33 J39 FlexRay Bus Driver 2 Configuration J38 J38 FlexRay 2 Terminal Resistor Connection J39 J37 FlexRay 2 Terminal Resistor Connection J18 J40 POT Enable
10 xPC564A EVB User Manual J3 – VBat low voltage detection J4 – VIO Peripherals Logic Level J5 – IGN Control J6 – Regulators Enable & Standby Jumper Setting Effect On Low battery detection is enabled Off (default) Low battery detection is disabled Jumper Setting Effect 1+2 Onboard peripherals are configured for 3.3V logic 2+3 (default) Onboard peripherals are configured for 5V logic Jumper Setting Effect On (default) The power regulator is always on Off If 5+6 is also OFF on J6, the power regulator is in standby Jumper Setting Position Effect
xPC564A EVB User Manual 11 J7 – VPROG Regulators Control 1+2 On The ST L9758 tracking regulator VSA tracks the input voltage at its TRACK_REF pin. Off (default) The ST L9758 tracking regulator VSA tracks 5V 3+4 On VSB, VSC, and VSD tracking regulators are disabled Off (default) VSB, VSC, and VSD tracking regulators are enabled 5+6 On (default) The power regulator is always on Off The power regulator is in standby if jumpers 1+2 are also in the “off” position 7+8 On VDLL and VCORE regulators are disabled Off (default) VDLL and VCORE regulators are enabled Jumper Setting Position Effect 1+2 On VKAM regulator output is programmed to 1V Off (default) VKAM regulator output is programmed to 1.5V 3+4 On VSTBY regulator output is programmed to 2.6V Off (default) VSTBY regulator output is programmed to 3.3V
12 xPC564A EVB User Manual J37 – VBat low voltage detection Figure 3-1: Power Supply circuitry schematic 5+6 On VDLL regulator output is programmed to 2.6V Off (default) VDLL regulator output is programmed to 3.3V Jumper Setting Effect On Low battery detection is enabled Off (default) Low battery detection is disabled
xPC564A EVB User Manual 13
3.2 LEDs
There are four user LEDs available on the xPC56XXMB. All LEDs are active low. J8 – LEDs Enable Controls whether the LEDs on the xPC56XXMB motherboard are connected to I/O pins of the processor. The jumpers can be removed and wires can be used to connect each LED to any processor I/O pin, if desired. Figure 3-2: LEDs circuitry schematic Jumper Setting Effect 1+2 (default on) LED1 connected to eMIOS9 3+4 (default on) LED2 connected to eMIOS10 5+6 (default on) LED3 connected to eMIOS11 7+8 (default on) LED4 connected to eMIOS12
14 xPC564A EVB User Manual
3.3 Buttons
There are four user buttons available on the xPC56XXMB. J9 – Buttons Enable Controls whether the buttons on the xPC56XXMB motherboard are connected to I/O pins of the processor. The jumpers can be removed and wires can be used to connect each button to any processor I/O pin, if desired. J10 – Buttons Driving Configuration Selects whether the buttons drive logic high or drive logic low when pressed. Jumper Setting Effect 1+2 (default on) KEY1 connected to eMIOS0 3+4 (default on) KEY2 connected to eMIOS2 5+6 (default on) KEY3 connected to eMIOS4 7+8 (default on) KEY4 connected to eMIOS8 Jumper Setting Effect 1+2 When pressed, buttons will send logic high to the connected I/O pin 2+3 (default) When pressed, buttons will send logic low to the connected I/O pin
xPC564A EVB User Manual 15 J11 – Buttons Idle Configuration Selects whether the I/O pins are pulled logic high or pulled logic low. This controls the default logic level of the I/O pins when the buttons are not pressed. Figure 3-3: Buttons circuitry schematic
3.4 LIN
There are footprints for two LIN connections on the xPC56XXMB. By default, Jumper Setting Effect 1+2 (default) I/O pins connected to the buttons are pulled up to logic high 2+3 I/O pins connected to the buttons are pulled down to logic low
16 xPC564A EVB User Manual one LIN circuit is assembled (LIN1) and the other circuit is left unpopulated (LIN2). J13 – LIN1 enable J14 – LIN1 VBUS configuration J15 – LIN1 VSUP configuration Jumper Setting Effect On Enables the LIN1 transceiver Off (default) Disables the LIN1 transceiver Jumper Setting Effect On LIN1 VBUS is connected to 12V Off (default) LIN1 VBUS is not connected to 12V Jumper Setting Effect On LIN1 VSUP is connected to 12V Off (default) LIN1 VSUP is not connected to 12V
xPC564A EVB User Manual 17 J16 – LIN1 master selection J22 – LIN1/SCI RxD selection Controls whether the RxD pin on LIN1 or SCI is connected to the default I/O pin on the MPC564xA processor. J25 – LIN1/SCI TxD selection Controls whether the TxD pin on LIN1 or SCI is connected to the default I/O pin on the MPC564xA processor. Jumper Setting Effect On LIN1 is configured as a master node Off (default) LIN1 is configured as a slave node Jumper Setting Effect 1+2 The LIN1 RxD pin is connected to the “RXDA” pin on the MPC564xA processor. This should be set if enabling LIN1. 2+3 The SCI RxD pin is connected to the “RXDA” pin on the MPC564xA processor. Jumper Setting Effect 1+2 The LIN1 TxD pin is connected to the “TXDA” pin on the MPC564xA processor. This should be set if enabling LIN1.
18 xPC564A EVB User Manual Figure 3-4: LIN1 Schematic J17 – LIN2 enable J18 – LIN2 VBUS configuration 2+3 The SCI TxD pin is connected to the “TXDA” pin on the MPC564xA processor. Jumper Setting Effect On Enables the LIN2 transceiver Off (default) Disables the LIN2 transceiver Jumper Setting Effect On LIN2 VBUS is connected to 12V Off (default) LIN2 VBUS is not connected to 12V
xPC564A EVB User Manual 19 J20 – LIN2 VSUP configuration J21 – LIN2 master selection J12 – LIN2/SCI RxD selection Controls whether the RxD pin on LIN2 or SCI is connected to the default I/O pin on the MPC564xA processor. Jumper Setting Effect On LIN2 VSUP is connected to 12V Off (default) LIN2 VSUP is not connected to 12V Jumper Setting Effect On LIN2 is configured as a master node Off (default) LIN2 is configured as a slave node Jumper Setting Effect 1+2 The LIN2 RxD pin is connected to the “RXDB” pin on the MPC564xA processor. This should be set if enabling LIN2. 2+3 (default) The SCI RxD pin is connected to the “RXDB” pin on the MPC564xA processor.
20 xPC564A EVB User Manual J19 – LIN2/SCI TxD selection Controls whether the TxD pin on LIN2 or SCI is connected to the default I/O pin on the MPC564xA processor. Figure 3-5: LIN2 schematic (Not populated by default)
3.5 SCI
One SCI interface is available on the xPC56XXMB. Jumper Setting Effect 1+2 The LIN2 TxD pin is connected to the “TXDB” pin on the MPC564xA processor. This should be set if enabling LIN2. 2+3 (default) The SCI TxD pin is connected to the “TXDB” pin on the MPC564xA processor.
xPC564A EVB User Manual 21 J23 – SCI RxD Enable J24 – SCI TxD Enable J25 – LIN1/SCI TxD selection Controls whether the TxD pin on LIN1 or SCI is connected to the default I/O pin on the MPC564xA processor. Jumper Setting Effect On (default) Enables SCI receive Off Disables SCI receive Jumper Setting Effect On (default) Enables SCI transmit Off Disables SCI transmit Jumper Setting Effect 1+2 The LIN1 TxD pin is connected to the “TXDA” pin on the MPC564xA processor. 2+3 The SCI TxD pin is connected to the “TXDA” pin on the MPC564xA processor. This should be set if enabling SCI.
22 xPC564A EVB User Manual J22 – LIN1/SCI RxD selection Controls whether the RxD pin on LIN1 or SCI is connected to the default I/O pin on the MPC564xA processor. Figure 3-6: SCI schematic
3.6 CAN
Two CAN interfaces are implemented on the xPC56XXMB: a high-speed CAN interface and a low-speed CAN interface. Jumper Setting Effect 1+2 The LIN1 RxD pin is connected to the “RXDA” pin on the MPC564xA processor. 2+3 The SCI RxD pin is connected to the “RXDA” pin on the MPC564xA processor. This should be set if enabling SCI.
xPC564A EVB User Manual 23 J28– CAN (H) Transmit Enable J27 – CAN (H) TxD/RxD Enable Controls which I/O pins on the MPC564xA processor are connected to the TxD and RxD pins on CAN (H). If CAN (H) is not used, it is recommended that all jumpers are removed. J30 – CAN (L) Enable Jumper Setting Effect On Enables CAN transmission Off (default) Disables CAN transmission Jumper Setting Effect 1+3 (default) The RxD pin of the CAN (H) interface is connected to the “CNRXA” pin of the MPC564xA processor. 3+5 The RxD pin of the CAN (H) interface is connected to the “CNRXC” pin of the MPC564xA processor. 2+4 (default) The TxD pin of the CAN (H) interface is connected to the “CNTXA” pin of the MPC564xA processor. 4+6 The TxD pin of the CAN (H) interface is connected to the “CNTXC” pin of the MPC564xA processor. Jumper Setting Effect
24 xPC564A EVB User Manual J31 – CAN (L) CTE J29 – CAN (L) TxD/RxD Enable Controls which I/O pins on the MPC564xA processor are connected to the TxD and RxD pins on CAN (L). If CAN (L) is not used, it is recommended that all jumpers are removed. On (default) Enables CAN (L) transceiver Off Disables CAN (L) transceiver Jumper Setting Effect On Enables CAN transmission Off (default) Disables CAN transmission Jumper Setting Effect 1+3 The RxD pin of the CAN (L) interface is connected to the “CNRXA” pin of the MPC564xA processor. 3+5 (default) The RxD pin of the CAN (L) interface is connected to the “CNRXC” pin of the MPC564xA processor. 2+4 The TxD pin of the CAN (L) interface is connected to the “CNTXA” pin of the MPC564xA processor. 4+6 (default) The TxD pin of the CAN (L) interface is connected to the “CNTXC” pin of the MPC564xA processor.
xPC564A EVB User Manual 25 Figure 3-7: CAN schematic
3.7 FlexRay
The xPC56XXMB has footprints for two FlexRay interfaces. However, only one circuit is assembled by default. The FlexRay circuit comprises of two DB9 connectors. DB3 contains signals for both FlexRay channels and is compatible with major FlexRay tools. DB5 contains channel B signal, thereby also allowing 2 separate FlexRay connectors for channel A and channel B operation. J32 – FlexRay Bus Driver 1 Enable Controls whether the TxD, TxEN, RxD pins on FlexRay channel A is
26 xPC564A EVB User Manual connected to the default I/O pin on the MPC564xA processor. J35 – FlexRay Bus Driver 1 Configuration Controls configuration pins on the FlexRay Bus Driver. Jumper Setting Effect 1+2 The TxD pin of the FlexRay Channel A interface is connected to the “FR_A_TX” pin of the MPC564xA processor. 3+4 The TxEN pin of the FlexRay Channel A interface is connected to the “FR_A_TX_EN” pin of the MPC564xA processor. 5+6 The RxD pin of the FlexRay Channel A interface is connected to the “FR_A_RX” pin of the MPC564xA processor. Jumper Setting Effect 1+2 The BGE pin on the FlexRay Bus Driver is pulled up to 5V 3+4 The STBN pin on the FlexRay Bus Driver is pulled up to 5+6 (default on) The EN pin on the FlexRay Bus Driver is pulled up to 5V 7+8 (default on) The WAKE pin on the FlexRay Bus Driver is pulled down to GND
xPC564A EVB User Manual 27 J33 & J34 FlexRay 1 Terminal Resistor Connection J36 – FlexRay Bus Driver 2 Enable Controls whether the TxD, TxEN, RxD pins on FlexRay channel B is connected to the default I/O pin on the MPC564xA processor. J39 – FlexRay Bus Driver 2 Configuration Controls configuration pins on the FlexRay Bus Driver. Jumper Setting Effect On Terminal resistors connected Off (default) Terminal resistors not connected Jumper Setting Effect 1+2 The TxD pin of the FlexRay Channel A interface is connected to the “FR_B_TX” pin of the MPC564xA processor. 3+4 The TxEN pin of the FlexRay Channel A interface is connected to the “FR_B_TX_EN” pin of the MPC564xA processor. 5+6 The RxD pin of the FlexRay Channel A interface is connected to the “FR_B_RX” pin of the MPC564xA processor. Jumper Setting Effect
28 xPC564A EVB User Manual J37 & J38 – FlexRay 2 Terminal Resistor Connection 1+2 The BGE pin on the FlexRay Bus Driver is pulled up to 5V 3+4 The STBN pin on the FlexRay Bus Driver is pulled up to 5+6 The EN pin on the FlexRay Bus Driver is pulled up to 5V 7+8 The WAKE pin on the FlexRay Bus Driver is pulled down to GND Jumper Setting Effect On Terminal resistors connected Off (default) Terminal resistors not connected
xPC564A EVB User Manual 29 Figure 3-8: FlexRay Schematic
3.8 Potentiometer
A potentiometer is available on the xPC56XXMB to allow an analog voltage input. J40 – POT Enable Jumper Setting Effect On (default) The potentiometer wiper terminal is connected to the “AN17” pin on the MPC564xA processor. Off The potentiometer wiper terminal is left disconnected.
30 xPC564A EVB User Manual Figure 3-9: Potentiometer schematic
xPC564A EVB User Manual 31
3.9 Pin Mapping
The following is the xPC564A EVB pin assignment for the Pin Array headers: Figure 3-10: Pin Mapping
32 xPC564A EVB User Manual
3.10 Expansion Port Pin Mapping – DIN41612 (4x32)
Figure 3-11: Expansion Port Pin Mapping – DIN41612 (4x32)
xPC564A EVB User Manual 33
3.11 Expansion Port Pin Mapping – DIN41612 (2x32)
Expansion Port Pin Mapping – DIN41612 (2x32)
34 xPC564A EVB User Manual 4 xPC564AADPT324S HARDWARE & JUMPER SETTINGS
4.1 Boot Configuration
The following jumpers affect the operation of the processor as it initially comes out of the reset state: J7 – BOOTCFG0 Configuration Controls the status of the BOOTCFG0 pin J8 – BOOTCFG1 Configuration Controls whether the processor boots from internal FLASH or from a serial interface (CAN, SCI) J9 – PLLCFG1 Configuration Controls the status of the PLLCFG1 pin Jumper Setting Effect 1+2 The BOOTCFG0 pin on the processor is pulled up 2+3 (default) The BOOTCFG0 pin on the processor is pulled down Jumper Setting Effect 1+2 The MPC564xA processor uses serial boot mode 2+3 (default) The MPC564xA processor uses internal boot mode Jumper Setting Effect
xPC564A EVB User Manual 35 J10 – WKPCFG Configuration Controls whether specified eTPU and eMIOS pins on the processor are configured with weak pull-up or a weak pull-down when the processor comes out of reset J22 – PLLREF Configuration Controls the clock source the processor uses: a crystal source or an external source 1+2 The PLLCFG1 pin on the processor is pulled up 2+3 (default) The PLLCFG1 pin on the processor is pulled down Jumper Setting Effect 1+2 Pins are configured as weak pull‐up 2+3 (default) Pins are configured as weak pull‐down Jumper Setting Effect 1+2 (default) The MPC564xA processor uses a crystal clock source 2+3 The MPC564xA processor uses an external clock source
36 xPC564A EVB User Manual J23 – RSTCFG Configuration Controls the status of the RSTCFG pin Figure 4-1: Boot Configuration Jumpers
4.2 Power Configuration
When the xPC564A Mini-Module is plugged into the xPC56XXMB motherboard, power is supplied directly by the motherboard. In this setup, the external power supply input available on the Mini-Module should NOT be used. When the xPC564A Mini-Module is used as a stand-alone board, an external 5V power supply must be used. The following jumpers affect the power supply pins of the MPC564xA processor: Jumper Setting Effect 1+2 (default) The RSTCFG pin on the processor is pulled up 2+3 The RSTCFG pin on the processor is pulled down
xPC564A EVB User Manual 37 J3 – VRH enable Controls whether power is provided to the Voltage Reference High (VRH) input pin used by the eQADC module on the MPC564xA processor. J4 – VSTBY Configuration J14 – I/O Supply Input Enable Controls whether power is provided to the “I/O Supply Input” pins on the MPC564xA processor. Jumper Setting Effect On (default) The VRH pin is connected to 5V power Off The VRH pin is left disconnected Jumper Setting Effect On (default) The MPC564xA “VSTBY” pin is pulled down to GND Off The MPC564xA “VSTBY” pin is only connected to a 100nF bypass capacitor. External 1V supply should be applied to this pin. Jumper Setting Effect On (default) MPC564xA I/O Supply Input pins are connected to 3.3V or 5V (determined by J18) Off MPC564xA I/O Supply Input pins are unpowered
38 xPC564A EVB User Manual J17 – Debug Ports Power Configuration Controls whether the power pins on the debug ports (VDDE7 on the 14-pin JTAG port and VREF on the 28-pin Mictor port) are connected to 3.3V or 5V. J18 – Processor I/O Voltage Configuration Sets the voltage level applied to the I/O Supply Input pins of the MPC564xA processor. J19 – 3.3V Voltage Source Controls whether the voltage source for 3.3V on the MPC564xA processor is provided by the motherboard or by the 5V external source on the Mini-Module via a voltage regulator. Jumper Setting Effect 1+2 The power pins on the debug ports are connected to 5V 2+3 (default) The power pins on the debug ports are connected to 3.3V Jumper Setting Effect 1+2 (default) The “I/O Supply Input” pins of the MPC564xA processor are powered by 5V 2+3 The “I/O Supply Input” pins of the MPC564xA processor are powered by 3.3V Jumper Setting Effect
xPC564A EVB User Manual 39 J20 – 5V Voltage Source Controls whether the voltage source for 5V on the MPC564xA processor is provided by the motherboard or by the 5V external source on the Mini- Module. J21 – VDDEH Voltage Selector Controls whether the voltage provided to the VDDEH pins on the MPC564xA processor is 3.3V or 5V. 1+2 (default) 3.3V is provided to the MPC564xA processor by the motherboard 2+3 3.3V is provided to the MPC564xA processor by the 5V external source on the xPC564A Mini‐Module Jumper Setting Effect 1+2 (default) 5V is provided to the MPC564xA processor by the motherboard 2+3 5V is provided to the MPC564xA processor by the 5V external source on the xPC564A Mini‐Module Jumper Setting Effect 1+2 (default) 3.3V is provided to the VDDEH pins 2+3 5V is provided to the VDDEH pins
40 xPC564A EVB User Manual J24 – Internal VDD enable Controls whether power is provided to the “Internal Logic Supply Input” pins on the MPC564xA processor.
4.3 System Clock Configuration
The xPC564A Mini-Modules support the usage of crystal clock sources as well as external clock sources. J16 – Crystal clock source enable Both of the jumpers below need to be installed to enable the crystal clock source. J11 – External clock source enable Jumper Setting Effect On (default) MPC564xA Internal Logic Supply Input pins are connected to 1.2V Off MPC564xA Internal Logic Supply Input pins are unpowered Jumper Setting Effect 1+2 (default) The MPC564xA “EXTAL” signal is connected to the crystal clock source on the xPC564A Mini‐Module 3+4 (default) The MPC564xA “XTAL” signal is connected to the crystal clock source on the xPC564A Mini‐Module
xPC564A EVB User Manual 41 The xPC564A Mini-Module contains a footprint for an SMA connector, which can be used to provide an external clock source to the system. Figure 4-2: System Clock schematic
4.4 General Configuration
J13 – Reset Enable A RESET push button on the xPC564A Mini-Module can be used to reset the Jumper Setting Effect On The MPC564xA “EXTAL” signal is connected to the SMA connector on the xPC564A Mini‐Module Off (default) The SMA connector on the xPC564A Mini‐Module is disconnected from the processor
42 xPC564A EVB User Manual processor. Figure 4-3: Reset circuitry schematic
4.5 LEDs
There are two user LEDs available on the xPC564A Mini-Module. All LEDs are active low. J12 – LEDs Enable Controls whether the LEDs on the xPC564A Mini-Module are connected to I/ O pins of the processor. The jumpers can be removed and wires can be used Jumper Setting Effect On (default) The RESET button on the xPC564A Mini‐Module is enabled Off The RESET button on the xPC564A Mini‐Module is disabled
xPC564A EVB User Manual 43 to connect each LED to any processor I/O pin, if desired. Figure 4-4: LEDs circuitry schematic
4.6 Buttons
There are two user buttons available on the xPC564A Mini-Module. J15 – Buttons Enable Controls whether the buttons on the xPC564A Mini-Module are connected to I/O pins of the MPC564xA processor. The jumpers can be removed and wires can be used to connect each button to any processor I/O pin, if desired. Jumper Setting Effect 1+2 (default on) LED1 connected to eMIOS16 on the MPC564xA processor 3+4 (default on) LED2 connected to eMIOS17 on the MPC564xA processor Jumper Setting Effect 1+2 (default on) S1 connected to eMIOS18 on the MPC564xA processor
44 xPC564A EVB User Manual Figure 4-5: Buttons circuitry schematic
4.7 External SRAM configuration
There is an external SRAM module (U9) on the xPC564xA Mini-Module which is able to be configured for byte-write. J25 – Byte‐Write A Enable Controls whether Byte-Write A Enable is connected to ADDR13 of the MPC564xA processor or ground. 3+4 (default on) S2 connected to eMIOS19 on the MPC564xA processor Jumper Setting Effect 1+2 Byte ‐Write A Enable is connected to ADDR13 of the MPC564xA processor. 2+3 Byte ‐Write A Enable is connected to Ground.
xPC564A EVB User Manual 45 J26 – Byte‐Write B Enable Controls whether Byte-Write B Enable is connected to ADDR14 of the MPC564xA processor or ground. J27 – ADDR13 Controls whether ADDR13 of the MPC564xA processor is connected to the external SRAM module (U9). J28 – ADDR14 enable Controls whether ADDR14 of the processor is connected to the external SRAM module (U9). Jumper Setting Effect 1+2 Byte ‐Write B Enable is connected to ADDR14 of the MPC564xA processor 2+3 Byte ‐Write B Enable is connected to ground. Jumper Setting Effect On ADDR13 is connected to external SRAM Off ADDR13 is not connected to the external SRAM. Jumper Setting Effect On ADDR14 is connected to the external SRAM Off ADDR14 is not connected to the external SRAM
46 xPC564A EVB User Manual Figure 4-6: External SRAM schematic
xPC564A EVB User Manual 47 5 xPC564AADPT208S / xPC5 64AADPT176S HARDWARE & JUMPER SETTINGS
5.1 Boot Configuration
The following jumpers affect the operation of the processor as it initially comes out of the reset state: J7 – BOOTCFG Configuration Controls whether the processor boots from internal FLASH or from a serial interface (CAN, SCI) J8 – PLLREF Configuration Controls the clock source the processor uses: a crystal source or an external source J9 – WKPCFG Configuration Controls whether specified eTPU and eMIOS pins on the processor are configured as a weak pull-up or a weak pull-down when the processor comes Jumper Setting Effect 1+2 The MPC564xA processor uses serial boot mode 2+3 (default) The MPC564xA processor uses internal boot mode Jumper Setting Effect 1+2 (default) The MPC564xA processor uses a crystal clock source 2+3 The MPC564xA processor uses an external clock source
48 xPC564A EVB User Manual out of reset Figure 5-1: Boot Configuration Jumpers
5.2 Power Configuration
When the xPC564A Mini-Module is plugged into the xPC56XXMB motherboard, power is supplied directly by the motherboard. In this setup, the external power supply input available on the Mini-Module should NOT be used. When the xPC564A Mini-Module is used as a stand-alone board, an external 5V power supply must be used. Jumper Setting Effect 1+2 Pins are configured as weak pull‐up 2+3 (default) Pins are configured as weak pull‐down
xPC564A EVB User Manual 49 The following jumpers affect the power supply pins of the MPC564xA processor: J3 – VRH enable Controls whether power is provided to the Voltage Reference High (VRH) input pin used by the eQADC module on the MPC564xA processor. J4 – VSTBY Configuration J14 – I/O Supply Input Enable Controls whether power is provided to the “I/O Supply Input” pins on the MPC564xA processor. Jumper Setting Effect On (default) The VRH pin is connected to 5V or 3.3V power (determined by J18) Off The VRH pin is left disconnected Jumper Setting Effect On (default) The MPC564xA “VSTBY” pin is pulled down to GND Off The MPC564xA “VSTBY” pin is only connected to a 100nF bypass capacitor. External 1V supply should be provided to this pin. Jumper Setting Effect
50 xPC564A EVB User Manual J15 – Internal VDD enable Controls whether power is provided to the “Internal Logic Supply Input” pins on the MPC564xA processor. J16 – VDDE12 Voltage Configuration (xPC564AADPT176S only) Controls whether power is provided to the “VDDE12” pins on the MPC564xA processor. On (default) MPC564xA I/O Supply Input pins are connected to 3.3V or 5V (determined by J18) Off MPC564xA I/O Supply Input pins are unpowered Jumper Setting Effect On (default) MPC564xA Internal Logic Supply Input pins are connected to 1.2V Off MPC564xA Internal Logic Supply Input pins are unpowered Jumper Setting Effect On MPC564xA VDDE12 pins are connected to 3.3V Off (default) MPC564xA VDDE12 pins are only connected to bypass capacitors
xPC564A EVB User Manual 51 J17 – Debug Ports Power Configuration Controls whether the power pins on the debug ports (VDDE7 on the 14-pin JTAG port and VREF on the 28-pin Mictor port) are connected to 3.3V or 5V. J18 – Processor I/O Voltage Configuration Sets the voltage level applied to the I/O Supply Input pins of the MPC564xA processor. J19 – Voltage Regulator Configuration Controls whether power is provided to the voltage regulator and LVI block. . Jumper Setting Effect 1+2 The power pins on the debug ports are connected to 5V 2+3 (default) The power pins on the debug ports are connected to 3.3V Jumper Setting Effect 1+2 (default) The “I/O Supply Input” pins of the MPC564xA processor are powered by 5V 2+3 The “I/O Supply Input” pins of the MPC564xA processor are powered by 3.3V Jumper Setting Effect On (default) The regulator on the MPC564xA processor is powered
52 xPC564A EVB User Manual CT1 – VRL enable Controls whether ground is provided to the Voltage Reference Low (VRL) input pin used by the eQADC module on the MPC564xA processor. CT2 – VRC33 Configuration Controls whether the VRC33 pin of the MPC564xA processor is connected to 3.3V. CT3 – VDDE7 3.3V Configuration (xPC564AADPT208S only) This cut trace, along with CT5, determines whether the VDDE7 pins are Off The regulator on the MPC564xA processor is unpowered, external regulation and low‐voltage control must be supplied. Jumper Setting Effect Connected (default) The VRL pin is connected to ground Disconnected The VRL pin is left disconnected Jumper Setting Effect Connected The VRC33 pin is connected to 3.3V (not recommended by the MPC564xA reference manual) Disconnected (default) The VRC33 pin is connected only to a bypass capacitor
xPC564A EVB User Manual 53 powered by external 3.3V or by the 3.3V VRC33 voltage regulator output from the MPC564xA processor. When the Mini-Module is attached to the xPC56XXMB motherboard, the 3.3V external power is directly derived from the motherboard itself. When the Mini- Module is operated as a stand-alone unit, the 3.3V power is derived from the voltage supply that is powering the Mini-Module. Note that if the Mini-Module is powered by 5V instead of 3.3V, the 3.3V will be unavailable to power VDDE7. Jumper J18 should be set correctly to prevent damage. CT4 – VDDREG 5V Configuration (xPC564AADPT176S only) This cut trace determines whether the VDDREG pin is powered by 5V from the xPC56XXMB motherboard, or dictated by jumpers J18 and J19 CT5 – VDDE7 5V Configuration (xPC564AADPT208S only) This cut trace, along with CT3, determine whether the VDDE7 pins are powered by external 3.3V or by the 3.3V VRC33 voltage regulator output from Jumper Setting Effect Connected (default) VDDE7 is powered by external 3.3V Disconnected VDDE7 is not powered by external 3.3V Jumper Setting Effect Connected (default) VDDREG is powered by 5V from the xPC56XXMB motherboard Disconnected VDDREG is not powered by 5V from the xPC56XXMB motherboard and its power is instead dictated by J18 and J19
54 xPC564A EVB User Manual the MPC564xA processor. CT6 – 1.2V Power Generation Controls whether the 1.2 power supply is generated from the NPN transistor or supplied directly from the xPC56XXMB motherboard. CT8 – Mictor VEN_IO2 Configuration Controls whether the VEN_IO2 pin on the 38-pin Mictor port is connected to the BOOTCFG1 pin on the MPC564xA processor. Jumper Setting Effect Connected VDDE7 is powered by the VRC33 output from the MPC564xA processor Disconnected (default) VDDE7 is not powered by the VRC33 output from the MPC564xA processor Jumper Setting Effect Connected 1.2V power is provided directly by the xPC56XXMB motherboard Disconnected (default) 1.2V power is generated by the NPN transistor circuit on the xPC564A Mini‐Module Jumper Setting Effect Connected The VEN_IO2 pin is connected to BOOTCFG1
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5.3 System Clock Configuration
The xPC564A Mini-Modules support the usage of crystal clock sources as well as external clock sources. J10 – Crystal clock source enable Both of the jumpers below need to be installed to enable the crystal clock source. J11 – External clock source enable The xPC564A Mini-Module contains a footprint for an SMA connector, which can be used to provide an external clock source to the system. Disconnected (default) The VEN_IO2 pin is left disconnected Jumper Setting Effect 1+2 (default) The MPC564xA “EXTAL” signal is connected to the crystal clock source on the xPC564A Mini‐Module 3+4 (default) The MPC564xA “XTAL” signal is connected to the crystal clock source on the xPC564A Mini‐Module Jumper Setting Effect On The MPC564xA “EXTAL” signal is connected to the SMA connector on the xPC564A Mini‐Module Off (default) The SMA connector on the xPC564A Mini‐Module is disconnected from the processor
56 xPC564A EVB User Manual Figure 5-2: System Clock Schematic
5.4 General Configuration
J13 – Reset Enable A RESET push button on the xPC564A Mini-Module can be used to reset the processor. Jumper Setting Effect On (default) The RESET button on the xPC564A Mini‐Module is enabled Off The RESET button on the xPC564A Mini‐Module is disabled
xPC564A EVB User Manual 57 Figure 5-3: Reset circuitry schematic
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6 DEBUGGING/PROGRA MMING xPC564A EVB
P&E provides hardware and software tools for debugging and programming the xPC564A EVB system. P&E’s USB-ML-PPCNEXUS and Cyclone MAX offer two effective hardware solutions, depending on your needs. The USB-ML-PPCNEXUS is a development tool that will enable you to debug your code and program it onto your target. The Cyclone MAX is a more versatile and robust development tool with advanced features and production programming capabilities, as well as Ethernet support. More information is available below to assist you in choosing the appropriate development tool for your needs.
6.1 Hardware Solutions At A Glance
The USB-ML-PPCNEXUS offers an affordable and compact solution for your development needs, and allows debugging and programming to be accomplished simply and efficiently. Those doing rapid development will find the USB-ML-PPCNEXUS easy to use and fully capable of fast-paced debugging and programming. The Cyclone MAX is a more complete solution designed for both development and production. The Cyclone MAX features multiple communications interfaces (including USB, Ethernet, and Serial), stand-alone programming functionality, high speed data transfer, a status LCD, and many other advanced capabilities. Below is an overview of the features and intended use of the USB-ML- PPCNEXUS and Cyclone MAX.
6.1.1 USB-ML-PPCN EXUS Key Features
- Programming and debu gging capabilities
- Compact and lightweight
- Communication via USB 2.0
- Supported by P&E software and Freescale’s CodeWarrior
6.1.2 Cyclone MAX Key Features
- Advanced programming and debugging capabilities, including:
xPC564A EVB User Manual 59
- PC-Controlled and User-Controlled Stand-Alone Operation
- Interactive Programming via Host PC
- In-Circuit Debugging, Programming, and Testing
- Compatible with Freescale’s Cold FireV2/3/4, PowerPC 5xx/8xx/55xx/ 56xx, and ARM7 microcontroller families
- Communication via USB, Serial, and Ethernet Ports
- Multiple image storage
- LCD screen menu interface
- Supported by P&E software and Freescale’s CodeWarrior
6.2 Working With P&E’s USB-ML-PPCNEXUS
Figure 6-1: P&E’s USB-ML-PPCNEXUS
6.2.1 Product Features & Implementation
P&E’s USB-ML-PPCNEXUS Interface (USB-ML-PPCNEXUS) connects your target to your PC and allows the PC access to the debug mode on Freescale’s PowerPC 5xx/8xx/55xx/56xx microcontrollers. It connects between a USB port on a Windows 2000/XP/2003/Vista machine and a standard 14-pin JTAG/Nexus connector on the target. By using the USB-ML-PPCNEXUS Interface, the user can take advantage of the background debug mode to halt normal processor execution and use a PC to control the processor. The user can then directly control the target’s execution, read/write registers and memory values, debug code on the processor, and program internal or external FLASH memory devices. The USB-ML-PPCNEXUS enables you to debug, program, and test your code on your board.
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6.2.2 Software
The USB-ML-PPCNEXUS Interface works with Codewarrior as well as P&E’s in-circuit debugger and flash programmer to allow debug and flash programming of the target processor. P&E’s USB-ML-PPCNEXUS Development Packages come with the USB-ML-PPCNEXUS Interface, as well as flash programming software, in-circuit debugging software, Windows IDE, and register file editor.
6.3 Working With P&E’s Cyclone MAX
Figure 6-2: P&E’s Cyclone MAX
6.3.1 Product Features & Implementation
P&E’s Cyclone MAX is an extremely flexible tool designed for debugging, testing, and in-circuit flash programming of Freescale’s ColdFireV2/3/4, PowerPC 5xx/8xx/55xx/56xx, and ARM7 microcontrollers. The Cyclone MAX connects your target to the PC via USB, Ethernet, or Serial Port and enables you to debug your code, program, and test it on your board. After development is complete the Cyclone MAX can be used as a production tool on your manufacturing floor. For production, the Cyclone MAX may be operated interactively via Windows- based programming applications as well as under batch or .dll commands from a PC. Once loaded with data by a PC it can be disconnected and operated manually in a stand-alone mode via the LCD menu and control buttons. The Cyclone MAX has over 3Mbytes of non-volatile memory, which allows the on-board storage of multiple programming images. When connected to a PC for programming or loading it can communicate via the ethernet, USB, or serial interfaces.
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6.3.2 Software
The Cyclone MAX comes with intuitive configuration software and interactive programming software, as well as easy to use automated control software. The Cyclone MAX also functions as a full-featured debug interface, and is supported by Freescale’s CodeWarrior as well as development software from P&E. P&E’s Cyclone MAX is also available bundled with additional software as part of various Development Packages. In addition to the Cyclone MAX, these Development Packages include in-circuit debugging software, flash programming software, a Windows IDE, and register file editor.
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