XP4NAR85CMT

XP4NAR85CMT YAGEO | Alldatasheet

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Technical content

N-CHANNEL ENHANCEMENT MODE POWER MOSFET ▼ 100% Rg & UIS Test BVDSS 40V ▼ Simple Drive Requirement RDS(ON) 0.85mΩ ▼ Ultra Low On-resistance ▼ RoHS Compliant & Halogen-Free

Description

Absolute Maximum Ratings@Tj=25oC(unless otherwise specified) Symbol Units VDS V VGS V ID@TC=25℃ A ID@TC=25℃ A ID@TA=25℃ A ID@TA=70℃ A IDM A PD@TC=25℃ W PD@TA=25℃ W EAS Single Pulse Avalanche Energy5 mJ TSTG ℃ TJ ℃ Symbol Value Unit Rthj-c Maximum Thermal Resistance, Junction-case 1.2 ℃/W Rthj-a Maximum Thermal Resistance, Junction-ambient 3 25 ℃/W Drain Current, VGS @ 10V3 Operating Junction Temperature Range Drain Current, VGS @ 10V4 Parameter Drain-Source Voltage Gate-Source Voltage Drain Current, V GS @ 10V3 Drain Current, VGS @ 10V4(Silicon Limited) Parameter 400 Storage Temperature Range 104Total Power Dissipation 180 Total Power Dissipation3 Thermal Data Pulsed Drain Current1 61.4 202311272YAGEO -55 to 150 -55 to 150 Halogen-Free Product +20 280 100 Rating XP4NAR85C series are innovated design and silicon process technology to achieve the lowest possible on-resistance and fast switching performance. It provides the designer with an extreme efficient device for use in a wide range of power applications. The PMPAK ® 5x6 package is special for DC-DC converters application and the foot print is compatible with SO-8 with backside heat sink and lower profile. S S S G PMPAK ® 5x6 D D D D G D S

Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage V GS=0V, ID=250uA 40 - - V RDS(ON) Static Drain-Source On-Resistance2 VGS=10V, ID=20A - - 0.85 m Ω VGS=4.5V, ID=20A - - 1.5 m Ω VGS(th) Gate Threshold Voltage V DS=VGS, ID=250uA 1.2 - 2.5 V gfs Forward Transconductance V DS=5V, ID=20A - 110 - S IDSS Drain-Source Leakage Current VDS=32V, VGS=0V - - 10 uA IGSS Gate-Source Leakage V GS=+20V, VDS=0V - - + 0.1 uA Qg Total Gate Charge I D=20A - 120 192 nC Qgs Gate-Source Charge V DS=20V - 18 - nC Qgd Gate-Drain ("Miller") Charge V GS=10V - 32 - nC td(on) Turn-on Delay Time V DS=20V - 14 - ns tr Rise Time I D=20A - 50 - ns td(off) Turn-off Delay Time R G=1Ω -5 5- ns tf Fall Time V GS=10V - 22 - ns Ciss Input Capacitance V GS=0V - 5700 9120 pF Coss Output Capacitance V DS=30V - 1300 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 110 - pF Rg Gate Resistance f=1.0MHz - 1.5 3 Ω Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward On Voltage2 IS=20A, VGS=0V - - 1.2 V trr Reverse Recovery Time I S=20A, VGS=0V, - 57 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 70 - nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse test 3.Surface mounted on 1 in2 copper pad of FR4 board, t <10sec ; 60oC/W at steady state. 4.Package limitation current is 100A . 5.Starting Tj=25oC , VDD=30V , L=0.1mH , RG=25Ω THIS PRODUCT IS SENSITIVE TO ELECTROSTATIC DISCHARGE, PLEASE HANDLE WITH CAUTION. XSEMI DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. XSEMI RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. USE OF THIS PRODUCT AS A CRITICAL COMPONENT IN LIFE SUPPORT, AUTOMOTIVE OR OTHER SIMILAR SYSTEMS IS NOT AUTHORIZED.

0.95mΩ Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage v.s. Reverse Diode Junction Temperature 160 240 320 400 01234 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) 10V 7.0V 6.0V 5.0V V GS = 4.0V T C =25 o C 120 160 200 01234 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C = 150o C 10V 7.0V 6.0V 5.0V V GS = 4.0V 2468 1 0 V GS , Gate-to-Source Voltage (V) RDS(ON) (m I D =2 0A T C =25 o C 0.4 0.8 1.2 1.6 2.0 -100 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D =20A V GS =10V 0.0 0.4 0.8 1.2 1.6 2.0 -100 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized VGS(th) 0.1 100 V SD , Source-to-Drain Voltage (V) IS(A) T j =25 o CT j =150 o C I D =250uA

0.95mΩ Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Drain Current v.s. Case Fig 12. Transfer Characteristics Temperature 0 30 60 90 120 150 Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) I D =2 0A V DS =20V 2000 4000 6000 8000 10000 12000 1 1 01 92 83 74 6 V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz C iss C oss C rss 0.01 0.1 t , Pulse Width (s) Normalized Thermal Response (Rthjc) PDM Duty factor = t/T Peak Tj = PDM x Rthjc + Tc t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse 0.1 100 1000 0.01 0.1 1 10 100 V DS , Drain-to-Source Voltage (V) ID (A) T C =25 o C Single Pulse 10us 100us 1ms 10ms DC 120 180 240 300 25 50 75 100 125 150 T C , Case Temperature ( o C ) ID , Drain Current (A) Limited by package 120 160 200 0123456 V GS , Gate-to-Source Voltage (V) ID , Drain Current (A) T j =150 o C T j =25 o C V DS =5V Operation in this area limited by RDS(ON) T j =-55 o C

0.95mΩ Fig 13. Normalized BVDSS v.s. Junction Fig 14. Total Power Dissipation Temperature Fig 15. Typ. Drain-Source on State Resistance 100 120 0 50 100 150 T C , Case Temperature( o C) PD, Power Dissipation(W) 0.4 0.8 1.2 1.6 -100 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized BVDSS I D =1mA 0 20 40 60 80 100 120 140 I D , Drain Current (A) RDS(ON) (m T j =25 o C 4.5V V GS =10V

Date Code (YWWSSS) Y：Last Digit Of The Year WW：Week SSS：Sequence Part Number 4NAR85C YWWSSS

A 0.90 1.10 1.30 b 0.33 0.41 0.51 C 0.254(Ref.) D1 4.80 4.90 5.10 D2 3.61 4.00 4.40 E 5.80 6.03 6.25 E1 (Ref.) 5.60 5.75 5.90 E2 (Ref.) 3.30 3.55 3.80 e H 0.35 － 0.90 L 0.35 0.55 0.75 L1 0.06 0.13 0.20 0° － 12° 1.All dimension are in millimeters. 2.Dimension does not include burrs and mold flash/protrusions. 3.The outline schematic is not to scale and slightly different from the actual product appearance. Draw No. M1-MT-8-EIFMRL-G-v08 Package Outline : PMPAK 5x6

1.27 BSC

α(Ref.) BACKSIDE VIEW b α(Reference) E1 E L1e H K L C A

(E-TYPE) PMPAK 5X6(E-TYPE) FOOTPRINT： Draw No. M1-MT-8-EIFMRL-G-v08