X9511_14 INTERSIL | Alldatasheet
Document overview
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Technical content
Single Push Button Controlled Potentiometer (XDCP™) Linear, 32 Taps, Push Button Controlled, Terminal Voltage ±5V
FEATURES
- Push button controlled
- Low power CMOS —Active current, 3mA max —Standby current, 100µA typical
- 31 resistive elements —Temperature compensated — ±20% end to end resistance range —-5V to +5V range
- 32 wiper tap points —Wiper positioned via two push button inputs —Slow and fast scan modes — AUTOSTORE ® option —Manual store option —Wiper position stored in nonvolatile memory and recalled on power-up
- 100 year wiper position data retention
- X9511W = 10kΩ
- Packages —8 Ld PDIP —8 Ld SOIC
- Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The Intersil X9511 is a push button controlled potenti- ometer that is ideal for push button controlled resis- tance trimming. The X9511 is a resistor array composed of 31 resistive elements. Between each element and at either end are tap points accessible to the wiper element. The position of the wiper element is controlled by the PU and PD inputs. The position of the wiper can be auto- matically stored in E 2 memory and then be recalled upon a subsequent power-on operation. The resolution of the X9511 is equal to the maximum resistance value divided by 31. As an example, for the X9511W (10kΩ) each tap point represents 323Ω. All Intersil nonvolatile products are designed and tested for applications requiring extended endurance and data retention.
ORDERING INFORMATION
(kΩ) TEMPERATURE RANGE (°C) PACKAGE PKG. DWG. # X9511WP X9511WP 10 0 to +70 8 Ld PDIP MDP0031 X9511WPZ (Note) X9511WP Z 0 to +70 8 Ld PDIP* (Pb-free) MDP0031 X9511WPI X9511WP I -40 to +85 8 Ld PDIP MDP0031 X9511WPIZ (Note) X9511WP Z I -40 to +85 8 Ld PDIP* (Pb-free) MDP0031 X9511WS** X9511W 0 to +70 8 Ld SOIC MDP0027 X9511WSZ* , **(Note) X9511W Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027 X9511WSI*, ** X9511W I -40 to +85 8 Ld SOIC MDP0027 X9511WSIZ*, ** (Note) X9511W Z I -40 to +85 8 Ld SOIC (Pb-free) MDP0027 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. *Add "T1" suffix for tape and reel. Add "T2" suffix for tape and reel. *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Data Sheet FN8205.3 February 2, 2007
2 FN8205.3 February 2, 2007 BLOCK DIAGRAM 5-BIT UP/DOWN COUNTER 5-BIT EEPROM MEMORY STORE AND RECALL CONTROL CIRCUITRY ONE OF THIRTY-TWO DECODER RESISTOR ARRAY VHPU TRANSFER GATES ASE VL VW PD X9511
3 FN8205.3 February 2, 2007 PIN DESCRIPTIONS VH/RH and VL/RL The high (V H/RH) and low (V L/RL) terminals of the X9511 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is - 5V and the maximum is +5V. It should be noted that the terminology of V L/RL and V H/RH are in reference to the relative position of the terminal in relation to wiper movement direction selected by the PU and PD inputs, and not the voltage potential on the terminal. PU The debounced PU input is for incrementing the wiper position. An on-chip pull-up holds the PU input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent higher tap position. PD The debounced PD input is for decrementing the wiper position. An on-chip pull-up holds the PD input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent lower tap position. ASE The debounced ASE (AUTOSTORE enable) pin can be in one of two states: VIL - AUTOSTORE is enabled. When V CC powers down, an automatic store cycle takes place. VIH - AUTOSTORE is disabled. A LOW to HIGH will initiate a manual store operation. This is for the user who wishes to connect a push button switch to this pin. For every valid push, the X9511 will store the current wiper position to the EEPROM. PIN CONFIGURATION PIN NAMES DEVICE OPERATION There are three sections of the X9511: the input control, counter and decode section; the EEPROM memory; and the resistor array. The input control section oper- ates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch, connecting a point on the resistor array to the wiper out- put. Under the proper conditions the contents of the counter can be stored in EEPROM memory and retained for future use. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an elec- tronic switch that transfers the potential at that point to the wiper. The X9511 is designed to interface directly to two push button switches for effect ively moving the wiper up or down. The PU and PD inputs increment or decrement a 5-bit counter respectively. The output of this counter is decoded to select one of the thirty-two wiper posi- tions along the resistive array. The wiper increment input, PU and the wiper decrement input, PD are both connected to an internal pull-up so that they normally remain HIGH. When pulled LOW by an external push button switch or a logic LO W level input, the wiper will be switched to the next adjacent tap position. Internal debounce circuitry prevents inadvertent switching of the wiper position if PU or PD remain LOW for less than 40ms, typical. Each of the buttons can be pushed either once for a single increment/dec- rement or continuously for a multiple increments/dec- rements. The number of increments/decrements of the wiper position depend on how long the button is being pushed. When making a continuous push, after the first second, the increment/decrement speed increases. For the first second the device will be in the slow scan mode. Then if the button is held for longer than 1 second the device will go into the fast scan mode. As soon as the button is released the X9511 will return to a standby condition. VH VCCPU PD X9511 DIP/SOIC VSS ASE VL VW SYMBOL DESCRIPTION VH/RH High Terminal VW/RW Wiper Terminal VL/RL Low Terminal VSS Ground VCC Supply Voltage PU Push Up Input PD Push Down Input ASE AUTOSTORE Enable Input X9511
5 FN8205.3 February 2, 2007 ABSOLUTE MAXIMUM RATINGS Voltage on PU, PD, and VCC Voltage on VH and VL ΔV = |VH - VL| ESD Rating Human Body Model Machine Model ANALOG CHARACTERISTICS
Electrical Characteristics
Power rating at +25°C Resolution Linearity Absolute linearity COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any ot her conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating con- ditions for extended periods may affect device reliability. Temperature Coefficient -40°C to +85°C Wiper Adjustability data changes Physical Characteristics Marking Includes Manufacturer’s Trademark Resistance Value or Code Date Code Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = [VW(n) - (n*MI + VW(0))]/MI = ±1 MI Maximum. (2) 1 Ml = Minimum Increment = R TOT/31 for resistor mode or 1MI = [VW(31) - VW(0)]/31 for voltage divider mode. (3) Relative linearity is a measure of the error in step size between taps = (VW(n+1) - VW(n) ] )/MI - 1= ±0.2 MI SYMBOL TABLE WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Lo w to High Will change from Lo w to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance X9511
6 FN8205.3 February 2, 2007 D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.) A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.) POWER-UP AND POWER-DOWN REQUIREMENTS The are no restrictions on the sequencing of V CC and the voltage applied to the potentiometer pins during power-up or power-down conditions. During power-up, the data sheet parameters for the DCP do not fully apply until 1ms after V CC reaches its final value. The VCC ramp rate spec is always in effect. Symbol Parameter Limits Unit Test ConditionsMin. Typ. (4) Max. ICC VCC active current 1 3 mA PU or PD held at VIL the other at VIH ISB Standby supply current 100 500 µA PU = PD = VIH ILI PU, PD, ASE input leakage current 10 µA V IN = VSS to VCC VIH PU, PD, ASE input HIGH voltage 2 V VlL PU, PD, ASE input LOW voltage 0.8 V RW Wiper resistance 40 100 W Wiper Current V CC/RTOT VVH VH terminal voltage -5 +5 V VVL VL terminal voltage -5 +5 V CIN(5) ASE, PU, PD input capacitance 10 pF V CC = 5V, VIN = 0V, TA = +25°C, f = 1MHz Symbol Parameter Limits UnitMin. Typ. (4) Max. tGAP Time between two separate push button events 50 µs tDB Debounce time 30 40 ms tS SLOW After debounce to wiper change on a slow mode 100 250 375 ms tS FAST Wiper change on a fast mode 25 50 90 ms tPU Power-up to wiper stable 500 µs tR VCC VCC power-up rate 0.2 50 V/ ms tASTO(5) AUTOSTORE cycle time 2 ms VASTH(5) AUTOSTORE threshold voltage 4 V VASEND(5) AUTOSTORE cycle end voltage 3.5 V RECOMMENDED OPERATING CONDITIONS Temp Min. Max. Commercial 0×C +70°C Industrial -40×C +85°C Supply Voltage Limits X9511 5V ± 10% X9511
7 FN8205.3 February 2, 2007 AUTOSTORE Cycle Timing Diagram Notes: VASTH - AUTOSTORE threshold voltage VASEND - AUTOSTORE cycle end voltage tASTO - AUTOSTORE cycle time (4) Typical values are for TA = +25°C and nominal supply voltage. (5) This parameter is periodica lly sampled and not 100% tested. Slow Mode Timing Note: (1) MI in the A.C. timing diagram refers to the minimum incremental change in the wiper voltage. Fast Mode Timing Note: (1) MI in the A.C. timing diagram refers to the minimum incremental change in the wiper voltage. VASTH VCC VASEND tASTO STORE TIME AUTOS CYCLE IN PROGRESS VOLTS (V) TIME (ms) tGAPtDB MI(1) VW PU tDB PU tS SLOW tS FAST MI(1)
1 Second
8 FN8205.3 February 2, 2007 X9511 Plastic Dual-In-Line Packages (PDIP) MDP0031 PLASTIC DUAL-IN-LINE PACKAGE SYMBOL PDIP8 PDIP14 PDIP16 PDIP18 PDIP20 TOLERANCE NOTES N 8 14 16 18 20 Reference Rev. B 2/99 NOTES: 1. Plastic or metal protrusions of 0.010” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane. 4. Dimension eB is measured wi th the lead tips unconstrained. 5. 8 and 16 lead packages have half end-leads as shown. D L A e b NOTE 5 SEATING PLANE L N PIN #1 INDEXE1
12 N / 2
E eB eA c
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8205.3 February 2, 2007 X9511 Small Outline Package Family (SO) GAUGE PLANE A1 L DETAIL X 4° ±4° SEATING PLANE e H b C 0.010 BM CA0.004 C
0.010 BM CA
B D (N/2)1 E1E NN (N/2)+1 A PIN #1 I.D. MARK h X 45° A SEE DETAIL “X” c 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 SO16 (0.150”) SO16 (0.300”) (SOL-16) SO20 (SOL-20) SO24 (SOL-24) SO28 (SOL-28) TOLERANCE NOTES N 8 14 16 16 20 24 28 Reference - Rev. L 2/01 NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M -1994