X93256 INTERSIL | Alldatasheet

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FN8188.0 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X93256 Dual Digitally Controlled Potentiometers (XDCPs™)

FEATURES

  • Dual solid-state potentiometers
  • Individual Up/Down interfaces
  • 32 wiper tap points per potentiometer —Wiper position stored in nonvolatile memory and recalled on power-up
  • 31 resistive elements per potentiometer —Temperature compensated —Maximum resistance tolerance of ± 25% —Terminal voltage, 0 to V CC
  • Low power CMOS —Active current, 200µA typical per potentiometer —Standby current, 4µA max per potentiometer
  • High reliability —Endurance 200,000 data changes per bit —Register data retention, 100 years TOTAL value = 12.5kΩ, 50kΩ
  • Packages —14-lead TSSOP

DESCRIPTION

The Intersil X93256 is a dual digitally controlled potentiometer (XDCP). The device consists of two resistor arrays, wiper switches, a control section, and nonvolatile memory. The wiper positions are controlled by individual Up/Down interfaces. A potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The position of each wiper element is controlled by a set of independent CS , U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. Each potentiometer is connected as a three-terminal variable resistor and can be used in a wide variety of applications including: – bias and gain control – LCD Contrast Adjustment BLOCK DIAGRAM 5-Bit Up/Down Counter 5-Bit Nonvolatile Memory Store and Recall Control Circuitry One of Decoder Resistor Array RH1 U/D1 INC1 CS1 Transfer Gates Thirty VCC VSS RL1 General Description Detailed Single Potentiometer Description Two Control and Memory Up/Down (U/D1 & U/D2) Increment (INC1 & INC2) Device Select (CS1 & CS2) VCC (Supply Voltage) VSS (Ground) RH1 RL1 30K RH2 RL2 RW RW1 RW2 Data Sheet March 4, 2005

2 FN8188.0 March 4, 2005 PIN CONFIGURATION X93256 ORDERING CODES Ordering Number RTOTAL Package Temperature Range X93256WV14I-2.7 12.5kΩ 14-lead TSSOP package -40°C to +85°C X93256UV14I-2.7 50kΩ 14-lead TSSOP package -40°C to +85°C VCC CS1 INC2 U/D2 RH2 VSS X93256 TSSOP RL1 *NC can be left unconnected, or connected to any voltage between VSS and VCC. CS2 INC1 U/D1 RH1 RL2 Rw1 Rw2 X93256

3 FN8188.0 March 4, 2005 PIN DESCRIPTIONS TSSOP Symbol Brief Description 1R W1 RW1. The RW1 pin of the X93256 is the wiper terminal of the first potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. 2R L1 RL1. The RH1 and RL1 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH1 and RL1 references the relative position of the terminal in relation to wiper movement direction selected by the U/D input. 3C S 1 Chip Select 1 (CS1). The first potentiometer is selected when the CS1 input is LOW. The current counter value is stored in nonvolatile memory when CS1 is returned HIGH while the INC1 input is also HIGH. After the store operation is complete, the first potentiometer of the X93256 will be placed in the low power standby mode until the first potentiometer is selected once again. 4I N C 2 Increment 2 (INC2). The INC2 input is negative-edge triggered. Toggling INC2 will move the wiper of the second potentiometer and either increment or decrement the counter in the direction indicated by the logic level on the U/D2 input. 5U / D 2 Up/Down 2 (U/D2). The U/D2 input controls the direction of the second potentiometer wiper movement and whether the counter for the second potentiometer is incremented or decremented. 6R H2 RH2. The RH2 and RL2 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH2 and RL2 references the relative position of the wiper terminal for the second potentiometer in relation to the wiper movement direction selected by the U/D2 input. 7V SS Ground. 8R W2 RW2. The RW2 pin of the X93256 is the wiper terminal of the second potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. 9R L2 RL2. The RH2 and RL2 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH2 and RL2 references the relative position of the wiper terminal for the second potentiometer in relation to the wiper movement direction selected by the U/D2 input. 10 CS 2 Chip Select 2 (CS2). The second potentiometer is selected when the CS2 input is LOW. The current counter value is stored in nonvolatile memory when CS2 is returned HIGH while the INC2 input is also HIGH. After the store operation is complete, the second potentiometer of the X93256 will be placed in the low power standby mode until the second potentiometer is selected once again. 11 V CC Supply Voltage. 12 INC 1 Increment 1(INC1). The INC1 input is negative-edge triggered. Toggling INC1 will move the wiper of the first potentiometer and either increment or decrement the counter in the direction indicated by the logic level on the U/D1 input. 13 U/D 1 Up/Down 1 (U/D1). The U/D1 input controls the direction of the first potentiometer wiper movement and whether the counter for the first potentiometer is incremented or decremented. 14 R H1 RH1. The RH1 and RL1 pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH1 and RL1 references the relative position of the wiper terminal for the first potentiometer in relation to the wiper movement direction selected by the U/D1 input. X93256

4 FN8188.0 March 4, 2005 ABSOLUTE MAXIMUM RATINGS Voltage on CS , INC, U/D, RH, RL and VCC COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating onl y; the functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not impl ied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Notes: (1) Absolute linearity is utilized to determi ne actual wiper voltage versus expected voltage = (VH(n)(actual) - VH(n)(expected)) = ±1 Ml Maximum. n = 1 .. 29 only. (2) Relative linearity is a measure of the error in step size between taps = VH(n+1) - [VH(n) + Ml] = ±0.5 Ml, n = 1 .. 29 only. (3) 1 Ml = Minimum Increment = R TOT/31. (4) Typical values are for T A = 25°C and nominal supply voltage. (5) This parameter only applies to a single potentiometer. (6) Typical parameter is guaranteed by characterization. (7) When performing multiple write operations, V CC must not decrease by more than 150mV from it’s initial value. Symbol Parameter Limits Test Conditions/NotesMin. Typ. Max. Unit RTOT End to end resistance 9.375 12.5 15.625 k Ω W option (5) 37.5 50 62.5 k Ω U option (5) VR RH, RL terminal voltages 0V CC V (5) Power rating 1m W (7) RTOTAL = 50kΩ (5) (6) Noise -120 dBV (7) Ref: 1kHz (5) (6) RW Wiper Resistance 1100 Ω (5) (6) IW Wiper Current 0.6 mA (5) (6) Resolution 3% (5) Absolute linearity(1) ±1 MI (3) VH(n)(actual) - VH(n)(expected) (5) Relative linearity(2) ±0.5 MI (3) VH(n+1) - [VH(n) + MI] (5) RTOTAL temperature coefficient ±35 ppm/°C (5) (6) CH/CL/CW Potentiometer capacitances 10/10/25 pF (6) See circuit #2 (5) RECOMMENDED OPERATING CONDITIONS Temperature Min. Max. Industrial -40 °C+ 8 5 °C Supply Voltage (VCC) L i m i t s X93256

5 FN8188.0 March 4, 2005 D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.) ENDURANCE AND DATA RETENTION A.C. CONDITIONS OF TEST Symbol Parameter Limits Unit Test ConditionsMin. Typ. (4) Max. ICC1 VCC active current (Increment) 50 250 µA CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC VCC = 3V 200 300 CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC VCC = 5V ICC2 VCC active current (Store) (EEPROM Store) 600 µA CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR VCC = 3V 1400 µA CS = VIH, U/D = VIL or VIH and INC = VIH @ max. tWR VCC = 5V ISB Standby supply current 1µ A CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VCC = 3V 4µ A CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V VCC = 5V ILI CS input leakage current ±1 µA VIN = VCC (5) ILI CS input leakage current 60 100 150 µA VCC = 3V, CS = 0 (5) ILI CS input leakage current 120 200 250 µA VCC = 5V, CS = 0 (5) ILI INC, U/D input leakage current ±1 µA VIN = VSS to VCC (5) VIH CS, INC, U/D input HIGH voltage VCC x 0.7 V CC + 0.5 V (5) VIL CS, INC, U/D input LOW voltage -0.5 V CC x 0.1 V (5) CIN(5)(7) CS, INC, U/D input capacitance 10 pF VCC = 3V, VIN = VSS, TA =2 5 ° C , f = 1MHz (6) Parameter Min. Unit Minimum endurance 200,000 Data changes per bit Data retention 100 Years Input pulse levels 0V to 3V Input rise and fall times 10ns Input reference levels 1.5V Test Circuit #1 Circuit #2 SPICE Macro Model Test Point VH/RH CH CL 10pF 10pF RH RTOTAL CW 25pF RL X93256

6 FN8188.0 March 4, 2005 A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified) POWER UP AND DOWN REQUIREMENTS There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH and VL, i.e., VCC ≥ VH,VL. The VCC ramp rate spec is always in effect. A.C. TIMING Symbol Parameter Limits UnitMin. Typ. (6) Max. tCl CS to INC setup 100 ns tlD INC HIGH to U/D change 100 ns tDI U/D to INC setup 100 ns tlL INC LOW period 1µ s tlH INC HIGH period 1µ s tlC INC Inactive to CS inactive 1µ s tCPH CS Deselect time (NO STORE) 250 ns tCPH CS Deselect time (STORE) 10 ms tCYC INC cycle time 2µ s tR, tF(6) INC input rise and fall time 500 µs tR VCC(6) VCC power-up rate 0.2 10,000 V/ms tWR Store cycle 51 0 m s CS INC U/D tCI tIL tIH tCYC tID tDI tIC tCPH tF tR 10% 90% 90% (Store) X93256

7 FN8188.0 March 4, 2005 PIN DESCRIPTIONS (In the text, CS, INC, U/D, RH, RW, and RL are used to refer to either CS1 or CS2, etc. Note: These signals can be applied independently or at the same time.) RH and RL The RH and RL pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is V SS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the U/D input per potentiometer. RW The R W pin of the X93256 is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical potentiometer Up/Down (U/D) The U/D input controls the direction of a single potentiometer’s wiper movement and whether the counter is incremented or decremented. Increment (INC The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the pertatining potentiometer’s counter in the direction indicated by the logic level on the pertaining potentiometer’s U/D input. Chip Select (CS) A potentiometer is selected when the pertaining CS input is LOW. Its current counter value is stored in nonvolatile memory when the pertaining CS is returned HIGH while the pertaining INC input is also HIGH. After the store operation is complete the affected potentiometer will be placed in the low power standby mode until the potentiometer is selected once again. PRINCIPLES OF OPERATION There are multiple sections for each potentiometer in the X93256: an input control, a counter and decode section; the nonvolatile memory; and a resistor array. Each input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. Each resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the connection at that point to the wiper. Each wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. If the wiper is moved several positions, multiple taps are connected to the wiper for t IW (INC to VW change). The 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory for each potentiometer. When power is restored, the contents of the memory are recalled and each wiper is set to the value last stored. X93256

8 FN8188.0 March 4, 2005 INSTRUCTIONS AND PROGRAMMING The INC, U/D and CS inputs control the movement of the pertaining wiper along the resistor array. With CS set LOW the pertaining potentiometer is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a five bit counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever each CS transitions HIGH while the pertaining INC input is also HIGH. In order to avoid an accidental store during power-up, each CS must go HIGH with VCC during initial power-up. When left open, each CS pin is internally pulled up to VCC by an internal 30K resistor. The system may select the X93256, move any wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. In order to recall the stored position of the wiper on power-up, the CS pin must be held HIGH. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, or other system trim requirements. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move each wiper up and down until the proper trim is attained. MODE SELECTION SYMBOL TABLE CS INC U/D Mode LH Wiper Up LL Wiper Down HX Store Wiper Position HXX Standby Current LX No Store, Return to Standby LH Wiper Up (not recommended) LL Wiper Down (not recommended) WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Lo w to High Will change from Lo w to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance X93256

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8188.0 March 4, 2005 TSSOP PACKAGING INFORMATION NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 14-Lead Plastic, TSSOP, Package Code V14 See Detail “A” .031 (.80) .041 (1.05) .169 (4.3) .025 (.65) BSC .193 (4.9) .200 (5.1) .002 (.05) .006 (.15) .041 (1.05) .0075 (.19) .0118 (.30) 0° - 8° .010 (.25) .019 (.50) .029 (.75) Gage Plane Seating Plane Detail A (20X) X93256