X9313 INTERSIL | Alldatasheet
Document overview
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- PDF pages: 11
Technical content
Features
- Solid-state potentiometer
- 3-wire serial interface
- 32 wiper tap points - Wiper position stored in nonvolatile memory and recalled on power-up
- 31 resistive elements - Temperature compensated - End to end resistance range ± 20% - Terminal voltages, -5V to +5V
- Low power CMOS CC = 3V or 5V - Active current, 3mA max. - Standby current, 500µA max.
- High reliability - Endurance, 100,000 data changes per bit - Register data retention, 100 years TOTAL values = 1kΩ, 10kΩ, 50kΩ
- Packages - 8 Ld SOIC, MSOP and DIP
- Pb-free plus anneal available (RoHS compliant) Block Diagrams 5-BIT NONVOLATILE MEMORY STORE AND RECALL CONTROL CIRCUITRY ONE OF DECODER RESISTOR ARRAY RH/VHU/D INC CS TRANSFER GATES THIRTY VCC VSS RL/VL RW/VW CONTROL UP/DOWN VCC (SUPPLY VOLTAGE) VSS (GROUND) RH/VH RW/VW RL/VL GENERAL DETAILED TWO (U/D) INCREMENT (INC) DEVICE SELECT (CS) AND MEMORY 5-BIT UP/DOWN COUNTER Data Sheet September 9, 2005
2 FN8177.2 September 9, 2005
Ordering Information
(V) RTOTAL (kΩ) TEMPERATURE RANGE (°C) PACKAGE X9313UM* 313U 4.5 to 5.5 50 0 to 70 8 Ld MSOP X9313UMZ* (Note) DDC 0 to 70 8 Ld MSOP (Pb-free) X9313UMI* 13UI -40 to 85 8 Ld MSOP X9313UMIZ* (Note) DDB -40 to 85 8 Ld MSOP (Pb-free) X9313UP X9313UP 0 to 70 8 Ld PDIP X9313UPI X9313UP I -40 to 85 8 Ld PDIP X9313US* X9313U 0 to 70 8 Ld SOIC X9313USZ* (Note) X9313U Z 0 to 70 8 Ld SOIC (Pb-free) X9313USI* X9313U I -40 to 85 8 Ld SOIC X9313USIZ* (Note) X9313U Z I -40 to 85 8 Ld SOIC (Pb-free) X9313USM 0 to 70 8 Ld SOIC X9313WM* 313W 10 0 to 70 8 Ld MSOP X9313WMZ* (Note) DDF 0 to 70 8 Ld MSOP (Pb-free) X9313WMI* 13WI -40 to 85 8 Ld MSOP X9313WMIZ* (Note) DDE -40 to 85 8 Ld MSOP (Pb-free) X9313WP X9313WP 0 to 70 8 Ld PDIP X9313WPI X9313XP I -40 to 85 8 Ld PDIP X9313WS* X9313WS 0 to 70 8 Ld SOIC X9313WSZ* (Note) X9313W Z 0 to 70 8 Ld SOIC (Pb-free) X9313WSI* X9313WS I -40 to 85 8 Ld SOIC X9313WSIZ* (Note) X9313WS Z I -40 to 85 8 Ld SOIC (Pb-free) X9313WSMT2 X9313WS M 0 to 70 8 Ld SOIC Tape and Reel X9313ZM* 313Z 0 to 70 8 Ld MSOP X9313ZMZ* (Note) DDJ 0 to 70 8 Ld MSOP (Pb-free) X9313ZMI* 13ZI 1 -40 to 85 8 Ld MSOP X9313ZMIZ* (Note) DDH -40 to 85 8 Ld MSOP (Pb-free) X9313ZP X9313ZP 0 to 70 8 Ld PDIP X9313ZPI X9313ZP I -40 to 85 8 Ld PDIP X9313ZS* X9313ZS 0 to 70 8 Ld SOIC X9313ZSZ* (Note) X9313 Z 0 to 70 8 Ld SOIC (Pb-free) X9313ZSI* X9313ZS I -40 to 85 8 Ld SOIC X9313ZSIZ* (Note) X9313ZS Z I -40 to 85 8 Ld SOIC (Pb-free) X9313
3 FN8177.2 September 9, 2005 X9313UM-3* 13UD 3 to 5.5 50 0 to 70 8 Ld MSOP X9313UMZ-3* (Note) DDD 0 to 70 8 Ld MSOP (Pb-free) X9313UMI-3* 13UE -40 to 85 8 Ld MSOP X9313UMIZ-3* (Note) 13UE Z -40 to 85 8 Ld MSOP (Pb-free) X9313UP-3 X9313UP D 0 to 70 8 Ld PDIP X9313US-3* X9313U D 0 to 70 8 Ld SOIC X9313USZ-3* (Note) X9313U Z D 0 to 70 8 Ld SOIC (Pb-free) X9313WM-3* 13WD 10 0 to 70 8 Ld MSOP X9313WMZ-3* (Note) DDG 0 to 70 8 Ld MSOP (Pb-free) X9313WMI-3* 13WE -40 to 85 8 Ld MSOP X9313WMIZ-3* (Note) 13WE Z -40 to 85 8 Ld MSOP (Pb-free) X9313WP-3 X9313WP D 0 to 70 8 Ld PDIP X9313WS-3* X9313W D 0 to 70 8 Ld SOIC X9313WSZ-3* (Note) X9313W Z D 0 to 70 8 Ld SOIC (Pb-free) X9313ZM-3* 13ZD 1 0 to 70 8 Ld MSOP X9313ZMZ-3* (Note) DDK 0 to 70 8 Ld MSOP (Pb-free) X9313ZMI-3* 13ZE -40 to 85 8 Ld MSOP X9313ZMIZ-3* (Note) 13ZE Z -40 to 85 8 Ld MSOP (Pb-free) X9313ZP-3 X9313ZP D 0 to 70 8 Ld PDIP X9313ZS-3* X9313Z D 0 to 70 8 Ld SOIC X9313ZSZ-3* (Note) X9313Z Z D 0 to 70 8 Ld SOIC (Pb-free) X9313ZSI-3* X9313Z E -40 to 85 8 Ld SOIC X9313ZSIZ-3* (Note) X9313Z Z E -40 to 85 8 Ld SOIC (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. *Add "T1" suffix for tape and reel. Ordering Information (Continued) PART NUMBER PART MARKING VCC RANGE (V) RTOTAL (kΩ) TEMPERATURE RANGE (°C) PACKAGE X9313
the voltage potential on the terminal. wiper within the array is determined by the control inputs. and whether the counter is incremented or decremented. a significant amount if the wiper is moved several positions. and the wiper is set to the value last stored. one of thirty two wiper positions along the resistive array. TABLE 1. PIN NAMES
recalled the previously stored data. parameter changes due to temperature drift, etc. may be changed while CS remains LOW. move the wiper up and down until the proper trim is attained. TABLE 2. MODE SELECTION
6 FN8177.2 September 9, 2005 Absolute Maximum Ratings Recommended Operating Conditions Voltage on CS, INC, U/D, and Voltage on VH, VL, VW ∆V = |VH - VL|: I Temperature: Supply Voltage (VCC): operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Potentiometer Characteristics Over recommended operating conditions unless otherwise stated. SYMBOL PARAMETER TEST CONDITIONS/NOTES LIMITS UNITMIN TYP MAX End-to-end resistance tolerance ±20 % VVH VH terminal voltage -5 +5 V VVL VL terminal voltage -5 +5 V Power rating R TOTAL ≥ 10kΩ 10 mW RTOTAL ≥ 1kΩ 16 mW RW Wiper resistance I W = 1mA, VCC = 5V 40 100 W IW Wiper current ±4.4 mA Noise Ref: 1kHz -120 dBV Resolution 3% Absolute linearity (Note 1) R W(n)(actual) - RW(n)(expected) ±1 MI (Note 3) Relative linearity (Note 2) R W(n+1) - (RW(n)+MI) ±0.2 MI (Note 3) RTOTAL temperature coefficient ±300 ppm/°C Ratiometric temperature coefficient ±20 ppm/°C CH/CL/CW Potentiometer capacitances See Circuit #3 10/10/25 pF NOTES: 1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (VW(n)(actual) - VW(n)(expected)) = ±1 MI maximum. 2. Relative linearity is a measure of the error in step size between taps = R W(n+1) - (RW(n) + MI) = ±0.2 MI. 3. 1 MI = minimum increment = R TOT / 31. X9313
DC Operating Characteristics Over recommended operating conditions unless otherwise stated.
- Typical values are for TA = 25°C and nominal supply voltage.
- This parameter is periodically sampled and not 100% tested.
FIGURE 1. TEST CIRCUIT #1 FIGURE 2. TEST CI RCUIT #2 FIGURE 3. CIRCUIT #3 SPICE MACRO
8 FN8177.2 September 9, 2005 Power-Up and -Down Requirements The recommended power-up sequence is to apply VCC/VSS first, then the potentiometer voltages. During power-up, the data sheet parameters for the DCP do not fully apply until 1 millisecond after V CC reaches its final value. The VCC ramp spec is always in effect. In order to prevent unwanted tap position changes, or an inadvertent store, bring the CS and INC high before or concurrently with the VCC pin on power- up. AC Timing AC Operating Characteristics Over recommended operating conditions unless otherwise stated. SYMBOL PARAMETER LIMITS UNITMIN TYP (Note 6) MAX tCI CS to INC setup 100 ns tID INC HIGH to U/D change 100 ns tDI U/D to INC setup 2.9 µs tIL INC LOW period 1 µs tIH INC HIGH period 1 µs tIC INC inactive to CS inactive 1 µs tCPH CS deselect time (STORE) 20 ms tCPH CS deselect time (NO STORE) 100 ns tIW INC to VW change 1 5 µs tCYC INC cycle time 4 µs tR, tF (Note 7) INC input rise and fall time 500 µs tPU (Note 7) Power-up to wiper stable 5µ s tR VCC (Note 7) V CC power-up rate 0.2 50 V/ms tWR Store cycle 51 0 m s NOTES: 6. Typical values are for TA = 25°C and nominal supply voltage. 7. This parameter is not 100% tested. CS INC U/D VW tCI tIL tIH tCYC tID tDI tIW MI (SEE NOTE) tIC tCPH tF tR 10% 90% 90% NOTE: MI IN THE AC TIMING DIAGRAM REFERS TO THE MINIMUM INCREMENTAL CHANGE IN THE VW OUTPUT DUE TO A CHANGE IN THE WIPER POSITION. X9313
9 FN8177.2 September 9, 2005 Applications Information Electronic digitally controlled potentiometers (XDCP) provide three powerful application advantages; (1) the variability and reliability of a solid-state potentiometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data. Basic Configurations of Electronic Potentiometers Basic Circuits VR VW/RW VR I THREE-TERMINAL POTENTIOMETER; VARIABLE VOLTAGE DIVIDER TWO-TERMINAL VARIABLE RESISTOR; VARIABLE CURRENT VH VL CASCADING TECHNIQUESBUFFERED REFERENCE VOLTAGE +5V -5V VW VREF VOUT OP-07 VW VW/RW +V +V X (a) (b) VOUT = VW/RW NONINVERTING AMPLIFIER VS VO VO = (1 + R2 / R1)VS LM308A VOLTAGE REGULATOR Iadj VO (REG) = 1.25V (1 + R2 / R1) + IADJ R2 VO (REG)VIN 317 OFFSET VOLTAGE ADJUSTMENT VS VO R2R1 100kΩ 10kΩ10kΩ 10kΩ -12V+12V TL072 COMPARATOR WITH HYSTERESIS VUL = [R1 / (R1 + R2)] VO(max) VLL = [R1 / (R1 + R2)] VO(min) –VS VO R2R1 LT311A +5V -5V (for additional circuits see AN115) X9313
10 FN8177.2 September 9, 2005 Packaging Information 0.118 ± 0.002 (3.00 ± 0.05) 0.040 ± 0.002 (1.02 ± 0.05) 0.150 (3.81) Ref. 0.193 (4.90) 0.030 (0.76) 0.036 (0.91) 0.032 (0.81) 0.007 (0.18) 0.005 (0.13) 0.008 (0.20) 0.004 (0.10) 0.0216 (0.55) 7° Typ. R 0.014 (0.36) 0.118 ± 0.002 (3.00 ± 0.05) 8-LEAD MINIATURE SMALL OUTLINE GULL WING PACKAGE TYPE M NOTE ALL DIMENSIONS IN INCHES AND (MILLIMETERS 0.220" 0.0256" Typical 0.025" Typical 0.020" Typical
8 PlacesFOOTPRINT
Ref. X9313
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8177.2 September 9, 2005 Packaging Information 0.150 (3.80) 0.158 (4.00) 0.228 (5.80) 0.019 (0.49) Pin 1 Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0.050 (1.27) 0.188 (4.78) 0.197 (5.00) 0.004 (0.19) 0.010 (0.25) 0.053 (1.35) 0.069 (1.75) (4X) 7° 0.016 (0.410) 0.037 (0.937) 0.0075 (0.19) 0.010 (0.25) 0° - 8° X 45° 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.250" 0.050"Typical 0.050" Typical 0.030" Typical