X9312 INTERSIL | Alldatasheet

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Technical content

FN8176.0 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9312 Terminal Voltage 0V to +15V, 100 Taps Digitally Controlled Potentiometer (XDCP™)

FEATURES

  • Solid-state potentiometer
  • 3-wire serial interface
  • Terminal voltage, 0 to +15V
  • 100 wiper tap points —Wiper position stored in nonvolatile memory and recalled on power-up
  • 99 resistive elements —Temperature compensated —End to end resistance range ± 20%
  • Low power CMOS CC = 5V —Active current, 3mA max. —Standby current, 1mA max.
  • High reliability —Endurance, 100,000 data changes per bit —Register data retention, 100 years TOTAL values = 10kΩ, 50kΩ, and 100kΩ
  • Packages —8-lead SOIC and DIP

DESCRIPTION

The Intersil X9312 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper swit ches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. The potentiometer is implemented by a resistor array composed of 99 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS , U/D , and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. The device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: – control – parameter adjustments – signal processing BLOCK DIAGRAM 7-Bit Up/Down Counter 7-Bit Nonvolatile Memory Store and Recall Control Circuitry One of One Decoder Resistor Array RH/VHU/D INC CS Transfer GatesHundred VCC VSS RL/VL RW/VW Control and Memory Up/Down (U/D) Increment (INC) Device Select (CS) VCC (Supply Voltage) VSS (Ground) RH/VH RW/VW RL/VL General Detailed Data Sheet March 15, 2005NOT RECOMMENDED FOR NEW DESIGNS NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc

2 FN8176.0 March 15, 2005 PIN DESCRIPTIONS RH/VH and RL/VL The high (R H/VH) and low (R L/VL) terminals of the X9312 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is 0V and the maximum is +15V. The terminology of R L/VL and R H/VH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not the voltage potential on the terminal. RW/VW Rw/Vw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper withi n the array is determined by the control inputs. The wiper terminal series resistance is typically 40Ω. Up/Down (U/D The U/D input controls the direction of the wiper movement and whether the counter is incriminated or decremented. Increment (INC The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete the X9312 will be placed in the low po wer standby mode until the device is selected once again. PIN CONFIGURATION PIN NAMES PRINCIPLES OF OPERATION There are three sections of the X9312: the input control, counter and decode section; the nonvolatile memory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 99 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a “make before break” mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for t IW (INC to VW change). The R TOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be main tained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. RH/VH VCCINC U/D X9312 DIP/SOIC VSS CS RL/VL RW/VW Symbol Description RH/VH High terminal RW/VW Wiper terminal RL/VL Low terminal VSS Ground VCC Supply voltage U/D Up/Down control input INC Increment control input CS Chip select control input X9312

3 FN8176.0 March 15, 2005 INSTRUCTIONS AND PROGRAMMING The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a seven bit counter. The output of this counter is decoded to select one of one hundred wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. The system may select the X9312, move the wiper and deselect the device without having to store the latest wiper position in n onvolatile memory. After the wiper movement is performed as described above and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a powerup/down cycle recalled the previously stored data. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, etc... The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. MODE SELECTION SYMBOL TABLE CS INC U/D Mode L H Wiper up L L Wiper down H X Store wiper position H X X Standby current L X No store, return to standby WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Lo w to High Will change from Lo w to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance X9312

4 FN8176.0 March 15, 2005 ABSOLUTE MAXIMUM RATINGS Voltage on CS , INC, U/D and VCC I COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any ot her conditions above those listed in the operational sect ions of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Notes: (1) Absolute linearity is utilized to determi ne actual wiper voltage versus expected voltage = (Vw(n)(actual) - Vw(n)(expected)) = ±1 Ml Maximum. (2) Relative linearity is a measure of the error in step size between taps = RW(n+1 - [Rw(n) + Ml] = ±0.2 Ml. (3) 1 Ml = Minimum Increment = R TOT/99. Symbol Parameter Limits Test Conditions/NotesMin. Typ. Max. Unit End to end resistance tolerance ±20 % VVH VH terminal voltage V SS 15 V V SS = 0V VVL VL terminal voltage V SS 15 V V SS = 0V Power rating 25 mW R TOTAL ≥ 10kΩ Power rating 225 mW R TOTAL = 1kΩ RW Wiper resistance 40 100 Ω IW = 1mA, VCC = 5V IW Wiper current ±4.4 mA Noise -120 dBV Ref: 1kHz Resolution 1 % Absolute linearity (1) ±1 MI (3) Rw(n)(actual) - Rw(n)(expected) Relative linearity(2) ±0.2 MI (3) Rw(n+1) - [Rw(n) + MI] RTOTAL temperature coefficient ±300 ppm/°C Ratiometric temperature coefficient ±20 ppm/°C CH/CL/CW Potentiometer capacitances 10/10/25 pF See circuit #3 RECOMMENDED OPERATING CONDITIONS Temperature Min. Max. Commercial 0°C +70°C Industrial -40°C +85°C Supply Voltage (VCC)L i m i t s X9312 5V ±10% X9312

5 FN8176.0 March 15, 2005 D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.) ENDURANCE AND DATA RETENTION Notes: (4) Typical values are for T A = 25°C and nominal supply voltage. (5) This parameter is periodically sampled and not 100% tested. A.C. CONDITIONS OF TEST Symbol Parameter Limits Unit Test ConditionsMin. Typ. (4) Max. ICC VCC active current (Increment) 1 3 mA CS = VIL, U/D = VIL or VIH and INC = 0.4V/2.4V @ max. tCYC ISB Standby supply current 500 1000 µA CS = VCC - 0.3V, U/D and INC =V SS or VCC - 0.3V ILI CS, INC, U/D input leakage current ±10 µA V IN = VSS to VCC VIH CS, INC, U/D input HIGH voltage 2 V CC + 1 V VIL CS, INC, U/D input LOW voltage -1 0.8 V CIN(5) CS, INC, U/D input capacitance 10 pF V CC = 5V, VIN = VSS, TA = 25°C, f=1 M H z Parameter Min. Unit Minimum endurance 100,000 Data changes per bit Data retention 100 Years Test Circuit #1 Test Circuit #2 Circuit #3 SPICE Macro Model Test Point VW/RW VH/RH VL/RL VS Force CurrentL VW Test Point VH/RH VW/RW VL/RL CH CL RW 10pF 10pF RH RL RTOTAL CW 25pF Input pulse levels 0V to 3V Input rise and fall times 10ns Input reference levels 1.5V X9312

6 FN8176.0 March 15, 2005 A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified) POWER-UP AND DOWN REQUIREMENTS There are no restrictions on the sequencing of V CC and the voltages applied to the potentiometer pins during power- up or power-down conditions. During power-up, the data sheet parameters for the DCP do not fully apply until 1 millisecond after VCC reaches is final value. The VCC ramp spec is always in effect. A.C. TIMING Notes: (6) Typical values are for T A = 25°C and nominal supply voltage. (7) This parameter is sample tested. (8) MI in the A.C. timing diagram refers to the minimum incremental change in the V W output due to a change in the wiper position. Symbol Parameter Limits UnitMin. Typ. 6 Max. tCl CS to INC setup 100 ns tlD INC HIGH to U/D change 100 ns tDI U/D to INC setup 1 µs tlL INC LOW period 1 µs tlH INC HIGH period 1 µs tlC INC inactive to CS inactive 1 µs tCPH CS deselect time (STORE) 20 ms tCPH CS deselect time (NO STORE) 100 ns tIW INC to Vw change 100 500 µs tCYC INC cycle time 4 µs tR, tF7 INC input rise and fall time 500 µs tPU7 Power-up to wiper stable 500 µs tR VCC7 VCC power-up rate 0.2 50 V/ms CS INC U/D VW tCI tIL tIH tCYC tID tDI tIW MI (8) tIC tCPH tF tR 10% 90% 90% X9312

7 FN8176.0 March 15, 2005 APPLICATIONS INFORMATION Electronic digitally controlled (XDCP) potentiometers provide three powerful application advantages; (1) the variability and reliability of a solid-state potentiometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data. Basic Configurations of Electronic Potentiometers Basic Circuits VR VW/RW VR I Three terminal potentiometer; variable voltage divider Two terminal variable resistor; variable current VH VL Cascading TechniquesBuffered Reference Voltage +5V -5V VW VREF VOUT OP-07 VW/RW VW/RW +V +V X (a) (b) VOUT = VW/RW Noninverting Amplifier VO = (1+R2/R1)VS Voltage Regulator Iadj VO (REG) = 1.25V (1+R2/R1)+Iadj R2 VO (REG)VIN 317 Offset Voltage Adjustment VS VO R2R1 100kΩ 10kΩ10kΩ 10kΩ -12V+12V TL072 Comparator with Hysteresis VUL = {R1/(R1+R2)} VO(max) VLL = {R1/(R1+R2)} VO(min) VS VO LM308A +5V –5V –VS VO R2R1 LT311A (for additional circuits see AN115) X9312

8 FN8176.0 March 15, 2005 PACKAGING INFORMATION 0.150 (3.80) 0.158 (4.00) 0.228 (5.80) 0.019 (0.49) Pin 1 Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0.050 (1.27) 0.188 (4.78) 0.197 (5.00) 0.004 (0.19) 0.010 (0.25) 0.053 (1.35) 0.069 (1.75) (4X) 7° 0.016 (0.410) 0.037 (0.937) 0.0075 (0.19) 0.010 (0.25) 0° - 8° X 45° 8-Lead Plastic Small Outline Gull Wing Package Type S NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.250" 0.050"Typical 0.050" Typical 0.030" Typical

8 PlacesFOOTPRINT

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8176.0 March 15, 2005

ORDERING INFORMATION

Manufacturer’s Trademark Resistance Value or Code Date Code Temperature Range Blank = Commercial = 0°C to +70°C I = Industrial = -40°C to +85°C Package P = 8-Lead Plastic DIP S = 8-Lead SOIC End to End Resistance W = 10k Ω X9312X X X X9312