X9015 INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • 3 2 t a p s
  • Three-wire up/down serial interface
  • V CC = 2.7V–5V
  • Operating I CC = 50µA max.
  • Standby current = 1µA max.
  • R TOTAL = 10kΩ, 50kΩ, 100kΩ
  • Packages SOIC-8, MSOP-8
  • Pb-free plus anneal available (RoHS compliant) Pinout Block Diagram VCC CS INC U/D RH/VH VSS X9015 SOIC/MSOP RL/VL RW/VW 5-Bit Up/Down Counter Control Circuitry One of Decoder Resistor Array RH/VHU/D INC CS Transfer Gates Thirty VCC VSS RL/VL RW/VW Control Up/Down (U/D) Increment (INC) Device Select (CS) VCC (Supply Voltage) VSS (Ground) RH/VH RW/VW RL/VL General Detailed Two Data Sheet September 15, 2005

2 FN8157.1 September 15, 2005

Ordering Information

PART NUMBER PART MARKING V CC LIMITS (V) R TOTAL (kΩ) TEMPERATURE RANGE (°C) PACKAGE X9015WS8* 5 ±10 10 0 to 70 8 Ld SOIC X9015WS8Z* (Note) X9015W Z 0 to 70 8 Ld SOIC (Pb-free) X9015UM8* ABB 50 0 to 70 8 Ld MSOP X9015UM8Z* (Note) DCF 0 to 70 8 Ld MSOP (Pb-free) X9015UM8I* ABD -40 to 85 8 Ld MSOP X9015UM8IZ* (Note) DCD -40 to 85 8 Ld MSOP (Pb-Free) X9015US8* X9015U 0 to 70 8 Ld SOIC X9015US8Z* (Note) X9015U Z 0 to 70 8 Ld SOIC (Pb-free) X9015US8I* X9015U I -40 to 85 8 Ld SOIC X9015US8IZ* (Note) X9015U Z I -40 to 85 8 Ld SOIC (Pb-free) X9015WS8-2.7* X9015W F 2.7-5.5 10 0 to 70 8 Ld SOIC X9015WS8Z-2.7* (Note) X9015W Z F 0 to 70 8 Ld SOIC (Pb-free) X9015TS8-2.7 X9015T F 50 0 to 70 8 Ld SOIC X9015UM8-2.7* ABC 0 to 70 8 Ld MSOP X9015UM8Z-2.7* (Note) 0 to 70 8 Ld MSOP (Pb-free) X9015UM8I-2.7* ABE -40 to 85 8 Ld MSOP X9015UM8IZ-2.7* (Note) DCE -40 to 85 8 Ld MSOP (Pb-free) X9015US8-2.7* X9015U F 0 to 70 8 Ld SOIC X9015US8Z-2.7* (Note) X9015U Z F 0 to 70 8 Ld SOIC (Pb-free) X9015US8I-2.7* X9015U G -40 to 85 8 Ld SOIC X9015US8IZ-2.7* (Note) X9015U Z G -40 to 85 8 Ld SOIC (Pb-free) * Add “T1” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products em ploy special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. X9015

3 FN8157.1 September 15, 2005 Pin Descriptions RH/VH and RL/VL The high (RH/VH) and low (RL/VL) terminals of the X9015 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is V SS and the maximum is VCC. The terminology of RL/VL and RH/VH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input, and not the voltage potential on the terminal. RW/VW RW/Vw is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 200Ω at V CC=5V. At power up the wiper position is at Tap #15. (VL/RL=Tap #0). Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the tap position is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Chip Select (CS) The device is selected when the CS input is LOW. When CS is returned HIGH while the INC input is also HIGH the X9015 will be placed in the low power standby mode until the device is selected once again. Principles Of Operation There are two sections of the X9015: the input control, counter and decode section; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. The resistor array is comprised of 31 individual resistors connected in series. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a “make before break” mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for t IW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. When the device is powered-down, the wiper position is lost. When power is restored, the wiper is set to Tap #15. Instructions and Programming The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a five bit counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array. The system may select the X9015, move the wiper and deselect the device. The new wiper position will be maintained until changed by the system or until a power-up/down cycle. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. Symbol Table Pin Names SYMBOL DESCRIPTION RH/VH High terminal RW/VW Wiper terminal RL/VL Low terminal VSS Ground VCC Supply voltage U/D Up/Down control input INC Increment control input CS Chip select control input Mode Selection CS INC U/D MODE LH Wiper up LL Wiper down *H X Standby mode LLX Normal mode WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Lo w to High Will change from Lo w to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance X9015

4 FN8157.1 September 15, 2005 Power Up and Down Requirements The are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH, VL, and VW, i.e., VCC ≥ VH, VL, VW. The VCC ramp rate spec is always in effect. NOTES: 1. Absolute Linearity is utilized to determine ac tual wiper voltage versus expected voltage = (Vw(n)(actual)–Vw(n)(expected)) = ±1 Ml Maximum. 2. Relative Linearity is a measure of the error in step size between taps = VW(n+1) – [Vw(n) + Ml] = ±0.2 Ml. 3. 1 Ml = Minimum Increment = R TOT/31. 4. Typical values are for TA = 25°C and nominal supply voltage. 5. This parameter is periodically sampled and not 100% tested. Absolute Maximum Ratings Operating Conditions Voltage on CS, INC, U/D, VH, VL and I Temperature Range Supply Voltage (VCC) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Potentiometer Specifications Over recommended operating conditions unless otherwise stated SYMBOL PARAMETER TEST CONDITIONS/NOTES MIN. TYP. MAX. UNIT RTOTAL End to End Resistance Variation –20 +20 % VVH VH/RH Terminal Voltage 0 V CC V VVL VL/RL Terminal Voltage 0 V CC V Power Rating R TOTAL ≤1kΩ 10 mW RW Wiper Resistance I W = 1mA, VCC = 5V 200 400 Ω RW Wiper Resistance I W = 1mA, VCC = 2.7V 400 1000 Ω IW Wiper Current -3.75 3.75 mA Noise Ref: 1kHz -120 dBV Resolution 3% Absolute Linearity (Note 1) V w(n)(actual)–Vw(n)(expected) -1 +1 MI (Note 3) Relative Linearity (Note 2) V w(n+1)–[Vw(n)+MI] -0.2 +0.2 MI (Note 3) RTOTAL Temperature Coefficient ±300 ppm/°C Ratiometric Temperature Coefficient ±20 ppm/°C CH/CL/CW Potentiometer Capacitances See circuit #3 10/10/25 pF X9015

5 FN8157.1 September 15, 2005 D.C. Operating Specifications Over recommended operating conditions unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. (Note 4) MAX. UNITS ICC1 VCC active current (increment) CS = VIL, U/D = VIL or VIH and INC = 0.4V @ max. tCYC 50 µA ICC2 VCC active current (Store) (EEPROM Store) CS = VIH, U/D = VIL or VIH and INC =V IH @ max. tWR 400 µA ISB Standby supply current CS = VCC – 0.3V, U/D and INC =V SS or VCC – 0.3V 1µ A ILI CS, INC, U/D input leakage current V IN = VSS to VCC ±10 µA VIH CS, INC, U/D input HIGH voltage V CC x 0.7 V CC + 0.5 V VIL CS, INC, U/D input LOW voltage -0.5 V CC x 0.1 V CIN (Note 5) CS , INC, U/D input capacitance V CC = 5V, VIN = VSS, TA = 25°C, f= 1 M H z 10 pF TEST CIRCUIT #1 TEST CIRCUIT #2 CIRCUIT #3 SPICE MACRO MODEL Test Point VW/RW VH/RH VL/RL VS Force CurrentVL VW Test Point VH/RH VW/RW VL/RL CH CL RW 10pF 10pF RH RL RTOTAL CW 25pF A.C. Conditions of Test Input pulse levels 0V to 3V Input rise and fall times 10ns Input reference levels 1.5V X9015

6 FN8157.1 September 15, 2005 A.C. Timing A.C. Operating Specifications Over recommended operating conditions unless otherwise specified SYMBOL PARAMETER MIN. TYP . (Note 6) MAX. UNIT tCl CS to INC setup 100 ns tlD INC HIGH to U/D change 100 ns tDI U/D to INC setup 2.9 µs tlL INC LOW period 1 µs tlH INC HIGH period 1 µs tlC INC inactive to CS inactive 1 µs tCPH CS deselect time (NO STORE) 100 ns tCPH CS deselect time (STORE) 10 ms tIW INC to Vw change 1 5 µs tCYC INC cycle time 4 µs tR, tF (Note 7) INC input rise and fall time 500 µs tPU(Note 7) Power up to wiper stable 5µ s tR VCC(Note 7) V CC power-up rate 0.2 50 V/ms tWR Store cycle 5 10 ms CS INC U/D VW tCI tIL tIH tCYC tID tDI tIW MI (8) tIC tCPH tF tR 10% 90% 90% (store) NOTES: 6. Typical values are for TA = 25°C and nominal supply voltage. 7. This parameter is periodically sampled and not 100% tested. 8. MI in the A.C. timing diagram refers to the minimum incremental change in the V W output due to a change in the wiper position. X9015

9 FN8157.1 September 15, 2005 Applications Information Electronic digitally controlled potentiometers provide two powerful application advantages: (1) the variability and reliability of a solid-state potentiometer, and (2) the flexibility of computer-based digital controls. Basic Configurations of Electronic Potentiometers Basic Circuits VR VW/RW VR I Three terminal potentiometer; variable voltage divider Two terminal variable resistor; variable current VH/RH VL/RL Cascading TechniquesBuffered Reference Voltage +5V –5V VW/RW VREF VOUT OP-07 VW/RW VW/RW +V +V X (a) (b) VOUT = VW Noninverting Amplifier VS VO VO = (1+R2/R1)VS LM308A Voltage Regulator Iadj VO (REG) = 1.25V (1+R2/R1)+Iadj R2 VO (REG)VIN 317 Offset Voltage Adjustment VS VO R2R1 100kΩ 10kΩ10kΩ 10kΩ -12V+12V TL072 Comparator with Hysteresis VUL = {R1/(R1+R2)} VO(max) VLL = {R1/(R1+R2)} VO(min) –VS VO R2R1 LT311A +5V –5V (for additional circuits see AN115) X9015

10 FN8157.1 September 15, 2005 MSOP Packaging Information 0.118 ± 0.002 (3.00 ± 0.05) 0.040 ± 0.002 (1.02 ± 0.05) 0.150 (3.81) Ref. 0.193 (4.90) 0.030 (0.76) 0.036 (0.91) 0.032 (0.81) 0.007 (0.18) 0.005 (0.13) 0.008 (0.20) 0.004 (0.10) 0.0216 (0.55) 7° Typ. R 0.014 (0.36) 0.118 ± 0.002 (3.00 ± 0.05) 8-Lead Miniature Small Outline Gull Wing Package Type M 0.220" 0.0256" Typical 0.025" Typical 0.020" Typical

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Ref. NOTE: ALL DIMENSIONS IN INCHES AND (MILLIMETERS) X9015

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8157.1 September 15, 2005 SOIC Packaging Information 0.150 (3.80) 0.158 (4.00) 0.228 (5.80) 0.244 (6.20) 0.014 (0.35) 0.019 (0.49) Pin 1 Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0.050 (1.27) 0.188 (4.78) 0.197 (5.00) 0.004 (0.19) 0.010 (0.25) 0.053 (1.35) 0.069 (1.75) (4X) 7° 0.016 (0.410) 0.037 (0.937) 0.0075 (0.19) 0.010 (0.25) 0° - 8° X 45° 8-Lead Plastic Small Outline Gull Wing Package Type S NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.250" 0.050" Typical 0.050" Typical 0.030" Typical