X25F047MI

X25F047 XICOR | Alldatasheet

Document overview

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Technical content

Ó Xicor, Inc. 1994, 1995, 1996 Patents Pending 7005-0.9 5/7/97 T4/C0/D1 Characteristics subject to change without notice X25F047 512 x 8 Bit SPI SerialFlash with Block Lock TM Protection

FEATURES

• 1MHz Clock Rate
• SPI Modes (0,0 & 1,1)
• 512 x 8 Bits —16 Byte Small Sector Program Mode
• Low Power CMOS —<1 m A Standby Current —<3mA Active Current during Program —<400 m A Active Current during Read
• 1.8V to 3.6V or 5V “Univolt” Read and Program Power Supply Versions
• Block Lock Protection —Block Lock Protect 0, any 1/4, 1st 1/2, First or Last Sector of SerialFlash Array
• Built-in Inadvertent Program Protection —Power-Up/Power-Down Protection Circuitry —Program Enable Latch —Program Protect Pin
• Self-Timed Program Cycle —5ms Program Cycle Time (Typical)
• High Reliability —Endurance: 100,000 Cycles/Byte —Data Retention: 100 Years —ESD: 2000V on all pins
• 8-Lead SOIC Package
• 8-Lead MSOP Package
• 8-Lead TSSOP Package
• 8-Pin Mini-DIP Package

DESCRIPTION

The X25F047 is a CMOS 4K-bit SerialFlash, internally organized as 512 x 8. The X25F047 features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus. The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS ) input, allowing any number of devices to share the same bus. There are eight options for programmable, nonvolatile, Block Lock Protection available to the end user. These options are implemented via special instructions programmed to the part. The X25F047 also features a PP pin that can be used for hardwire protection of the part, disabling all programming attempts, as well as a Program Enable Latch that must be set before a program operation can be initiated. The X25F047 utilizes Xicor’s proprietary Direct Write TM cell, providing a minimum endurance of 100,000 cycles per sector and a minimum data retention of 100 years. FUNCTIONAL DIAGRAM COMMAND DECODE AND CONTROL LOGIC PROGRAM CONTROL LOGIC DATA REGISTER Y DECODE LOGIC X DECODE LOGIC HIGH VOLTAGE CONTROL SERIALFLASH ARRAY (512 x 8) SO SI SCK CS PP 816 7005 FRM 01.3

Serial Output (SO) SO is a push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial Input (SI) SI is a serial data input pin. All opcodes, byte addresses, and data to be programmed to the memory are input on this pin. Data is latched by the rising edge of the serial clock. Serial Clock (SCK) The Serial Clock controls the serial bus timing for data input and output. Opcodes, addresses, or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin change after the falling edge of the clock input. Chip Select (CS ) When CS is HIGH, the X25F047 is deselected and the SO output pin is at high impedance and unless a nonvol- atile write cycle is underway, the X25F047 will be in the standby power mode. CS LOW enab les the X25F047, placing it in the active power mode. It should be noted that after power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Program Protect (PP ) When PP is LOW , nonvolatile writes to the X25F047 are disabled, but the part otherwise functions normally. When PP is held HIGH, all functions, including nonvolatile writes, operate normally. PP going LOW while CS is still LO W will interrupt a programming cycle to the X25F047. If the nonvolatile write cycle has already been initiated, PP going low will have no affect on this cycle. PIN NAMES

7005 FRM T01

The X25F047 is a 512 x 8 SerialFlash designed to inter- face directly with the synchronous Serial Peripheral Inter- face (SPI) of many popular microcontroller families. The X25F047 contains an 8-bit instruction register. It is accessed via the SI input, with data being clocked in on the rising edge of SCK. CS must be LOW and the PP input must be HIGH during the entire operation. Table 1 contains a list of the instructions and their opcodes. All instructions, addresses and data are transferred MSB first. Data input is sampled on the first rising edge of SCK after CS goes LOW . SCK is static, allowing the user to stop the clock and then start it again to resume opera- tions where left off. Program Enable Latch The X25F047 contains a “Program Enab le” latch. This latch must be SET before a program operation is initi- ated. The PREN instruction will set the latch and the PRDI instruction will reset the latch (Figure 4). This latch is automatically reset upon a power-up condition and after the completion of a sector program cycle. Symbol Description CS Chip Select Input SO Serial Output SI Serial Input SCK Serial Clock Input PP Program Protect Input V SS Ground V CC Supply Voltage NC No Connect V CC NC SI SCK SO CS VSS PP 8-LEAD MSOP SCK SI V SS PP NC VCC CS SO 8-LEAD TSSOP V CC NC SCK SI

7005 FRM 02

*0.197" *0.244" 0.120" 0.193" 0.122" 0.252" Not to scale *SOIC Measurement

• The device is in the low power, standby state.
• A HIGH to LOW transition on CS is required to enter an active state and receive an instruction.
• SO pin is at high impedance.
• The “Program Enable” latch is reset. Data Protection The following circuitry has been included to prevent inad- vertant programming of data:
• The “Program Enable” latch is reset upon power-up.
• A PREN instruction must be issued to set the “Program Enable” latch.
• CS must come HIGH at the proper clock count in order to start a program cycle.

Table 1. Instruction Set and Block Lock Protection Byte Definition *Instructions are shown with MSB in leftmost position. Instructions are transferred MSB first. Figure 2. Read Operation Sequence

D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions, unless otherwise specified.)

7005 FRM T06

7005 FRM T07.1 CAPACITANCE T A = +25 C, f = 1MHz, V CC =5V.

7005 FRM T08

Notes: (1) V IL Min. and V IH Max. are for reference only and are not 100% tested. (2) This parameter is periodically sampled and not 100% tested. (3) t PUR and t PUW are the delays required from the time V CC is stable until the specified operation can be initiated. These parameters are periodically sampled and not 100% tested. Limits Symbol Parameter Min. Max. Units Test Conditions I CC1 V CC Read Current (Active) 1 mA SCK = V CC x 0.1/V CC x 0.9 @ 1MHz, SO = Open, CS = V SS I CC2 V CC Write Current (Active) 3 mA SCK = V CC x 0.1/V CC x 0.9 @ 1MHz, SO = Open, CS = V SS I SB V CC Supply Current (Standby) 1 m A CS = V CC - 0.1, V IN = V SS or V CC I LI Input Leakage Current 10 m A V IN = V SS to V CC I LO Output Leakage Current 10 m A V OUT = V SS to V CC V IL (1) Input LOW Voltage –0.5 V CC x 0.3 V V IH (1) Input HIGH Voltage V CC x 0.7V CC + 0.5 V V OL1 Output LOW Voltage 0.4 V V CC = 5.5V, I OL = 2.1mA V OH1 Output HIGH Voltage V CC – 0.8 V V CC = 5.5V, I OH = –1.0mA V OL2 Output LOW Voltage 0.4 V V CC = 3.6V, I OL = 1.0mA V OH2 Output HIGH Voltage V CC – 0.4 V VCC = 3.6V, IOH = –0.4mA VOL3 Output LOW Voltage 0.4 V VCC = 1.8V, IOL = 0.5mA VOH3 Output HIGH Voltage VCC – 0.2 V VCC = 1.8V, IOH = –0.25mA Symbol Parameter Min. Max. Units tPUR (3) Power-up to Read Operation 1 ms tPUW (3) Power-up to Write Operation 5 ms Symbol Parameter Max. Units Conditions C OUT (2) Output Capacitance (SO) 8 pF VOUT = 0V C IN (2) Input Capacitance (SCK, SI, CS , PP ) 6 pF VIN = 0V RECOMMENDED OPERATING CONDITIONS

7005 FRM T04

Temperature Min. Max. Commercial 0°C +70°C Industrial –40°C +85°C

7005 FRM T05

X25F047 1.8V to 3.6V X25F047-5 4.5V to 5.5V

A.C. CHARACTERISTICS (Over the recommended operating conditions, unless otherwise specified.) Data Input Timing

7005 FRM T10

7005 FRM T11

Notes:(4) This parameter is periodically sampled and not 100% tested. (5) tWC is the time from the rising edge of CS after a valid program sequence has been sent to the end of the self-timed internal nonvol- atile write cycle. Symbol Parameter Min. Max. Units fSCK Clock Frequency 0 1 MHz tCYC Cycle Time 1000 ns tLEAD CS Lead Time 500 ns tLAG CS Lag Time 500 ns tWH Clock HIGH Time 400 ns tWL Clock LOW Time 400 ns tSU Data Setup Time 100 ns tH Data Hold Time 100 ns tRI (4) Data In Rise Time 2 ms tFI (4) Data In Fall Time 2 ms tCS CS Deselect Time 2.0 ms tWC (5) Write Cycle Time 10 ms Symbol Parameter Min. Max. Units fSCK Clock Frequency 0 1 MHz tDIS Output Disable Time 500 ns tV Output Valid from Clock LOW 400 ns tHO Output Hold Time 0 ns tRO (4) Output Rise Time 300 ns tFO (4) Output Fall Time 300 ns A.C. TEST CONDITIONS

7005 FRM T09

Input Pulse Levels VCC x 0.1 to VCC x 0.9 Input Rise and Fall Times 10ns Input and Output Timing Level VCC X 0.5 EQUIVALENT A.C. LOAD CIRCUIT OUTPUT 7005 FRM 09.1 2061W 3025W 30pF OUTPUT 3.3V 2696W 5288W 30pF

Figure 7. Serial Output Timing Figure 8. Serial Input Timing

7005 FRM 10

7005 FRM 11

0.150 (3.80) 0.158 (4.00) 0.228 (5.80) 0.244 (6.20) 0.014 (0.35) 0.019 (0.49) PIN 1 PIN 1 INDEX 0.010 (0.25) 0.020 (0.50) 0.050 (1.27) 0.188 (4.78) 0.197 (5.00) 0.004 (0.19) 0.010 (0.25) 0.053 (1.35) 0.069 (1.75) (4X) 7° 0.016 (0.410) 0.037 (0.937) 0.0075 (0.19) 0.010 (0.25) 0° – 8° X 45° 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.250" 0.050"TYPICAL 0.050" TYPICAL 0.030" TYPICAL

8 PLACESFOOTPRINT

0.118 – 0.002 (3.00 – 0.05) 0.040 – 0.002 (1.02 – 0.05) 0.150 (3.81) REF . 0.193 (4.90) REF . 0.030 (0.76) 0.036 (0.91) 0.032 (0.81) 0.007 (0.18) 0.005 (0.13) 0.008 (0.20) 0.004 (0.10) 0.0216 (0.55) 7°TYP R 0.014 (0.36) 0.118 – 0.002 (3.00 – 0.05) 8-LEAD MINIATURE SMALL OUTLINE GULLWING PACKAGE TYPE M NO TE: 1.ALL DIMENSIONS IN INCHES AND (MILLIMETERS)

3003 FRM 01

NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 8-LEAD PLASTIC, TSSOP , PACKAGE TYPE V See Detail “A” .031 (.80) .041 (1.05) .169 (4.3) .025 (.65) BSC .114 (2.9) .122 (3.1) .002 (.05) .006 (.15) .047 (1.20) .0075 (.19) .0118 (.30) 0° – 8° .010 (.25) .019 (.50) .029 (.75) Gage Plane Seating Plane DetailA (20X)

NO TE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2.PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 0.020 (0.51) 0.016 (0.41) 0.150 (3.81) 0.125 (3.18) 0.110 (2.79) 0.090 (2.29) 0.430 (10.92) 0.360 (9.14) 0.300 (7.62) REF. PIN 1 INDEX 0.145 (3.68) 0.128 (3.25) 0.025 (0.64) 0.015 (0.38) PIN 1 SEA TING PLANE 0.065 (1.65) 0.045 (1.14) 0.260 (6.60) 0.020 (0.51) TYP. 0.010 (0.25) 15° 8-LEAD PLASTIC DU AL IN-LINE PACKAGE TYPE P HALF SHOULDER WIDTH ON ALL END PINS OPTIONAL 0.015 (0.38) MAX. 0.325 (8.25) 0.300 (7.62)

ORDERING INFORMATION

Blank = Commercial = 0°C to +70°C I = Industrial = –40°C to +85°C Package P = 8-Lead Plastic DIP LIMITED W ARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. mak es no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Xicor, Inc. makes no warranty of merchantability or fitness for any purpose. Xicor, Inc. reserves the right to discontinue production and change specifications and prices at any time and without notice. Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents, licenses are implied. U.S. PATENTS Xicor products are covered by one or more of the following U.S. Patents: 4,263,664; 4,274,012; 4,300,212; 4,314,265; 4,326,134; 4,393,481; 4,883, 976. Foreign patents and additional patents pending. LIFE RELATED POLICY In situations where semiconductor component failure may endanger life, system designers using this product should design the system with appropriate error detection and correction, redundancy and back-up features to prevent such an occurence. Xicor's products are not authorized for use in critical components in life support devices or systems. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. S = 8-Lead SOIC VCC Range Blank = 1.8V to 3.6V 5 = 4.5V to 5.5VM = 8-Lead MSOP V = 8-Lead TSSOP 8-Lead MSOP AAH = 1.8 to 3.6V, 0°C to +70°C EYWW XXX AAJ = 1.8 to 3.6V, -40°C to +85°C AAK = 2.5 to 5.5V, 0°C to +70°C AAL = 2.5 to 5.5V, -40°C to +85°C AAM = 4.5 to 5.5V, 0°C to +70°C AAN = 4.5 to 5.5V, -40°C to +85°C 8-Lead TSSOP Blank = 1.8 to 3.6V, 0°C to +70°C EYWW 5F47XX I = 1.8 to 3.6V, -40°C to +85°C AE = 2.5 to 5.5V, 0°C to +70°C AF = 2.5 to 5.5V, -40°C to +85°C 5 = 4.5 to 5.5V, 0°C to +70°C I5 = 4.5 to 5.5V, -40°C to +85°C 8-Lead SOIC/PDIP X25F047 X XX Blank = 8-Lead SOIC Blank = 1.8 to 3.6V, 0°C to +70°C I = 1.8 to 3.6V, -40°C to +85°C AE = 2.5 to 5.5V, 0°C to +70°C AF = 2.5 to 5.5V, -40°C to +85°C 5 = 4.5 to 5.5V, 0°C to +70°C I5 = 4.5 to 5.5V, -40°C to +85°C AAI = 1.8 to 3.6V, -20°C to +85°C P = 8-Lead Plastic DIP