SN74AVCAH164245_02 TI | Alldatasheet
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16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 Member of the Texas Instruments Widebus Family /C0068 DOC Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation /C0068 Dynamic Drive Capability Is Equivalent to Standard Outputs With I OH and IOL of ±24 mA at 2.5-V VCC /C0068 Control Inputs VIH/VIL Levels are Referenced to VCCA Voltage /C0068 If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State /C0068 Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications /C0068 Ioff Supports Partial-Power-Down Mode Operation /C0068 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range /C0068 Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors /C0068 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II /C0068 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) description/ordering information This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A-port is designed to track V CCA . VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to track VCCB . VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE ) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA . Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, then both ports are in the high-impedance state.
ORDERING INFORMATION
TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING TSSOP – DGG Tape and reel SN74AVCAH164245GR AVCAH164245 –40°C to 85°C TVSOP – DGV Tape and reel SN74AVCAH164245VR WAH4245 VFBGA – GQL Tape and reel SN74AVCAH164245KR WAH4245 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2002, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DOC and Widebus are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002
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(TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1B4 V CCB 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 V CCB 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 V CCA 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 V CCA 2A5 2A6 GND 2A7 2A8 2OE terminal assignments 123456 A 1DIR NC NC NC NC 1OE B 1B2 1B1 GND GND 1A1 1A2 C 1B4 1B3 VCCB VCCA 1A3 1A4 D 1B6 1B5 GND GND 1A5 1A6 E 1B8 1B7 1A7 1A8 F 2B1 2B2 2A2 2A1 G 2B3 2B4 GND GND 2A4 2A3 H 2B5 2B6 VCCB VCCA 2A6 2A5 J 2B7 2B8 GND GND 2A8 2A7 K 2DIR NC NC NC NC 2OE NC – No internal connection GQL PACKAGE (TOP VIEW) J H G F E D C B A 213 4 65 K
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FUNCTION TABLE (each 8-bit section) INPUTS OPERATION OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic diagram (positive logic) To Seven Other Channels 1DIR 1A1 1B1 1OE To Seven Other Channels 2DIR 2A1 2B1 2OE Pin numbers shown are for the DGG and DGV packages.
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Voltage range applied to any output in the high-impedance or power-off state, VO Voltage range applied to any output in the high or low state, VO † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Notes 4 through 6) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.4 3.6 V VCCB Supply voltage 1.4 3.6 V Hi h l l i t 1.4 V to 1.95 V VCCI × 0.65 VCCI VIH High-level input voltage Data inputs 1.95 V to 2.7 V 1.7 VCCI Vvoltage 2.7 V to 3.6 V 2 VCCI Lll it 1.4 V to 1.95 V 0 VCCI × 0.35 VIL Low-level input voltage Data inputs 1.95 V to 2.7 V 0 0.7 Vvoltage 2.7 V to 3.6 V 0 0.8 Hi h l l i t Ct l i t 1.4 V to 1.95 V VCCA × 0.65 VCCA VIH High-level input voltage Control inputs (Referenced to VCCA ) 1.95 V to 2.7 V 1.7 VCCA Vvoltage (Referenced to VCCA ) 2.7 V to 3.6 V 2 VCCA Lll it Ct l i t 1.4 V to 1.95 V 0 VCCA × 0.35 VIL Low-level input voltage Control inputs (Referenced to VCCA ) 1.95 V to 2.7 V 0 0.7 Vvoltage (Referenced to VCCA ) 2.7 V to 3.6 V 0 0.8 VO Output voltage 0 VCCO V 1.4 V to 1.6 V –2 IOH High level output current 1.65 V to 1.95 V –4 mAIOH High-level output current 2.3 V to 2.7 V –8 mA 3 V to 3.6 V –12 1.4 V to 1.6 V 2 IOL Low level output current 1.65 V to 1.95 V 4 mAIOL Low -level output current 2.3 V to 2.7 V 8 mA 3 V to 3.6 V 12 ∆t/∆v Input transition rise or fall rate 5 ns/V TA Operating free-air temperature –40 85 °C NOTES: 4. V CCI is the VCC associated with the data input port. 5. VCCO is the VCC associated with the output port. 6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002
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electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 7 and 8) PARAMETER TEST CONDITIONS VCCA VCCB MIN TYP † MAX UNIT IOH = –2 mA VI = VIH 1.4 V 1.4 V 1.05 VOH IOH = –4 mA VI = VIH 1.65 V 1.65 V 1.2 V IOH = –8 mA VI = VIH 2.3 V 2.3 V 1.75 IOH = –12 mA VI = VIH 3 V 3 V 2.3 IOH = 2 mA VI = VIL 1.4 V 1.4 V 0.35 VOL IOH = 4 mA VI = VIL 1.65 V 1.65 V 0.45 V IOH = 8 mA VI = VIL 2.3 V 2.3 V 0.55 IOH = 12 mA VI = VIL 3 V 3 V 0.7 II Control inputsVI = VCCA or GND 1.4 V to 3.6 V 3.6 V ±2.5 µA VI = 0.49 V 1.4 V 1.4 V 11 IBHL ‡ VI = 0.57 V 1.65 V 1.65 V 30 µAIBHL ‡ VI = 0.7 V 2.3 V 2.3 V 45 µA VI = 0.8 V 3 V 3 V 75 VI = 0.49 V 1.4 V 1.4 V –11 IBHH § VI = 1.07 V 1.65 V 1.65 V –30 µAIBHH § VI = 1.7 V 2.3 V 2.3 V –45 µA VI = 2 V 3 V 3 V –75 1.6 V 1.6 V 100 IBHLO ¶ VI=0t oVCC 1.95 V 1.95 V 200 µAIBHLO ¶ VI = 0 to VCC 2.7 V 2.7 V 300 µA 3.6 V 3.6 V 525 1.6 V 1.6 V –100 IBHHO # VI=0t oVCC 1.95 V 1.95 V –200 µAIBHHO # VI = 0 to VCC 2.7 V 2.7 V –300 µA 3.6 V 3.6 V –525 I ff A port VIor VO =0t o36V 0 V 0 to 3.6 V ±10 µAIoff B port VI or VO = 0 to 3.6 V 0 to 3.6 V 0 V ±10 µA A or B ports V V GND OE = VIH 3.6 V 3.6 V ±12.5 IOZ || B port VO = VCCO or GND, VI= VCCI or GND OE d ’t 0 V 3.6 V ±12.5 µA A port VI = VCCI or GND OE = don’t care 3.6 V 0 V ±12.5 † All typical values are at TA = 25°C. ‡ The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. § The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and then lowering it to VIH min. ¶ An external driver must source at least IBHLO to switch this node from low to high. # An external driver must sink at least IBHHO to switch this node from high to low. ||For I/O ports, the parameter IOZ includes the input leakage current. NOTES: 7. V CCO is the VCC associated with the output port. 8. VCCI is the VCC associated with the input port.
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range (continued) (unless otherwise noted) (see Note 9) PARAMETER TEST CONDITIONS VCCA VCCB MIN TYP † MAX UNIT 1.6 V 1.6 V 20 1.95 V 1.95 V 20 ICCA VI=V CCI or GND IO =0 2.7 V 2.7 V 30 µAICCA VI = VCCI or GND , IO = 0 0 V 3.6 V –40 µA
3.6 V 0 V 40
3.6 V 3.6 V 40 1.6 V 1.6 V 20 1.95 V 1.95 V 20 ICCB VI=V CCI or GND IO =0 2.7 V 2.7 V 30 µAICCB VI = VCCI or GND , IO = 0 0 V 3.6 V 40 µA
3.6 V 0 V –40
3.6 V 3.6 V 40 C i Control inputsVI = 3.3 V or GND 3.3 V 3.3 V 4 pF C io A or B ports VO = 3.3 V or GND 3.3 V 3.3 V 5 pF † All typical values are at TA = 25°C. NOTE 9: V CCI is the VCC associated with the input port. switching characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V UNIT(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX t d ns t ns tdi ns switching characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V UNIT(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX t d ns t ns tdi ns
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396 – JULY 2002
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switching characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V UNIT(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX t d ns t ns tdi ns switching characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V UNIT(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX t d ns t ns tdi ns operating characteristics, VCCA and VCCB = 3.3 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Power dissipation capacitance per transceiver, Outputs enabled 14 C pdA A port input, B port output Outputs disabled C L =0 f=1 0M H z pFC pdA Power dissipation capacitance per transceiver, Outputs enabled C L = 0, f = 10 MHz F B port input, A port output Outputs disabled 7 Power dissipation capacitance per transceiver, Outputs enabled 14 C dB A port input, B port output Outputs disabled C L =0 f=1 0M H z pFC pdB Power dissipation capacitance per transceiver, Outputs enabled C L = 0, f = 10 MHz pF B port input, A port output Outputs disabled 7
Technology and Applications, literature number SCEA009. Figure 1. Output Voltage vs Output Current
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NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. V CCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 2. Load Circuit and Voltage Waveforms
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