W3DG7232V-AD1 WEDC | Alldatasheet
Document overview
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Technical content
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs July 2004 Rev. 0 PRELIMINARY* W3DG7232V-AD1 256MB - 32Mx72 SDRAM UNBUFFERED
DESCRIPTION
The W3DG7232V is a 32Mx72 synchronous DRAM module which consists of nine 32Mx8 SDRAM com po nents in TSOP II package, and one 2K EEPROM in an 8 pin TSSOP package for Serial Presence Detect which are mounted on a 144 Pin SO-DIMM mul ti lay er FR4 Substrate. * This product is under development, is not qualifi ed or characterized and is subject to change without notice.
FEATURES
/square6 PC100 and PC133 Compatible /square6 Burst Mode Operation /square6 Auto and Self Refresh capability /square6 LVTTL compatible inputs and outputs /square6 Serial Presence Detect with EEPROM /square6 Fully synchronous: All signals are registered on the positive edge of the system clock /square6 Programmable Burst Lengths: 1, 2, 4, 8 or Full Page /square6 3.3V ± 0.3V Power Supply /square6 144 Pin SO-DIMM JEDEC
- Package height options: AD1: 27.94 (1.1") PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) PIN NAMES A0 – A12 Address input (Multiplexed) BA0-1 Select Bank DQ0-63 Data Input/Output CB0-7 Check bit (Data-in/data-out) CLK0,CK1 Clock input CKE0 Clock Enable input CS0# Chip select Input RAS# Row Address Strobe CAS# Column Address Strobe WE# Write Enable DQMB0-7 DQM V CC Power Supply (3.3V) VSS Ground SDA Serial data I/O SCL Serial clock DNU Do not use NC No Connect PIN FRONT PIN BACK PIN FRONT PIN BACK PIN FRONT PIN BACK SS 2V SS 49 DQ13 50 DQ45 97 DQ22 98 DQ54
3 DQ0 4 DQ32 51 DQ14 52 DQ46 99 DQ23 100 DQ55
5 DQ1 6 DQ33 53 DQ15 54 DQ47 101 V
7 DQ2 8 DQ34 55 V SS 56 V SS 103 A6 104 A7
9 DQ3 10 DQ35 57 CB0 58 CB4 105 A8 106 BA0
11 V CC 12 V CC 59 CB1 60 CB5 107 V SS 108 V SS
13 DQ4 14 DQ36 61 CLK0 62 CKE0 109 A9 110 BA1
15 DQ5 16 DQ37 63 V
CC 64 V CC 111 A10 112 A11
17 DQ6 18 DQ38 65 RAS# 66 CAS# 113 V CC 114 V CC
19 DQ7 20 DQ39 67 WE# 68 NC 115 DQMB2 116 DQMB6
21 V SS 22 V SS 69 SO# 70 A12 117 DQMB3 118 DQMB7
23 DQMB0 24 DQB4 71 NC 72 NC 119 V SS 120 V SS
25 DQMB1 26 DQB5 73 NC 74 CLK1 121 DQ24 122 DQ56
27 V CC 28 V CC 75 V SS 76 V SS 123 DQ25 124 DQ57
29 A0 30 A3 77 CB2 78 CB6 125 DQ26 126 DQ58
31 A1 32 A4 79 CB3 80 CB7 127 DQ27 128 DQ59
33 A2 34 A5 81 V
CC 82 V CC 129 V CC 130 V CC
35 V SS 36 V SS 83 DQ16 84 DQ48 131 DQ28 132 DQ60
37 DQ8 38 DQ40 85 DQ17 86 DQ49 133 DQ29 134 DQ61
39 DQ9 40 DQ41 87 DQ18 88 DQ50 135 DQ30 136 DQ62
41 DQ10 42 DQ42 89 DQ19 90 DQ51 137 DQ31 138 DQ63
43 DQ11 44 DQ43 91 VSS 92 V
45 V CC 46 V CC 93 DQ20 94 DQ52 141 SDA 142 SCL
47 DQ12 48 DQ44 95 DQ21 96 DQ53 143 V CC 144 V CC
2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs July 2004 Rev. 0 PRELIMINARY FUNCTIONAL BLOCK DIAGRAM DQMB0 WE# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 S0#DQM WE# DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 WE#DQM S0# DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 WE#DQM S0# WE#DQM S0# DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 WE#DQM S0# DQ62 DQ63 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ47 DQ51 DQ55 DQ54 DQ53 DQ52 DQ49 DQ50 DQ48 DQ43 DQ45 DQ46 DQ44 DQ41 DQ42 DQ40 DQ39 DQ37 DQ38 DQ35 DQ36 DQ33 DQ34 DQ32 WE# WE#DQM S0# DQM S0# WE#S0#DQM WE#DQM S0# S0# DQMB1 DQMB2 DQMB3 DQMB7 DQMB6 DQMB5 DQMB4 I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 I/O 3 I/O 7 I/O 6 I/O 5 I/O 4 I/O 2 I/O 1 I/O 0 I/O 3 I/O 7 I/O 6 I/O 5 I/O 4 I/O 2 I/O 1 I/O 0 I/O 3 I/O 7 I/O 6 I/O 5 I/O 4 I/O 2 I/O 1 I/O 0 I/O 3 I/O 7 I/O 6 I/O 5 I/O 4 I/O 2 I/O 1 I/O 0 I/O 3 I/O 7 I/O 6 I/O 5 I/O 4 I/O 2 I/O 1 I/O 0 I/O 7 I/O 0 I/O 1 I/O 2 I/O 4 I/O 5 I/O 6 I/O 3 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 I/O 0 I/O 1 I/O 2 I/O 0 I/O 1 I/O 2 I/O 4 I/O 5 I/O 6 I/O 7 I/O 3 CB3 CB6 CB7 CB4 CB5 CB1 CB2 CB0 NOTE: DQ wiring may differ than described in this drawing, however DQ/DQMB/CKE/S relationships must be maintained as shown. VSS CAS# RAS# CKE0 VCC CKE: SDRAM D0-D8 CAS#: SDRAM D0-D8 RAS#: SDRAM D0-D8 SCL SDA A2A1 SERIAL PD A0-A12: SDRAM D0-D8A0-A12 BA0-BA1 BA0-BA1: SDRAM D0-D8 D0-D8 D0-D8 *CLOCK WIRING CLOCK INPUT SDRAMS *CLK0 *CLK1
4 OR 5 SDRAMS
*Wire per Clock Loading Table/Wiring Diagrams
3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs July 2004 Rev. 0 PRELIMINARY ABSOLUTE MAXIMUM RATINGS Parameter Symbol Value Units Voltage on any pin relative to VSS VIN, VOUT -1.0 ~ 4.6 V Voltage on VCC supply relative to VSS VCC, VCCQ -1.0 ~ 4.6 V Storage Temperature T STG -55 ~ +150 °C Power Dissipation P D 9 W Short Circuit Current I OS 50 mA Note: Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. Parameter Symbol Min Typ Max Unit Note Supply Voltage V CC 3.0 3.3 3.6 V Input High Voltage V IH 2.0 3.0 V CCQ+0.3 V1 Input Low Voltage V IL -0.3 — 0.8 V 2 Output High Voltage V OH 2.4 — — V I OH= -2mA Output Low Voltage V OL —— 0 . 4V I OL= -2mA Input Leakage Current I LI -10 — 10 µA 3 Note: 1. V IH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns. 2. V IL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ V IN ≤ VCCQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE TA = 25°C, f = 1MHz, VCC = 3.3V, VREF = 1.4V ± 200mV Parameter Symbol Max Unit Input Capacitance (A0-A12) C IN1 50 pF Input Capacitance (RAS#,CAS#,WE#) C IN2 50 pF Input Capacitance (CKE0) C IN3 50 pF Input Capacitance (CK0) C IN4 22 pF Input Capacitance (CS0#) C IN5 50 pF Input Capacitance (DQM0-DQM7) C IN6 8p F Input Capacitance (BA0-BA1) C IN7 50 pF Data Input/Output Capacitance (DQ0-DQ63) C OUT 9.5 pF Data input/output capacitance (CB0-CB7) COUT1 9.5 pF RECOMMENDED DC OPERATING CONDITIONS Voltage Referenced to: VSS = 0V, 0°C ≤ TA ≤ +70°C
4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs July 2004 Rev. 0 PRELIMINARY OPERATING CURRENT CHARACTERISTICS VCC = 3.3V, 0°C ≤ TA ≤ +70°C Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. Version Parameter Symbol Conditions 100/133 Units Note Operating Current (One bank active) ICC1 Burst Length = 1 tRC ≤ tRC(min) IOL = 0mA 900 mA 1 Precharge Standby Current in Power Down Mode ICC2P CKE ≤ VIL(max), tCC = 10ns 18 mA ICC2PS CKE & CK ≤ VIL(max), tCC = ∞ 18 Precharge Standby Current in Non-Power Down Mode ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tcc =10ns Input signals are charged one time during 20 180 mA ICC2NS CKE ≥ VIH(min), CK ≥VIL(max), tCC = ∞ Input signals are stable 90 Active Standby Current in Power-Down Mode ICC3P CKE ≥ VIL(max), tCC = 10ns 54 mA ICC3PS CKE & CK ≤ VIL(max), tCC = ∞ 54 Active Standby Current in Non-Power Down Mode ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tcc = 10ns Input signals are changed one time during 20ns 270 mA ICC3NS CKE ≥ VIH(min), CK ≤ VIL(max), tcc = ∞ Input signals are stable 225 mA Operating Current (Burst mode) ICC4 Io = mA Page burst
4 Banks activated
t CCD = 2CK 990 mA 1 Refresh Current I CC5 tRC ≥ tRC(min) 1980 mA 2 Self Refresh Current I CC6 CKE ≤ 0.2V 27 mA
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs July 2004 Rev. 0 PRELIMINARY Note: For industrial temperature range product, add an "I" to the end of the part number. Ordering Information Speed CAS Latency Height* W3DG7232V10AD1 100MHz CL=2 27.94 (1.1”) MAX W3DG7232V7AD1 133MHz CL=2 27.94 (1.1”) MAX W3DG7232V75AD1 133MHz CL=3 27.94 (1.1”) MAX PACKAGE DIMENSIONS FOR AD1 3.99 (0.157) 2.01 (0.079 Min) 67.72 (2.661 Max) 32.79 (1.291) 4.60 (0.181) 1.50 (0.059)28.2 (1.112) 23.14 (0.913) 19.99 (0.787) 27.94 (1.10) Max 3.81 (0.150) MAX. 0.99 (0.039) (± 0.004) PACKAGE DIMENSIONS FOR AD1 * ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES).
6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs July 2004 Rev. 0 PRELIMINARY Document Title 256MB - 32Mx72 SDRAM UNBUFFERED
Revision History
Rev # History Release Date Status Rev A A.1 Changed the module height to 1.095" A.2 Changed part number to WED3DG7232V-AD1 6-2-03 Advanced Rev 0 0.1 Updated CAP and I DD Spec.