W3DG6435V-D2 WEDC | Alldatasheet
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Technical content
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W3DG6435V-D2 July 2004 Rev. 0 PRELIMINARY* 256MB - 32Mx64 SDRAM UNBUFFERED
DESCRIPTION
The W3DG6435V is a 32Mx64 synchronous DRAM module which consists of eight 32Mx8 SDRAM components in TSOP II package and one 2K EEPROM in an 8 pin TSSOP package for Serial Presence Detect which are mounted on a 168 Pin DIMM multilayer FR4 Substrate. * This product is under development, is not qualifi ed or characterized and is subject to change without notice.
FEATURES
/square6 PC100 and PC133 compatible /square6 Burst Mode Operation /square6 Auto and Self Refresh capability /square6 LVTTL compatible inputs and outputs /square6 Serial Presence Detect with EEPROM /square6 Fully synchronous: All signals are registered on the positive edge of the system clock /square6 Programmable Burst Lengths: 1, 2, 4, 8 or Full Page /square6 3.3V ± 0.3V Power Supply /square6 168 Pin DIMM JEDEC PIN NAMESPIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) PIN FRONT PIN FRONT PIN FRONT PIN BACK PIN BACK PIN BACK 1V SS 29 DQM1 57 DQ18 85 V SS 113 DQM5 141 DQ50
2 DQ0 30 CS0# 58 DQ19 86 DQ32 114 CS1# 142 DQ51
3 DQ1 31 DNU 59 V
CC 87 DQ33 115 RAS# 143 V CC
4 DQ2 32 V SS 60 DQ20 88 DQ34 116 V SS 144 DQ52
5 DQ3 33 A0 61 NC 89 DQ35 117 A1 145 NC
CC 34 A2 62 *V REF 90 V CC 118 A3 146 *V REF
7 DQ4 35 A4 63 CKE1 91 DQ36 119 A5 147 DNU
8 DQ5 36 A6 64 V
SS 92 DQ37 120 A7 148 V SS
9 DQ6 37 A8 65 DQ21 93 DQ38 121 A9 149 DQ53
10 DQ7 38 A10/AP 66 DQ22 94 DQ39 122 BA0 150 DQ54
11 DQ8 39 BA1 67 DQ23 95 DQ40 123 A11 151 DQ55
12 V SS 40 V CC 68 V SS 96 V SS 124 V CC 152 V SS
13 DQ9 41 V CC 69 DQ24 97 DQ41 125 CLK1 153 DQ56
14 DQ10 42 CLK0 70 DQ25 98 DQ42 126 *A12 154 DQ57
15 DQ11 43 V SS 71 DQ26 99 DQ43 127 V SS 155 DQ58
16 DQ12 44 DNU 72 DQ27 100 DQ44 128 CKE0 156 DQ59
17 DQ13 45 CS2# 73 V
CC 101 DQ45 129 CS3# 157 V CC
18 V CC 46 DQM2 74 DQ28 102 V CC 130 DQM6 158 DQ60
19 DQ14 47 DQM3 75 DQ29 103 DQ46 131 DQM7 159 DQ61
20 DQ15 48 DNU 76 DQ30 104 DQ47 132 *A13 160 DQ62
21 *CB0 49 V CC 77 DQ31 105 *CB4 133 V CC 161 DQ63 22 *CB1 50 NC 78 V SS 106 *CB5 134 NC 162 V SS
23 V SS 51 NC 79 CLK2 107 V SS 135 NC 163 CLK3
24 NC 52 *CB2 80 NC 108 NC 136 *CB6 164 NC
25 NC 53 *CB3 81 WP*** 109 NC 137 *CB7 165 **SA0
CC 54 V SS 82 SDA 110 V CC 138 V SS 166 SA1
27 WE# 55 DQ16 83 SCL 111 CAS# 139 DQ48 167 SA2
28 DQM0 56 DQ17 84 V
CC 112 DQM4 140 DQ49 168 V CC These pins should be NC in the system which does not support SPD. * WP available on the WED3DG6335V-D2. A0 – A12 Address input (Multiplexed) BA0-1 Select Bank DQ0-63 Data Input/Output CB0-7 Check bit (Data-in/Data-out) CLK0-CLK3 Clock input CKE0# Clock Enable input CS0#-CS2# Chip select Input RAS# Row Address Strobe CAS# Column Address Strobe WE# Write Enable DQM0-7 DQM V CC Power Supply (3.3V) VSS Ground SDA Serial data I/O SCL Serial clock DNU Do not use NC No Connect WP Write Protect
2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W3DG6435V-D2 July 2004 Rev. 0 PRELIMINARY FUNCTIONAL BLOCK DIAGRAM CS0# DQM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM1 DQM2 CS2# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM0 DQM1 DQM2 CS0# CS0# CS2# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM3 CS2# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQM4 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQM5 DQM6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM4 DQM5 DQM6 CS0# CS0# CS2# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM7 CS2# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 SCL A0 A1 A2 SA0 SA2SA1 SDA A0 ~ A12, BA0 & 1 RAS# CAS# WE# CKE0 SDRAM U0 ~ U7 SDRAM U0 ~ U7 SDRAM U0 ~ U7 SDRAM U0 ~ U7 SDRAM U0 ~ U7 Every DQpin of SDRAMDQn VCC VSS Two 0.1uF Capacitors per each SDRAM To all SDRAMS WP
3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W3DG6435V-D2 July 2004 Rev. 0 PRELIMINARY ABSOLUTE MAXIMUM RATINGS Parameter Symbol Value Units Voltage on any pin relative to VSS VIN, VOUT -1.0 ~ 4.6 V Voltage on VCC supply relative to VSS V CC, VCCQ -1.0 ~ 4.6 V Storage Temperature TSTG -55 ~ +150 °C Power Dissipation PD 8 W Short Circuit Current IOS 50 mA Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability.RECOMMENDED DC OPERATING CONDITIONS Voltage Referenced to: VSS = 0V, 0°C ≤ TA ≤ +70°C Parameter Symbol Min Typ Max Unit Note Supply Voltage V CC 3.0 3.3 3.6 V Input High Voltage V IH 2.0 3.0 V CCQ+0.3 V 1 Input Low Voltage V IL -0.3 — 0.8 V 2 Output High Voltage V OH 2.4 — — V IOH= -2mA Output Low Voltage V OL — — 0.4 V IOL= -2mA Input Leakage Current I LI -10 — 10 µA 3 Note: 1. V IH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns. 2. V IL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ V IN ≤ VCC Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE TA = 25°C, f = 1MHz, V CC = 3.3V, VREF=1.4V ± 200mV Parameter Symbol Max Unit Input Capacitance (A0-A12) C IN1 45 pF Input Capacitance (RAS#,CAS#,WE#) C IN2 45 pF Input Capacitance (CKE0) C IN3 45 pF Input Capacitance (CLK0) C IN4 10 pF Input Capacitance (CS0#,CS2#) C IN5 25 pF Input Capacitance (DQM0-DQM7) C IN6 8p F Input Capacitance (BA0-BA1) C IN7 45 pF Data input/output capacitance (DQ0-DQ63) C OUT 9.5 pF
4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W3DG6435V-D2 July 2004 Rev. 0 PRELIMINARY OPERATING CURRENT CHARACTERISTICS VCC = 3.3V, 0°C ≤ TA ≤ 70°C Parameters Symbol Conditions Versions Units Note 133 100 Operating Current (One bank active) ICC1 Burst Length = 1 tRC ≥ tRC(min) IOL = 0mA 800 800 mA 1 Precharge Standby Current in Power Down Mode ICC2P CKE ≤ VIL(max), tCC = 10ns 16 mA ICC2PS CKE & CK ≤ VIL(max), tCC = ∞ 16 mA Precharge Standby Current in Non-Power Down Mode ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns Input signals are charged one time during 20 160 mA ICC2NS CKE ≥ VIH(min), CK ≤ VIL(max), tCC= ∞ Input signals are stable 80 mA Active standby current in power- down mode ICC3P CKE ≥ VIL(max), tCC = 10ns 48 mA ICC3PS CKE & CK ≤ VIL(max), tCC = ∞ 48 Active standby in current non power-down mode ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are charged one time during 20ns 240 mA ICC3NS CKE ≥ VIH(min), CK ≤ VIL(max), tCC = ∞ input signals are stable 200 mA Operating current (Burst mode) ICC4 Io = mA Page burst
4 Banks activated
t CCD = 2CK 880 880 mA 1 Refresh current I CC5 tRC ≥ tRC(min) 1760 1760 mA 2 Self refresh current I CC6 CKE ≤ 0.2V 24 mA Notes: 1. Measured with outputs open. 2. Refresh period is 64ms.
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W3DG6435V-D2 July 2004 Rev. 0 PRELIMINARY ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES) 3.99 (0.157) (2X) 8.89 (0.350) 6.35 (0.250) 11.43 (0.450) 3.18 (0.125) (2X) 133.48 (5.255 MAX.) 115.57 (4.550) 6.35 (0.250) 54.61 (2.150) 1.27 ± 0.10 (0.050 ± 0.004) 3.99 (0.157 MIN.) 2.54 (0.100) MAX. 30.48 (1.200) MAX.17.78 (0.700) 42.16 (1.660) 36.83 (1.450) PACKAGE DIMENSIONS
ORDERING INFORMATION
Part Number Speed CAS Latency Height* W3DG6335V10D2 100MHz CL=2 30.48 (1.20") W3DG6335V7D2 133MHz CL=2 30.48 (1.20") W3DG6335V75D2 133MHz CL=3 30.48 (1.20") Note: Available with "WP" Write Protect on pin 81. Part Number Speed CAS Latency Height* W3DG6435V10D2 100MHz CL=2 30.48 (1.20") W3DG6435V7D2 133MHz CL=2 30.48 (1.20") W3DG6435V75D2 133MHz CL=3 30.48 (1.20") Note: Modules are available in industrial temperature - 40°C to 85°C.
6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W3DG6435V-D2 July 2004 Rev. 0 PRELIMINARY Document Title 256MB - 32Mx64 SDRAM UNBUFFERED
Revision History
Rev # History Release Date Status Rev A Created 12-18-01 Advanced Rev B B.1 Add "Part Number" to order info table on pg. 6 B.2 Changed module height on pg 6 to 1.1 2-14-02 Advanced Rev C Add "WP" Write Protect on Pin 81 4-10-02 Advanced Rev D Corrected mechanical drawing (1.2") 5-21-02 Advanced Rev 0 0.1 Update CAP and I DD specs