STP20NK50Z STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 500V - 0.23Ω - 20A TO-220/TO-247 Zener-Protected SuperMESH™Power MOSFET ■ TYPICAL R DS (on) = 0.23Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ GATE CHARGE MINIMIZED ■ VERY LOW INTRINSIC CAPACITANCES ■ VERY GOOD MANUFACTURING REPEATIBILITY

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip- based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. Such series comple- ments ST full range of high voltage MOSFETs in- cluding revolutionary MDmesh™ products.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC

ORDERING INFORMATION

TYPE V DSS R DS(on) ID Pw STP20NK50Z STW20NK50Z 500 V 500 V < 0.27Ω < 0.27Ω 20 A 20 A 190 W 190 W SALES TYPE MARKING PACKAGE PACKAGING STP20NK50Z P20NK50Z TO-220 TUBE STW20NK50Z W20NK50Z TO-247 TUBE TO-220 TO-247 INTERNAL SCHEMATIC DIAGRAM

(/circle6 ) Pulse width limited by safe operating area (1) ISD ≤20A, di/dt≤200A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX. (*) Limited only by maximum temperature allowed THERMAL DATA AVALANCHE CHARACTERISTICS GATE-SOURCE ZENER DIODE PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Symbol Parameter Value Unit STP20NK50Z STW20NK50Z VDS Drain-source Voltage (VGS =0 ) 500 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 500 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuos) at TC = 25°C 20 20 A ID Drain Current (continuos) at TC = 100°C 10 10 A IDM (/circle6 ) Drain Current (pulsed) 64 64 A PTOT Total Dissipation at TC = 25°C 190 190 W Derating Factor 1.51 1.51 W/°C VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 4000 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns Tj Tstg Operating Junction Temperature Storage Temperature -55 to 150 -55 to 150 TO-220 TO-247 Rthj-case Thermal Resistance Junction-case Max 0.66 0.66 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 50 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tjmax) 20 A EAS Single Pulse Avalanche Energy (starting Tj= 25 °C, ID =IAR ,VDD =5 0V ) TBD mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Voltage Igs=± 1mA (Open Drain) 30 V

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. C oss eq.is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS . Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID =1m A ,VGS = 0 500 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS = Max Rating VDS = Max Rating, TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS =V GS ,ID = 250µA 3 3.75 4.5 V R DS(on) Static Drain-source On Resistance VGS =1 0 V ,ID = 10 A 0.23 0.27 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS =8V ,ID = 10 A TBD S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5 V ,f=1M H z ,VGS = 0 2600 400 pF pF pF C oss eq.(3) Equivalent Output Capacitance VGS =0 V ,VDS = 0V to 400V TBD pF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD =2 5 0V ,ID =1 0A R G = 4.7Ω VGS =1 0V (Resistive Load see, Figure 3) TBD TBD ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =4 0 0 V ,ID =2 0A , VGS =1 0 V TBD TBD nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit t d(off) tf Turn-off Delay Time Fall Time VDD = 250 V, ID =1 0A R G =4 . 7Ω VGS =1 0V (Resistive Load see, Figure 3) TBD TBD ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD = 400V, ID =2 0A , R G =4 . 7Ω, VGS = 10V (Inductive Load see, Figure 5) TBD TBD TBD ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD ISDM (2) Source-drain Current Source-drain Current (pulsed) TBD TBD A A VSD (1) Forward On Voltage ISD =2 0A ,VGS =0 TBD V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A, di/dt = 100A/µs VDD =3 5 V ,Tj= 150°C (see test circuit, Figure 5) TBD TBD TBD ns µC A

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

DIM. mm. inch A 4.85 5.15 0.19 0.20 D 2.20 2.60 0.08 0.10 E 0.40 0.80 0.015 0.03 F 1 1.40 0.04 0.05 F1 3 0.11 F2 2 0.07 F3 2 2.40 0.07 0.09 F4 3 3.40 0.11 0.13 G 10.90 0.43 H 15.45 15.75 0.60 0.62 L 19.85 20.15 0.78 0.79 L1 3.70 4.30 0.14 0.17 L2 18.50 0.72 L3 14.20 14.80 0.56 0.58 L4 34.60 1.36 L5 5.50 0.21 M 2 3 0.07 0.11 V 5º 5º V2 60º 60º Dia 3.55 3.65 0.14 0.143 TO-247 MECHANICAL DATA

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