VPH5-1200-R

VPH1-1400-R EATON | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

• Six winding, surface mount devices that offer more than 500 usable inductor or transformer configurations
• High power density and low profile
• Low radiated noise and tightly coupled windings
• Power range from 1 Watt – 70 Watts
• Frequency range to over 1 MHz
• 500 Vac Isolation
• Ferrite core material VP VERSA-PAC® Inductors and Transformers (Surface Mount) Technical Data 4301 Effective August 2017 Supersedes March 2007

Applications

• Inductors: buck, boost, coupled, choke, filter, resonant, noise filtering, differential, forward, common mode
• Transformers: flyback, feed forward, push- pull, multiple output, inverter, step-up, step- down, gate drive, base drive, wide band, pulse, control, impedance, isolation, bridging, ringer, converter, autoAutomotive electronics (under hood, interior/exterior)
• T elematics
• GPS
• LED Lighting
• LCD Display
• Portable media devices Environmental data
• Storage temperature range (component): -55 °C to +125 °C
• Operating temperature range: -40 °C to +125 °C (ambient plus self-temperature rise)
• Solder reflow temperature: J-STD-020 (latest revision) compliant

VERSA-PAC® Inductors and Transformers (Surface Mount) Product specifications Leakage Thermal Part (1) L(BASE) SAT(BI ASE) RMSI (BASE)R B( ASE) Volt-µ SEC(BASE)E PEAK(BASE) Inductance Resistance Number µH (A) (A) Ohms µVs µJ ( BASE) µH ° C/Watt (NOM)(2) (TYP)(3)(4) (TYP)(3)(5) (MAX)(6) (MAX)(7) (TYP)(8) (TYP) ( TYP)(9) www.eaton.com/electronics

www.eaton.com/electronics VP VERSA-PAC® Inductors and Transformers (Surface Mount) Technical Data 4301 Effective August 2017 (1) The first three or four digits in the part number signify the size of the package. The next four digits specify the A L, or nanoHenries per turn squared. -R indicates RoHS compliant. (2) LBASE = Nominal Inductance of a single winding. (3) IBASE is the lessor of ISAT(BASE) and IRMS(BASE). (4) Peak current that will result in 30% saturation of the core. This current value assumes that equal current flows in all six windings. For applications in which all windings are not simultaneously driven (i.e. flyback, SEPIC, Cuk, etc.), the saturation current per winding may be calculated as follows: ISAT = 6 x I SAT(BASE) Number of Windings Driven (5) RMS Current that results in a surface temperature of approximately 40 °C above ambient. The 40 °C rise occurs when the specified current flows through each of the six windings. (6) Maximum DC Resistance of each winding. (7) For multiple windings in series, the volt-µsecond TOTAL (µVs) capability varies as the number of windings in series (S): Volt-µsecTOTAL = S x Volt-µsec(BASE) For multiple windings in parallel, the volt-µsecondTOTAL (µVs) capability is as shown in the table above. (8) Maxim um Energy capability of each winding. This is based on 30% saturation of the core: EnergySERIES = S x x 0.7LBASE x I SAT(BASE)2 EnergyPARALLEL = P x x 0.7LBASE x I SAT(BASE) For multiple windings, the energy capability varies as the square of the number of windings. For example, six windings (either parallel or series) can store 36 times more energy than one winding. (9) Thermal Resistance is the approximate surface temperature rise per Watt of heat loss under still-air conditions. Heat loss is a combination of core loss and wire loss. The number assumes the underlying PCB copper area equals 150% of the component area. ( 10) These devices are designed for feed-forward applications, where load current dominates magnitizing current. VERSA-PAC temperature rise depends on total power losses and size. Any other PCM configurations other than those suggested could run hotter than acceptable. Certain topologies or applications must be analyzed for needed requirements and matched with the best VERSA-PAC size and configuration. Proper consideration must be used with all parameters, especially those associated with current rating, energy storage, or maximum volt-seconds. VERSA-PAC should not be used in off-line or safety related applications. The breakdown voltage from one winding to any other winding is 500 VAC maximum. Product specifications- notes Dimensions- mm VP1 and VPH1 TOP VIEW WHITE DOT PIN #1 D (12 PLCS) LOGO (OPTIONAL) B C A FRONT VIEW I (12 PLCS) H G (2 PLCS) WWLLYY R E F RECOMMENDED PCB LAYOUT J N M COMPONENT SIDE 1 12 6 7 L (12PLCS) K (12PLCS) 0 (10PLCS) P (10PLCS) 1:1:1:1:1:1 A A AB EFGH I JKLMNOP mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm max ref max ref ref max ref ref ref ref ref max NOTES: 1)Tolerances A - I are ± 0.25 mm unless specified otherwise. 2)Tolerances J - P are +/- 0.1 mm unless specified otherwise. 3)Marking: a)Dot for pin #1 identification b) VP(H)x-xxx (product code, size, 4 digit part number per family table.) c) Versa Pac Logo (optional) d) wwllyy = (date code) R = (revision level) 4)All soldering surfaces must be coplanar within 0.102 mm. 5)Packaged in tape and reel 600 parts per reel

VERSA-PAC® Inductors and Transformers (Surface Mount) VP2 and VPH2 TOP VIEW WHITE DOT PIN #1 D (12 PLCS) LOGO (OPTIONAL) B C A FRONT VIEW I (12 PLCS) H G (2 PLCS) WWLLYY R E F RECOMMENDED PCB LAYOUT J N M COMPONENT SIDE 1 12 6 7 L (12PLCS) K (12PLCS) 0 (10PLCS) P (10PLCS) 1:1:1:1:1:1 A B C D E F G H IJ K L M N O P mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm max ref max ref ref max ref ref ref ref ref max VP3 and VPH3 A B DC EFGH I JKLMN O mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm max ref max ref max ref ref ref ref ref max TOP VIEW D (12 PLCS) LOGO (OPTIONAL) B C A WHITE DOT PIN #1 FRONT VIEW H (12 PLCS) G (12 PLCS) F (2 PLCS) E 1:1:1:1:1:1 J (12PLCS) COMPONENT SIDE K (12PLCS) O (10PLCS) N (10PLCS) M L 1 12 6 7 I www.eaton.com/electronics NOTES: 1)Tolerances A - I are ± 0.25 mm unless specified otherwise. 2)Tolerances J - P are +/- 0.1 mm unless specified otherwise. 3)Marking: a)Dot for pin #1 identification b) VP(H)x-xxx (product code, size, 4 digit part number per family table.) c) Versa Pac Logo (optional) d) wwllyy = (date code) R = (revision level) 4)All soldering surfaces must be coplanar within 0.102 mm. 5)Packaged in tape and reel 300 parts per reel 10 7 NOTES: 1)Tolerances A - I are ± 0.25 mm unless specified otherwise. 2)Tolerances J - P are +/- 0.1 mm unless specified otherwise. 3)Marking: a)Dot for pin #1 identification b) VP(H)x-xxx (product code, size, 4 digit part number per family table.) c) Versa Pac Logo (optional) d) wwllyy = (date code) R = (revision level) 4)All soldering surfaces must be coplanar within 0.102 mm. 5)Packaged in tape and reel 200 parts per reel

www.eaton.com/electronics Dimensions- mm VP VERSA-PAC® Inductors and Transformers (Surface Mount) Technical Data 4301 Effective August 2017 VP4 and VPH4 A CB DE F GH I J KLMN O mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm max ref max ref max ref ref ref ref ref max TOP VIEW D (12 PLCS) LOGO (OPTIONAL) B C A WHITE DOT PIN #1 FRONT VIEW H (12 PLCS) G (12 PLCS) F (2 PLCS) E 1:1:1:1:1:1 J (12PLCS) COMPONENT SIDE K (12PLCS) O (10PLCS) N (10PLCS) M L 1 12 6 7 I VP5 and VPH5 AB CDEFGH I JKLMN O mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm max ref max ref max ref ref ref ref ref max TOP VIEW D (12 PLCS) LOGO (OPTIONAL) B C A WHITE DOT PIN #1 FRONT VIEW H (12 PLCS) G (12 PLCS) F (2 PLCS) E 1:1:1:1:1:1 J (12PLCS) COMPONENT SIDE K (12PLCS) O (10PLCS) N (10PLCS) M L 1 12 6 7 I NOTES: 1)Tolerances A - I are ± 0.25 mm unless specified otherwise. 2)Tolerances J - P are +/- 0.1 mm unless specified otherwise. 3)Marking: a)Dot for pin #1 identification b) VP(H)x-xxx (product code, size, 4 digit part number per family table.) c) Versa Pac Logo (optional) d) wwllyy = (date code) R = (revision level) 4)All soldering surfaces must be coplanar within 0.102 mm. 5) Bulk packaged For tape and reel add TR to part number: (i.e. VP4-0140TR-R) 140 parts per reel NOTES: 1)Tolerances A - I are ± 0.25 mm unless specified otherwise. 2)Tolerances J - P are +/- 0.1 mm unless specified otherwise. 3)Marking: a)Dot for pin #1 identification b) VP(H)x-xxx (product code, size, 4 digit part number per family table.) c) Versa Pac Logo (optional) d) wwllyy = (date code) R = (revision level) 4)All soldering surfaces must be coplanar within 0.102 mm. 5) Bulk packaged For tape and reel add TR to part number: (i.e. VP5-0155TR-R) 115 parts per reel

How to use multiple windings VP VERSA-PAC® Inductors and Transformers (Surface Mount) LTOTAL = LBASE x S = 10 µH x 2 = 40 µH Where: LBASE = Inductance of a single winding P = Number of windings in parallel (use 1 with all windings in series) S = Number of windings in series IBASE = Maximum current rating of one winding IMAX = IBASE x P = 1 Amp x 1 = 1 Amp L TOTAL= L BASE x S = 10 µH x 1 = 10 µH IMAX = IBASE x P = 1 Amp x 2 = 2 Amps 10µH

1 Amp

10µH 10µH Series Connected (2 Windings) Parallel Connected (2 Windings) 10µH Windings on the same magnetic core behave differently. Two windings in series result in four times the inductance of a single winding. This is because the inductance varies proportionately to the square of the turns. Paralleled VERSA-PACwindings result in no change to the net inductance because the total number of turns remains unchanged; only the effective wire size becomes larger. Two parallel windings result in approximately twice the current carrying capability of a single winding. The net inductance of a given PCM configuration is based on the number of windings in series squared multiplied by the inductance of a single winding (LBASE).The current rating of a PCM configuration is derived by multiplying the maximum current rating of one winding (IBASE) by the number of windings in parallel. Examples of simple two-winding devices are shown below: Discrete inductors combine like resistors, when connected in series or parallel. For example, inductors in series add and inductors in parallel reduce in a way similar to Ohm’s Law. LSeries = L1 + L2 + L3...Ln LParallel = 1/ [1/L1 + 1/L2 + 1/L3....1/Ln ] www.eaton.com/electronics

www.eaton.com/electronics VP VERSA-PAC® Inductors and Transformers (Surface Mount) How to pin-configure VERSA-PAC® Technical Data 4301 Effective August 2017 11 2 Component View LTOTAL = 36 x LBASE = 36 times the base□ Inductance from Data Table. PIN CONFIGURATIONS□ Each VERSA-PAC can be configured in a variety of ways by simply connecting pins together on the Printed Circuit Board (PCB). As shown below, the connections on the PCB are equal to the pin configuration statement shown at the bottom of the schematic symbol. Connecting a number of windings in parallel will increase the current carrying capability, while connecting in series will multiply the inductance. Each VERSA-PAC part can be configured in at least 6 combinations for inductor use or configured in at le ast 15 turns rat ios for tr ansformer applications. The VERSA-PAC allows for at least 500 magnetic configurations. The PCM configurations can either be created by the designer or simply chosen from the existin g PCM diagrams. The following inductor example shows 6 windings in series, which result in an inductance of 36 times the base inductance and 1 times the base current. INDUCTOR EXAMPLE FOR SIZES VP3, VP4 AND VP5 The PCM configurations may be selected from the examples above or created by the designer. The printed circuit board layout in each example illustrates the connections to obtain the desired inductance or turns ratio. The examples may be used by the PCB designer to configure VERSA-PAC as desired. To assist the designer, VERSA-PAC phasing, coupling and thermal issues have been considered in each of the PCM configurations illustrated. Additionally, the inductance and current ratings, as a function of the respective base values are shown in each PCM example. It is important to carefully select the proper VERSA-PAC part in order to minimize the component size without exceeding the RMS current capability or saturating the core. The Product specification table indicates maximum ratings. Each VERSA-PAC may be used in at least 15 transformer applications. More than 375 transformer combinations may be achieved using the available VERSA-PAC parts. TRANSFORMER EXAMPLE FOR SIZES VP3, VP4 AND VP5 4 11 2 LPRIMARY = 1 x LBASE IPRI = 1 x IBASE ISEC = 1 x IBASE 1:5 PIN CONFIGURATIONS□

VERSA-PAC® Inductors and Transformers (Surface Mount) 5V to 3.3V Buck Converter With 5V Output This circuit minimizes both board space and cost by eliminating a second regulator. VERSA-PAC’s gap serves to prevent core saturation during the switch on-time and also stores energy for the +5V load which is delivered during the flyback interval. The +3.3V buck winding is configured by placing two windings in series while the +5V is generated by an additional flyback winding stacked on the 3.3V output. Extra windings are paralleled with primary windings to handle more current. The turns ratio of 2:1 adds 1.67V to the +3.3V during the flyback interval to achieve +5V. +3.3V@ □ 12.5A RTN VERSA-PAC□ VP5-0083 Synchronous□ Controller□ IC V + +5V@□ +3.3V@ □ 4.2A RTN VERSA-PAC□ VP5-0083 LEVEL SHIFT 12,11 1,2 10,9,8 3,4,5 Synchronous□ Controller□ IC 3.3V Buck Converter This circuit utilizes the gap of the VP5-0083 to handle the 12.5 Amp output current without saturating. In each of the fiveVERSA- PACsizes, the gap is varied to achieve a selection of specific inductance and current values (see VERSA-PAC Data Table). All six windings are connected in parallel to minimize AC/DC copper losses and to maximize heat dissipation. With VERSA- PAC, this circuit works well at or above 300 KHz. Also, the closed flux-path EFD geometry enables much lower radiation characteristics than open-path bobbin core style components. LITHIUM-ION BATTERY TO 3.3V SEPIC CONVERTER The voltage of a Lithium-Ion Battery varies above and below +3.3V depending on the degree of charge. The SEPIC configuration takes advantage of VERSA-PAC’s multiple tightly coupled windings. This results in lower ripple current which lowers noise and core losses substantially. The circuit does not require a snubber to control the voltage “spike” associated with switch turn- off, and is quite efficient due to lower RMS current in the windings. +3.3V@ □ VERSA-PAC□ VP5-0083 12 11 10 123 987 Controller□ IC□ W/Integral□ Switch Watts 100 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 200 300 400 500 VP 5 VP 4 VP 3 VP 2 VP 1 Watts Frequency, kHz 100 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 200 300 400 500 VP 5 VP 4 VP 3 VP 2 Bipolar (Push-Pull) Power vs Frequency Frequency, kHz Unipolar (Flyback) Power vs Frequency Technical Data 4301 Effective August 2017 VERSA-PAC® Performance characteristics VP 1 OCL vs. Isat 100.0% 90.0% 80.0% 70.0% 60.0% 50.0% 40.0% 30.0% 20.0% 10.0% 0.0% % of Isat % of OCL These curves represent typical power handling capability. Indicated power levels may not be achievable with all configurations. Inductance characteristics www.eaton.com/electronics

Life Support Policy: Eaton does not authorize the use of any of its products for use in life support devices or systems without the express written approval of an officer of the Company. Life support systems are devices which support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Eaton reserves the right, without notice, to change design or construction of any products and to discontinue or limit distribution of any products. Eaton also reserves the right to change or update, without notice, any technical information contained in this bulletin. Eaton Electronics Division

1000 Eaton Boulevard

Cleveland, OH 44122 United States www.eaton.com/electronics © 2017 Eaton All Rights Reserved Printed in USA Publication No. 4301 August 2017 Eaton is a registered trademark. All other trademarks are property of their respective owners. Solder Reflow Profile Temperature t tP ts TC -5°C Time 25°C to Peak Time 25°C Tsmin Tsmax TL TP Preheat A Max. Ramp Up Rate = 3°C/s Max. Ramp Down Rate = 6°C/s TTaabbllee 11 -- SSttaannddaarrdd SSnnPPbb SSoollddeerr ((TTcc)) VolumeVolume Package mm 3 mm3 Thickness <350 _>350 <2.5mm 235°C 220°C TTaabbllee 22 -- LLeeaadd ((PPbb)) FFrreeee SSoollddeerr ((TTcc)) Volume Volume Volume Package mm 3 mm3 mm3 Thickness <350 350 35 350 - >2000 <1.6mm 260°C 260°C 260°C 1.6 – 2.5mm 260°C 250°C 245°C >2.5mm 250°C 245°C 245°C Reference JDEC J-STD-020 Standard SnPb Solder Lead (Pb) Free SolderProfile Feature Preheat and Soak eT mperature min. (Tsmin) 100°C 150°C  Temperature max. (Tsmax) 150°C 200°C  Time (Tsmin to Tsmax) (ts) 60-120 Seconds 60-120 Seconds 3°C/ Second Max. 3°C/ Second Max. 183°C 217°C 60-150 Seconds 60-150 Seconds Table 1 able 2T

20 Seconds 30 Seconds

6°C/ Second Max. 6°C/ Second Max. Average ramp up rate Tsmax to Tp Liquidous temperature (TL) Time at liquidous (tL) Peak package body temperature (TP)* Time (tp)** within 5 °C of the specified classification temperature (T c) Average ramp-down rate (Tp to Tsmax) Time 25°C to Peak Temperature Minutes Max.6 8 Minutes Max. * Tolerance for peak profile temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Technical Data 4301 Effective August 2017 VP VERSA-PAC® Inductors and Transformers (Surface Mount)