OMNIFET: fully autoprotected Power MOSFET

Document overview

  • Manufacturer or author: STMICROELECTRONICS
  • PDF pages: 22

Technical content

Datasheet sections

  • 1 Block diagram
  • 2 Electrical specifications
  • 2.1 Absolute maximum rating
  • 2.2 Thermal data
  • 2.3 Electrical characteristics
  • 2.4 Electrical characteristics curves
  • 2.5 Waveforms
  • 3 Protection features
  • 4 Package and packing information
  • 4.1 ECOPACK ®
  • 4.2 TO-263 (D2PAK) mechanical data
  • 4.3 PowerSO-10 mechanical data
  • 5 Revision history

Features

■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the Power MOSFET (analog driving) ■ Compatible with standard Power MOSFET

Description

The VNB49N04, VNV49N04 are monolithic devices designed in STMicroelectronics™ VIPower™ M0 technology, intended for replacement of standard Power MOSFETs from DC up to 50 KHz applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. Type V CLAMP RDS(ON) ILIM VNB49N04

42 V 20 m Ω 49 A

Table 1. Device summary

1 Block diagram

Figure 1. Block diagram Figure 2. Connection diagram (top view)

2 Electrical specifications

2.1 Absolute maximum rating

and other relevant quality document.

2.2 Thermal data

Table 2. Absolute maximum rating Table 3. Thermal data

2.3 Electrical characteristics

Table 4. Off Table 5. On (1)

  1. Pulsed: pulse duration = 300µs, duty cycle 1.5%

Table 6. Dynamic

  1. Pulsed: pulse duration = 300µs, duty cycle 1.5%

Table 7. Switching (1)

  1. Parameters guaranteed by design/characterization

Table 7. Switching (1) (continued) Table 8. Source drain diode

  1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
  2. Parameters guaranteed by design/characterization.

Table 9. Protections

  1. Parameters guaranteed by design/characterization.

2.4 Electrical characteristics curves

Figure 3. Thermal impedance for D2PAK / Figure 4. Derating curve Figure 5. Output characteristics Figure 6. Transconductance Figure 7. Static drain-source on resistance Figure 8. Static drain-source on resistance

2.5 Waveforms

Figure 25. Unclamped inductive load test circuits Figure 26. Unclamped inductive waveforms

Protection features VNB49N04 - VNV49N04 16/22 Doc ID 1641 Rev 3

3 Protection features

During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current (IISS) flows into the INPUT pin in order to supply the internal circuitry. The device integrates:

  • Overvoltage clamp protection: Internally set at 42V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.
  • Linear current limiter circuit: Limits the drain current ID to ILIM whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh.
  • Overtemperature and short circuit protection: These are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150 °C. The device is automatically restarted when the chip temperature falls below 135 °C.
  • Status feedback: In the case of an overtemperature fault condition, a status feedback is provided through the INPUT pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100Ω. The failure can be detected by monitoring the voltage at the INPUT pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in R DS(ON)). Obsolete Product(s) - Obsolete Product(s)

4 Package and packing information

4.1 ECOPACK ®

specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.2 TO-263 (D2PAK) mechanical data

Table 10. TO-263 (D2PAK) mechanical data

Figure 31. TO-263 (D2PAK) package dimension

4.3 PowerSO-10 mechanical data

Table 11. PowerSO-10 mechanical data

Figure 32. PowerSO-10 package dimension

5 Revision history

Table 12. Document revision history 01-Oct-1999 1 Initial release. 20-Sep-2013 3 Updated Disclaimer.