Quad channel high side driver
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 28
Technical content
Datasheet sections
- 1 Block diagram and pin description
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Electrical characteristics curves
- 3 Application information
- 3.1 GND protection network against reverse battery
- 3.1.1 Solution 1: a resistor in the ground line (RGND only)
- 3.1.2 Solution 2: a diode (D GND) in the ground line
- 3.2 Load dump protection
- 3.3 MCU I/O protection
- 3.4 Open load detection in off state
- 3.5 Maximum demagnetization energy (V
- 4 Package and PCB thermal data
- 4.1 SO-28 thermal data
- 5 Package and packing information
- 5.1 ECOPACK ® packages
- 5.2 SO-28 packing information
- 6 Revision history
Features
■ CMOS compatible inputs ■ Open Drain status outputs ■ On state open load detection ■ Off state open load detection ■ Shorted load protection ■ Undervoltage and overvoltage shutdown ■ Loss of ground protection ■ Very low standby current ■ Reverse battery protection(a)
Description
The VNQ830M is a quad HSD formed by assembling two VND830M chips in the same SO- 28 package. The VND830M is a monolithic device made using| STMicroelectronics VIPower M0-3 Technology. The VNQ830M is intended for driving any type of multiple load with one side connected to ground. The Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects the open load condition in both the on and off state. In the off state the device detects if the output is shorted to V CC. The device automatically turns off in the case where the ground pin becomes disconnected. Type R DS(on) IOUT VCC VNQ830M 60m Ω(1) 1. Per each channel. 6A 36V a. See Application schematic on page 18 SO-28 (double island) Table 1. Device summary
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view) Table 2. Suggested connections for unused and not connected pins
2 Electrical specifications
2.1 Absolute maximum ratings
Program and other relevant quality document. Table 3. Absolute maximum ratings
2.2 Thermal data
2.3 Electrical characteristics
Figure 3. Current and voltage conventions Note: V Fn = VCCn - VOUTn during reverse battery condition. Table 4. Thermal data (per island)
- When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
- When mounted on a standard single-sided FR-4 board with 6cm 2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.
Table 5. Power output Table 6. Protections
55 V Obsolete Product(s) - Obsolete Product(s)
Table 12. Truth table
Table 13. Electrical transient requirements and cannot be returned to proper operation without replacing the device.
Figure 6. Waveforms
2.4 Electrical characteristics curves
Figure 7. Off state output current Figure 8. High level input current Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope Figure 11. Overvoltage shutdown Figure 12. Turn-off voltage slope
3 Application information
Figure 24. Application schematic Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
3.1 GND protection networ k against reverse battery
3.1.1 Solution 1: a resist or in the ground line (RGND only)
This can be used with any type of load.
where - IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0 during reverse battery situations) is: PD = ( - VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that, if the microprocessor ground is not shared by the device ground, then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND . If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (D GND) in the ground line
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/O pins from latching up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os: - VCCpeak / Ilatchup ≤ Rprot ≤ (VOHµC - VIH - VGND) / IIHmax Obsolete Product(s) - Obsolete Product(s)
3.4 Open load detection in off state
VOUT = (VPU / (RL + RPU))RL < VOlmin. VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2). Figure 25. Openload detection in Off state
Figure 26. Maximum turn-off current versus load inductance Note: Values are generated with R L = 0Ω. must not exceed the temperature specified above for curves B and C.
4 Package and PCB thermal data
4.1 SO-28 thermal data
Figure 27. SO-28 PC board thickness = 2mm, Cu thickness = 35µm, Copper areas: 0.5 cm2, 3 cm2, 6 cm2). Table 14. Thermal calculation according to the PCB heatsink area
Figure 30. Thermal fitting model of a quad channel HSD in SO-28 Table 15. Thermal parameters
5 Package and packing information
5.1 ECOPACK ® packages
conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 31. SO-28 package dimensions Table 16. SO-28 mechanical data
5.2 SO-28 packing information
Figure 32. SO-28 tube shipment (no suffix) Figure 33. SO-28 tape and reel shipment (suffix “TR”)
6 Revision history
Table 17. Document revision history 09-Sep-2004 1 Initial release. Current and voltage convention update (page 3). and not connected pins insertion (page 3). 6 cm2 Cu condition insertion in thermal data table (page 4). PROTECTIONS note insertion (page 5). CC - output diode section update (page 5). Revision history table insertion (page 20). Disclaimers update (page 21). Document reformatted and restructured. Added contents, list of tables and figures. 24-Sep-2013 4 Updated Disclaimer.