VNQ5E160MK-E STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 34
Technical content
Datasheet sections
- 1 Block diagram and pin configuration
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Waveforms
- 2.5 Electrical characteristics curves
- 3 Application information
- 3.1 GND protection network against reverse battery
- 3.1.1 Solution 1: resistor in the ground line (RGND only)
- 3.1.2 Solution 2 : diode (DGND) in the ground line
- 3.2 Load dump protection
- 3.3 MCU I/Os protection
- 3.4 Current sense and diagnostic
- 4 Package and PC board thermal data
- 4.1 PowerSSO-24 thermal data
- 5 Package and packing information
- 5.1 ECOPACK ® packages
- 5.2 PowerSSO-24 mechanical data
- 5.3 Packing information
- 6 Order codes
- 7 Revision history
Features
- General – Very low standby current – 3.0 V CMOS-compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – Compliant with European directive 2002/95/EC – Very low current sense leakage
- Diagnostic functions – Proportional load current sense – High current sense precision for wide currents range – Current sense disable – Thermal shutdown indication – Overload and short to ground (power limitation) indication
- Protection – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss of V CC – Over temperature shutdown with auto- restart (thermal shutdown) – Reverse battery protected – Electrostatic discharge protection – Inrush current active management by power limitation Application
- All types of resistive, inductive and capacitive loads
- Suitable as LED driver
Description
The VNQ5E160MK-E is a double channel high- side driver manufactured using ST proprietary VIPower ® M0-5 technology and housed in PowerSSO-24 package. The device is designed to drive 12 V automotive grounded loads, and to provide protection and diagnostics. It also implement a 3 V and 5 V CMOS-compatible interface for use with any microcontroller. The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto-restart and over voltage active clamp. A dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and over temperature indication. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to share the external sense resistor with similar devices. Max supply voltage V CC 41V Operating voltage range V CC 4.5 to 28 V Max on-state resistance (per ch.) R ON 160 mΩ Current limitation (typ) I LIMH 10 A Off-state supply current I S 2 µA(1) 1. Typical value with all loads connected. 0OWER33/ ("1($'5
Table 9. Current sense (8 V < V
1 Block diagram and pin configuration
Figure 1. Block diagram Table 1. Pin functions
Figure 2. Configuration diagram (top view) Table 2. Suggested connections for unused and not connected pins
2 Electrical specifications
Figure 3. Current and voltage conventions
- V Fn = VOUTn - VCC during reverse battery condition.
2.1 Absolute maximum ratings
Table 3. Absolute maximum ratings
2.2 Thermal data
Table 3. Absolute maximum ratings (continued) Table 4. Thermal data
2.3 Electrical characteristics
Table 5. Power section
- PowerMOS leakage included.
Table 6. Switching (VCC = 13 V; Tj = 25 °C)
Table 7. Logic Inputs Table 8. Protections and diagnostics (1)
- To ensure long term reliability under heavy overload or short circuit conditions, protection and related
abnormal conditions, this software must limit the duration and number of activation cycles.
5 V < VCC < 28 V 14 A
46 VCC-52 V
Table 9. Current sense (8 V < VCC < 18 V)
Figure 4. Current sense delay characteristics
- Parameter guaranteed by design; it is not tested
- Fault condition includes: power limitation and overtemperature.
Table 9. Current sense (8 V < VCC < 18 V) (continued)
Figure 9. Maximum current sense ratio drift vs load current(1)
- Parameter guaranteed by design; it is not tested.
Table 10. Truth table
- If the V CSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
Table 11. Electrical transient requirements (part 1)
- The above test levels must be considered referred to V CC = 13.5 V except for pulse 5b.
- Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 12. Electrical transient requirements (part 2)
- The above test levels must be considered referred to V CC = 13.5V except for pulse 5b.
Table 13. Electrical transient requirements (part 3) C All functions of the device performed as designed after exposure to disturbance. disturbance and cannot be returned to proper operation without replacing the device.
2.4 Waveforms
Figure 10. Normal operation Figure 11. Overload or short to GND
2.5 Electrical characteristics curves
Figure 14. Off-state output current Figure 15. High level input current Figure 16. Input clamp voltage Figure 17. Input low level voltage Figure 18. Input high level voltage Figure 19. Input hysteresis voltage
3 Application information
Figure 29. Application schematic
- Channel 2, 3, 4 have the same internal circuit as channel 1.
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (R GND only)
This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. maximum rating section of the device datasheet. maximum On-state currents of the different devices.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2 Solution 2 : diode (D GND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (≈ 600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift not varies if more than one HSD shares the same diode/resistor network.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the V CC line, the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os: CCpeak/Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax Calculation example: For VCCpeak = -100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V 5 kΩ ≤ Rprot ≤ 180 kΩ Recommended values: Rprot = 10 kΩ, CEXT = 10 nF.
3.4 Current sense and diagnostic
- Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a known ratio KX. The current ISENSE can be easily converted to a voltage VSENSE by means of an external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8 V < V CC < 18 V)).
- Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a maximum current ISENSEH in case of the following fault conditions (refer to ): – Power limitation activation – Over-temperature A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
Figure 31. Maximum turn-off current versus inductance (for each channel)
- Values are generated with R L = 0 Ω.
the temperature specified above for curves A and B.
4 Package and PC board thermal data
4.1 PowerSSO-24 thermal data
Figure 32. PowerSSO-24 PC board
- Layout condition of R th and Zth measurements (PCB: Double layer, Thermal Vias, FR4
areas: from minimum pad lay-out to 8 cm 2). Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel ON)
Table 14. Thermal parameters
5 Package and packing information
5.1 ECOPACK ® packages
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
5.2 PowerSSO-24 mechanical data
Figure 36. PowerSSO-24 package dimensions
Table 15. PowerSSO-24 mechanical data(1)(2)
- No intrusion allowed inwards the leads.
- Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side
- “D and E” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15 mm.
- Variations for small window leadframe option.
5.3 Packing information
Figure 37. PowerSSO-24 tube shipment (no suffix) Figure 38. PowerSSO-24 tape and reel shipment (suffix “TR”)
6 Order codes
Table 16. Device summary
7 Revision history
Table 17. Document revision history 25-May-2011 1 Initial release. 04-Nov-2013 2 Updated disclaimer.