DS9140.pdf

Document overview

  • Manufacturer or author: STMICROELECTRONICS
  • PDF pages: 22

Technical content

Datasheet sections

  • 1 Block diagrams and pins configurations
  • 2 Electrical specifications
  • 2.1 Absolute maximum ratings
  • 2.2 Thermal resistance data
  • 2.3 Electrical characteristics
  • 3 Application information
  • 3.1 MCU I/O protection
  • 4 Package and PC board thermal data
  • 4.1 SO-8 thermal PCB data
  • 5 Package and packing information
  • 5.1 ECOPACK ®
  • 5.2 SO-8 mechanical data
  • 5.3 SO-8 packing information
  • 6 Revision history

Features

 AEC-Q100 qualified  Drain current: 2 A  ESD protection  Overvoltage clamp  Thermal shutdown  Current and power limitation  Very low standby current  Very low electromagnetic susceptibility  Compliant with European directive 2002/95/EC  Open drain status output

Description

The VNL5300S5-E is a monolithic device made using STMicroelectronics® VIPower® technology, intended for driving resistive or inductive loads with one side connected to the battery. Built-in thermal shutdown protects the chip from overtemperature and short-circuit. Output current limitation protects the device in an overload condition. In case of long duration overload, the device limits the dissipated power to a safe level up to thermal shutdown intervention. Thermal shutdown, with automatic restart, allows the device to recover normal operation as soon as a fault condition disappears. Fast demagnetization of inductive loads is achieved at turn-off. Type V clamp RDS(on) ID VNL5300S5-E 41 V 300 m  2 A SO-8 Table 1. Devices summary

1 Block diagrams and pins configurations

Figure 1. Block diagram Table 2. Pin function

2 Electrical specifications

2.1 Absolute maximum ratings

conditions above those indicated in the operating sections of this specification is not implied. Table 4. Absolute maximum ratings

2.2 Thermal resistance data

2.3 Electrical characteristics

Table 5. Thermal resistance

  1. T Lead temperature measured with a thermocouple soldered on pin 8 according to Jedec JESD51-8.
  2. T Top temperature measured at the top center of the package using an infrared thermal camera according to
  3. Measured in still air condition according to Jedec JESD51-1, JESD51-2.

Table 6. PowerMOS section Table 7. Source drain diode

Table 8. Status pin Table 9. Logic input Table 10. Openload detection Table 11. Supply section

Table 12. Switching characteristics(1)

  1. See Figure 5: Application schematic
  2. See Figure 4: Switching characteristics

Table 13. Protection and diagnostics Table 14. Truth table

Figure 4. Switching characteristics

3 Application information

Figure 5. Application schematic

3.1 MCU I/O protection

a. In case of negative transient on the drain pin.

Figure 6. Maximum demagnetization energy

  1. Values are generated with R L = 0.

exceed the temperature specified above for curves A and B.

4 Package and PC board thermal data

4.1 SO-8 thermal PCB data

Figure 7. SO-8 PCB 2layers Figure 8. SO-8 PCB 4 layers

Table 15. 2-layer and 4-layer PCB characteristics Figure 9. SO-8 RthJ-Amb vs. 2-layer PCB copper heatsink area

Table 16. SO-8 thermal parameters

5 Package and packing information

5.1 ECOPACK ®

specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

5.2 SO-8 mechanical data

Figure 12. SO-8 package dimensions

Table 17. SO-8 mechanical data

  1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs

shall not exceed 0.15 mm in total (both side).

  1. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not

5.3 SO-8 packing information

Figure 13. SO-8 tape and reel shipment (suffix “TR”)

6 Revision history

Table 18. Document revision history 02-Jul-2012 1 Initial release. 18-Sep-2013 4 Updated disclaimer.