VNI2140 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 26
Technical content
Datasheet sections
- 1 Block diagram
- 2 Pin connections
- 3 Maximum ratings
- 4 Thermal data
- 5 Electrical characteristics
- 6 Truth table
- 7 Switching waveforms
- 8 Open-load
- 9 Package and PCB thermal data
- 10 Reverse polarity protection
- 11 Package information
- 11.1 PowerSSO-12™ package information
- 12 PowerSSO-12™ packing information
- 13 Ordering information
Features
- Nominal current: 0.75 A per channel
- Shorted-load protections
- Junction overtemperature protection
- Case overtemperature protection for thermal independence of the channels
- Thermal case shutdown restart not simultaneous for the various channels
- Protection against loss of ground
- Current limitation 1 A per channel
- Undervoltage shutdown
- Open-load in OFF-state and short to VCC detection
- Open-drain diagnostic outputs
- 3.3 V CMOS/TTL compatible inputs
- Fast demagnetization of inductive loads
- Conforms to IEC 61131-2
Applications
- Programmable logic control
- Industrial PC peripheral input/output
- Numerical control machines
Description
The VNI2140J is a monolithic device designed using STMicroelectronics' VIPower technology. The device drives two independent resistive or inductive loads with one side connected to ground. Active current limitation prevents a drop in system power supply in cases of shorted-load, and built-in thermal shutdown protects the chip from damage due to overtemperature and short-circuit. In overload conditions, channel turns OFF and ON automatically to maintain the junction temperature between TTSD and TR. If the case temperature reaches TCSD, the overloaded channel is turned OFF and restarts only when case temperature decreases down to TCR. In order to avoid high-peak current from the supply, when more than one channel is overloaded the TCSD restart is not simultaneous. Non overloaded channels continue to operate normally. The open-drain diagnostics output indicates overtemperature conditions and open-load in OFF-state. Product status link VNI2140J Product label Dual high-side smart power solid state relay VNI2140 Datasheet DS5977 - Rev 11 - September 2022 For further information contact your local STMicroelectronics sales office.
1 Block diagram
Figure 1. Block diagram
2 Pin connections
Figure 2. Pin connections (top view) Table 1. Pin description
1 NC - Not connected
3 Diag 1 Output/Open-drain Channel 1 diagnostic in open-drain configuration
4 GND Ground Device ground connection
5 Diag 2 Output/Open-drain Channel 2 diagnostic in open-drain configuration
7 VCC Supply Supply voltage
8 Output 2 Output Channel 2 power stage output, internally protected
9 Output 2 Output Channel 2 power stage output, internally protected
10 Output 1 Output Channel 1 power stage output, internally protected
11 Output 1 Output Channel 2 power stage output, internally protected
12 VCC Supply Supply voltage
3 Maximum ratings
Table 2. Absolute maximum ratings
- Protection functions are intended to avoid IC damage in fault conditions and are not intended for continuous operation.
Continuous and repetitive operation of protection functions may reduce the IC lifetime.
4 Thermal data
Table 3. Thermal data
- When mounted using minimum recommended pad size on FR-4 board.
5 Electrical characteristics
9 V < VCC < 36 V; -40 °C < TJ < 125 °C; unless otherwise specified
Table 4. Power section Table 5. Switching Table 6. Logic inputs
Electrical characteristics
Table 7. Protection and diagnostic
- Diag determination > 100 ms after the switching edge.
Figure 3. Current and voltage conventions
6 Truth table
Table 8. Truth table
- Depending on the external circuit.
7 Switching waveforms
Figure 4. Switching waveforms
Figure 5. Switching waveforms (continued)
8 Open-load
across the load is less than VOLMIN and the DIAG pin is kept high. the pull-up resistor) and the diag pin goes down. Figure 8. Open-load detection
Figure 9. Turn-on/off to open-load
9 Package and PCB thermal data
Figure 10. PowerSSO-12 PC board Figure 11. RthJA vs. PCB copper area in open box free-air condition
Table 9. Thermal parameter
10 Reverse polarity protection
- Placing a resistor (R GND) between IC GND pin and load GND
- Placing a diode between IC GND pin and load GND
where IGND is the DC reverse ground pin current and can be found in Section 3 of this datasheet. Figure 14. Reverse polarity protection This schematic can be used with any type of load.
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
11.1 PowerSSO-12™ package information
Figure 15. PowerSSO-12™ package outline
Package information
DS5977 - Rev 11 page 18/26
Table 10. PowerSSO 12, mechanical data Figure 16. Suggested footprint suggestion, which might not be in line with the customer PCB supplier design rules.
12 PowerSSO-12™ packing information
Figure 17. PowerSSO-12™ tube shipment (no suffix) Figure 18. PowerSSO-12™ tape and reel shipment (suffix “TR”)
Table 11. Ordering information
Ordering information
DS5977 - Rev 11 page 21/26
Revision history
Table 12. Document revision history 16-Dec-2008 1 Initial release. the maximum value of ILGND. Other minor text changes.
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