Automotive fully integrated H-bridge motor driver
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 31
Technical content
Datasheet sections
- 1 Block diagram and pin description
- 2 Electrical specifications
- 2.1 Absolute maximum ratings
- 2.2 Thermal data
- 2.3 Electrical characteristics
- 2.4 Waveforms
- 3 Application information
- 3.1 Reverse battery protection
- 4 Package and PCB thermal data
- 4.1 PowerSSO-36 thermal data
- 4.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady-
- 4.1.2 Thermal calculation in transient mode
- 5 Package and packing information
- 5.1 ECOPACK ®
- 5.2 PowerSSO-36 TP package information
- 5.3 PowerSSO-36 TP packing information
- 6 Revision history
Features
- Output current: 8 A 3 V CMOS compatible inputs Undervoltage shutdown Overvoltage clamp Thermal shutdown Cross-conduction protection Current and power limitation Very low standby power consumption PWM operation up to 20 KHz Protection against loss of ground and loss of V CC Current sense output proportional to motor current Output protected against short to ground and short to VCC Package: ECOPACK ®
Description
The VNH5180A-E is a full bridge motor driver intended for a wide range of automotive applications. The device incorporates a dual monolithic high-side driver and two low-side switches. Both switches are designed using STMicroelectronics’ well known and proven proprietary VIPower ® M0 technology that allows to efficiently integrate on the same die a true Power MOSFET with an intelligent signal/protection circuitry. The three dies are assembled in PowerSSO-36 TP package on electrically isolated leadframes. This package, specifically designed for the harsh automotive environment offers improved thermal performance thanks to exposed die pads. Moreover, its fully symmetrical mechanical design allows superior manufacturability at board level. The input signals IN A and INB can directly interface to the microcontroller to select the motor direction and the brake condition. The DIAG A/ENA or DIAGB/ENB, when connected to an external pull-up resistor, enables one leg of the bridge. Each DIAG A/ENA provides a feedback digital diagnostic signal as well. The normal operating condition is explained in the truth table. The CS pin allows to monitor the motor current by delivering a current proportional to its value when CS_DIS pin is driven low or left open. When CS_DIS is driven high, CS pin is in high impedance condition. The PWM, up to 20 KHz, allows to control the speed of the motor in all possible conditions. In all cases, a low level state on the PWM pin turns off both the LS A and LSB switches. Type R DS(on) Iout VCCmax VNH5180A-E 180 mΩ max (per leg) 8A 4 1V PowerSSO-36 TP Table 1. Device summary
1 Block diagram and pin description
Figure 1. Block diagram Table 2. Block description low-side switches according to the truth table. Undervoltage Shuts down the device for battery voltage lower than 5V. high voltage on the battery line. RDS(on) for the leg of the bridge. Current limitation Limits the motor current in case of short circuit. degradation and to protect the die. and latches off the concerned Low side. down the concerned ENx/DIAGx pin. safe range in case of short to ground condition.
Figure 2. Configuration diagram (top view) Table 3. Suggested connections for unused and not connected pins Table 4. Pin definitions and functions 13, 24 V CC, Heat Slug1 Drain of high-side switches and power supply voltage. 28, 32, 36 NC Not connected.
15 IN A Clockwise input
16 EN A/DIAGA
19 CS Output of current sense.
20 CS_DIS Active high CMOS compatible pin to disable current sense
21 EN B/DIAGB
22 IN B Counter clockwise input. 25, 26, 27, 29, 35 OUT B, Heat Slug3 Source of high-side switch B / drain of low-side switch B. 30, 31, 33, 34 GND B Source of low-side switch B. 2, 8, 10, 11, 12 OUT A, Heat Slug2 Source of high-side switch A / drain of low-side switch A. 3, 4, 6, 7 GND A Source of low-side switch A. Table 5. Pin functions description Power connections to the motor. VCC, Brake to GND, clockwise and counterclockwise). table in fault conditions (detected on OUTA)). voltage across an external resistor. CS_DIS Active high CMOS compatible pin to disable the current sense pin. Table 4. Pin definitions and functions (continued)
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Program and other relevant quality document. Table 6. Absolute maximum ratings
2.2 Thermal data
2.3 Electrical characteristics
Table 7. Thermal data Table 8. Power section
Table 9. Logic inputs (IN A, INB, ENA, ENB, PWM, CS_DIS) Table 10. Switching (V CC =1 3V , RLOAD =5 Ω) Table 8. Power section (continued)
Table 11. Protections and diagnostics
- T TSD is the minimum threshold temperature between HS and LS
- Valid for both HSD and LSD.
Table 12. Current sense (9 V < V CC <1 8V )
Figure 4. Definition of the delay times measurement
- Analog sense current drift is deviation of fact or K for a given device over (-40 °C to 150 °C and
9V < VCC < 18 V) with respect to its value measured at T J = 25 °C, VCC = 13 V. Table 12. Current sense (9 V < V CC < 18 V) (continued)
device. This pin must be externally pulled high. Table 13. Truth table in normal operating conditions Table 14. Truth table in fault conditions (detected on OUT A)
Table 15. Electrical transient requirements (part 1)
- The above test levels must be considered referred to V CC = 13.5 V except for pulse 5b.
- Valid in case of external load dum p clamp: 40V maximum referred to ground.
Table 16. Electrical transient requirements (part 2)
- The above test levels must be considered referred to V CC = 13.5 V except for pulse 5b.
- Valid in case of external load dum p clamp: 40V maximum referred to ground.
Table 17. Electrical transient requirements (part 3) C All functions of the device are performed as designed after exposure to disturbance. disturbance and cannot be returned to proper operation without replacing the device.
2.4 Waveforms
Figure 9. Waveforms in full-bridge operation
Figure 10. Waveforms in full-bridge operation (continued)
3 Application information
device. This pin must be externally pulled high. PWM pin usage: In all cases, a “0” on the PWM pin turns off both LSA and LSB switches. When PWM rises back to “1”, LSA or LSB turn on again depending on the input pin state. Figure 11. Typical application circuit for DC to 20 kHz PWM operation short circuit inductance may fly back into the blocking capacitor, if the bridge driver goes into 3-state. 500 µF per 10 A load current is recommended. X/ENX pin is considered as an output pin by the device. monitoring the INA, INB, DIAGA/ENA and DIAGB/ENB pins.
respective output (OUTX) again, the input signal must rise from low to high level. Figure 12. Behavior in fault condition (how a fault can be cleared)
- Pull low all inputs, PWM and Diag/EN pins within tDEL.
input. The device enters in stby mode as soon as the fault is cleared.
3.1 Reverse battery protection
CC line (approximately -1.5 V).
4 Package and PCB thermal data
4.1 PowerSSO-36 thermal data
Figure 15. PowerSSO-36™ PC board
Figure 16. Chipset configuration Figure 17. Auto and mutual R thj-amb vs PCB copper area in open box free air
4.1.1 Thermal calculation in clockw ise and anti-clockwise operation in
Table 18. Thermal calculation in clockwise and anti-clockwise operation in steady-
4.1.2 Thermal calculation in transient mode
Figure 18. Detailed chipset configuration
Figure 21. Thermal fitting model of an H-bridge in PowerSSO-36 Table 19. Thermal parameters (1)
- The blank space means that the val ue is the same as the previous one.
5 Package and packing information
5.1 ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
5.2 PowerSSO-36 TP package information
Figure 22. PowerSSO-36 TP package dimensions
Table 20. PowerSSO-36 TP mechanical data
5.3 PowerSSO-36 TP packing information
Figure 23. PowerSSO-36 TP tube shipment (no suffix) Figure 24. PowerSSO-36 TP tape and reel shipment (suffix “TR”)
6 Revision history
Table 21. Document revision history 11-Feb-2010 1 Initial release. 19-Sep-2013 6 Updated Disclaimer.