VND830AEP-E STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 26

Technical content

Datasheet sections

  • 1 Block diagram and pin description
  • 2 Electrical specifications
  • 2.1 Absolute maximum ratings
  • 2.2 Thermal data
  • 2.3 Electrical characteristics
  • 2.4 Electrical characteristics curves
  • 3 Application information
  • 3.1 GND protection network against reverse battery
  • 3.1.1 Solution 1: a resistor in the ground line (RGND only)
  • 3.1.2 Solution 2: a diode (D GND) in the ground line
  • 3.2 Load dump protection
  • 3.3 MCU I/O protection
  • 3.4 Maximum demagnetization energy (V
  • 4 Package and PC board thermal data
  • 4.1 PowerSSO-24 thermal data
  • 5 Package and packing information
  • 5.1 ECOPACK® packages
  • 5.2 PowerSSO-24 mechanical data
  • 5.3 Packing information
  • 6 Revision history

Features

■ DC short circuit current: 6A ■ CMOS compatible inputs ■ Proportional load current sense ■ Undervoltage and overvoltage shutdown ■ Overvoltage clamp ■ Thermal shutdown ■ Current limitation ■ Very low standby power dissipation ■ Protection against loss of ground and loss of VCC ■ Reverse battery protection(a) ■ In compliance with the 2002/95/EC european directive

Description

The VND830AEP-E is a monolithic device made using| STMicroelectronics VIPower™ M0-3 Technology. The VND830AEP-E is intended for driving any type of multiple load with one side connected to ground. The Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device has two channels in high side configuration; each channel has an analog sense output on which the sensing current is proportional (according to a known ratio) to the corresponding load current. Built-in thermal shutdown and outputs current limitation protect the chip from over temperature and short circuit. The device automatically turns off in the case where the ground pin becomes disconnected. Type R DS(on) IOUT VCC VND830AEP-E 60m Ω(1) 1. Per each channel. 6A(1) 36V a. See Application schematic on page 16 PowerSSO-24 Table 1. Device summary

Table 7. V

1 Block diagram and pin description

Figure 1. Block diagram Figure 2. Configuration diagram (top view) Table 2. Suggested connections for unused and not connected pins

2 Electrical specifications

2.1 Absolute maximum ratings

Program and other relevant quality document.

2.2 Thermal data

Table 3. Absolute maximum ratings Table 4. Thermal data (per island)

  1. When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35 µm thick) connected

to all Vcc pins. Horizontal mounting and no artificial air flow.

2.3 Electrical characteristics

Figure 3. Current and voltage conventions Note: V Fn = VCCn - VOUTn during reverse battery condition. Table 5. Power output

Table 10. Current sense Table 9. Logic inputs (continued)

Figure 4. I OUT/ISENSE versus IOUT

  1. Current sense signal delay after positive input slope.

Table 10. Current sense (continued)

Figure 5. Switching characteristics Table 11. Truth table

Table 12. Electrical transient requirements (part 1/3) Table 13. Electrical transient requirements (part 2/3) Table 14. Electrical transient requirements (part 3/3) and cannot be returned to proper operation without replacing the device.

Figure 6. Waveforms

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope Figure 11. Overvoltage shutdown Figure 12. Turn-off voltage slope

3 Application information

Figure 19. Application schematic

3.1 GND protection network against reverse battery

3.1.1 Solution 1: a resistor in the ground line (R GND only)

This can be used with any type of load. maximum rating section of the device datasheet. maximum on-state currents of the different devices.

If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using solution 2 below.

3.1.2 Solution 2: a diode (D GND) in the ground line

A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.

3.2 Load dump protection

Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than those shown in the ISO T/R 7637/1 table.

3.3 MCU I/O protection

If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the µC I/O pins from latching up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os: - V CCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax Example For the following conditions: VCCpeak = - 100V Ilatchup ≥ 20mA VOHμC ≥ 4.5V 5kΩ ≤ Rprot ≤ 65kΩ. Recommended values are: Rprot = 10kΩ

Figure 20. Maximum turn-off current versus load inductance Note: Values are generated with R L = 0Ω. must not exceed the temperature specified above for curves B and C.

4 Package and PC board thermal data

4.1 PowerSSO-24 thermal data

Figure 21. PowerSSO-24 PC board Figure 22. Rthj-amb vs PCB copper area in open box free air condition (one channel ON)

Table 15. Thermal parameters

5 Package and packing information

5.1 ECOPACK ® packages

specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

5.2 PowerSSO-24 mechanical data

Figure 25. PowerSSO-24 package dimensions

Table 16. PowerSSO-24 mechanical data (1) (2)

  1. No intrusion allowed inwards the leads.
  2. Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side
  3. “D and E” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15 mm.
  4. Variations for small window leadframe option.

5.3 Packing information

Figure 26. PowerSSO-24 tube shipment (no suffix) Figure 27. PowerSSO-24 tape and reel shipment (suffix “TR”)

6 Revision history

Table 17. Document revision history 04-Feb-2005 1 Initial release. Document reformatted and restructured. Added list of contents, tables and figures. Added ECOPACK® packages information. Update PowerSSO-24 mechanical data. 23-Sep-2013 4 Updated disclaimer.